JPS5478674A - Input protective device for complementary semiconductor device - Google Patents

Input protective device for complementary semiconductor device

Info

Publication number
JPS5478674A
JPS5478674A JP14626877A JP14626877A JPS5478674A JP S5478674 A JPS5478674 A JP S5478674A JP 14626877 A JP14626877 A JP 14626877A JP 14626877 A JP14626877 A JP 14626877A JP S5478674 A JPS5478674 A JP S5478674A
Authority
JP
Japan
Prior art keywords
region
diffusion
protective
input
input protective
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14626877A
Other languages
Japanese (ja)
Other versions
JPS6318337B2 (en
Inventor
Mikio Bessho
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP14626877A priority Critical patent/JPS5478674A/en
Publication of JPS5478674A publication Critical patent/JPS5478674A/en
Publication of JPS6318337B2 publication Critical patent/JPS6318337B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Amplifiers (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To ensure the protective capacity to the ratch-up in case the forward voltage is applied to the uni-conduction type semiconductor substrate from outside, by providing the reverse conducting input protective region and another deep reverse conducting region enclosing the protective region and then securing an electric connection between the deep region and the substrate. CONSTITUTION:P<->-type well region 4a and 4b are formed through diffusion and at one time on N-type semiconductor substrate 1 to be used for N-channel transistor Tr and the input protective device. Then N<+>-type region 3 is formed through diffusion to eliminate the parasitic effect on the substrate surface as well as to form the sfource and drain of N-channel MOS.Tr, and also input protective region 2 is formed through diffusion to be used as the input protective diode or the resistance. At the same time, P<+>-type region 2' is formed through diffusion within region 4a and 4b to eliminate the parasitic effect as well as to be used as the source and drain of P-channel MOS.Tr. After this, the gate SiO2 film is provided at the fixed region, and the input electrode, the gate connecting electrode plus earth electrodes 6-6'' are attached respectively.
JP14626877A 1977-12-05 1977-12-05 Input protective device for complementary semiconductor device Granted JPS5478674A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14626877A JPS5478674A (en) 1977-12-05 1977-12-05 Input protective device for complementary semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14626877A JPS5478674A (en) 1977-12-05 1977-12-05 Input protective device for complementary semiconductor device

Publications (2)

Publication Number Publication Date
JPS5478674A true JPS5478674A (en) 1979-06-22
JPS6318337B2 JPS6318337B2 (en) 1988-04-18

Family

ID=15403886

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14626877A Granted JPS5478674A (en) 1977-12-05 1977-12-05 Input protective device for complementary semiconductor device

Country Status (1)

Country Link
JP (1) JPS5478674A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56120165A (en) * 1980-02-28 1981-09-21 Nec Corp Protecting device for input of semiconductor device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5098791A (en) * 1973-12-27 1975-08-06
JPS5238890A (en) * 1975-09-23 1977-03-25 Mitsubishi Electric Corp Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5098791A (en) * 1973-12-27 1975-08-06
JPS5238890A (en) * 1975-09-23 1977-03-25 Mitsubishi Electric Corp Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56120165A (en) * 1980-02-28 1981-09-21 Nec Corp Protecting device for input of semiconductor device
JPH035069B2 (en) * 1980-02-28 1991-01-24 Nippon Electric Co

Also Published As

Publication number Publication date
JPS6318337B2 (en) 1988-04-18

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