JPS5478093A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5478093A
JPS5478093A JP14463077A JP14463077A JPS5478093A JP S5478093 A JPS5478093 A JP S5478093A JP 14463077 A JP14463077 A JP 14463077A JP 14463077 A JP14463077 A JP 14463077A JP S5478093 A JPS5478093 A JP S5478093A
Authority
JP
Japan
Prior art keywords
sio
films
poly
crystal
ions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14463077A
Other languages
Japanese (ja)
Inventor
Michiyuki Harada
Katsumi Murase
Kazuyuki Saito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP14463077A priority Critical patent/JPS5478093A/en
Publication of JPS5478093A publication Critical patent/JPS5478093A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To eliminate the need for photoetching by forming a gate electrode and source and drain regions, plus an electrode extracting hole reaching them by selectively injecting ions from a slant direction using a step pattern provided to a Si substrate surface.
CONSTITUTION: On Si substrate 1, surface films 2 and 2' of SiO2, Si3N4, poly- crystal Si, or the like with an opening are formed, which are used as masks for injecting impurity ions 4 and 5 aslant from the upper part, thereby forming source region 6 and drain region 3. Through oxidation in a vaporous atmosphere, thick SiO2 films 7 and 9 on regions 6 and 3 and thin gate SiO2 film 8 are generated. Then, a non-dope poly-crystal Si layer is grown on the entire surface and ions 4' and 5' are injected aslant from the upper part, thereby making conductive parts except poly-crystal layer 11 used as a gate electrode. Next, this is oxidized and layers except layer 11 slow in oxidation are converted into thick SiO2 films 10 and 12. Then, wiring metal is adhered and etched, and electrode extraction wirings 17 and 18 are provided.
COPYRIGHT: (C)1979,JPO&Japio
JP14463077A 1977-12-03 1977-12-03 Manufacture of semiconductor device Pending JPS5478093A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14463077A JPS5478093A (en) 1977-12-03 1977-12-03 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14463077A JPS5478093A (en) 1977-12-03 1977-12-03 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5478093A true JPS5478093A (en) 1979-06-21

Family

ID=15366504

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14463077A Pending JPS5478093A (en) 1977-12-03 1977-12-03 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5478093A (en)

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