JPS5477118A - Reading circuit controller for magnetic tape apparatus - Google Patents

Reading circuit controller for magnetic tape apparatus

Info

Publication number
JPS5477118A
JPS5477118A JP14331977A JP14331977A JPS5477118A JP S5477118 A JPS5477118 A JP S5477118A JP 14331977 A JP14331977 A JP 14331977A JP 14331977 A JP14331977 A JP 14331977A JP S5477118 A JPS5477118 A JP S5477118A
Authority
JP
Japan
Prior art keywords
buffer
counter
data
group
error
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14331977A
Other languages
Japanese (ja)
Inventor
Hisashi Kimura
Akihiro Hayakawa
Hiroshi Ichii
Kiyoo Moroto
Hirotoshi Koketsu
Hidehiko Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14331977A priority Critical patent/JPS5477118A/en
Publication of JPS5477118A publication Critical patent/JPS5477118A/en
Pending legal-status Critical Current

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  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

PURPOSE: To shorten the data processing time by controlling the timings of the formation a data sub-group and the detection of format as well as the timing of the corrected code formation during the error detection with the use of two counters linked to each other.
CONSTITUTION: In accordance with the counted value of a first counter 11, the reading of the data fed through a group buffer 2 and a bit converting memory 3 to a sub-group buffer 4 and the count starting timing of a second counter 14 are controlled so that the transfer timing of the content of the buffer 4 to an ECC group buffer 5 is controlled in accordance with the counted value of the counter 11. Then, the format of the data of the buffer 5 is checked by the preset counted value of the counter 14. If any error is detected, the counter 14 continues its counting operation in response to the error signals to control the starting timing of a data error correcting code forming circuit to be fed to an exclusive OR circuit 6 which is operative to prohibit the transfer of the content of the buffer 5 to an ECC buffer 7 so that the data reading time without any delay can be shortened.
COPYRIGHT: (C)1979,JPO&Japio
JP14331977A 1977-12-01 1977-12-01 Reading circuit controller for magnetic tape apparatus Pending JPS5477118A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14331977A JPS5477118A (en) 1977-12-01 1977-12-01 Reading circuit controller for magnetic tape apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14331977A JPS5477118A (en) 1977-12-01 1977-12-01 Reading circuit controller for magnetic tape apparatus

Publications (1)

Publication Number Publication Date
JPS5477118A true JPS5477118A (en) 1979-06-20

Family

ID=15336006

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14331977A Pending JPS5477118A (en) 1977-12-01 1977-12-01 Reading circuit controller for magnetic tape apparatus

Country Status (1)

Country Link
JP (1) JPS5477118A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6453299A (en) * 1987-08-24 1989-03-01 Toshiba Corp Data output system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6453299A (en) * 1987-08-24 1989-03-01 Toshiba Corp Data output system

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