JPS5466762A - Code conversion circuit for 16 value orthogonal amplitude modulation - Google Patents
Code conversion circuit for 16 value orthogonal amplitude modulationInfo
- Publication number
- JPS5466762A JPS5466762A JP13369577A JP13369577A JPS5466762A JP S5466762 A JPS5466762 A JP S5466762A JP 13369577 A JP13369577 A JP 13369577A JP 13369577 A JP13369577 A JP 13369577A JP S5466762 A JPS5466762 A JP S5466762A
- Authority
- JP
- Japan
- Prior art keywords
- bus
- signal
- terminal
- demodulation
- code conversion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
PURPOSE:To prevent the variation in the demodulated output of the second bus due to the drawing phase change of the demodulation reference carrier and to reduce the error rate of the second bus, by performing the input signal code conversion of the second bus as specified. CONSTITUTION:The binary data of the first bus P1 is inputted from the terminal IN, it is converted into the difference signal with 4 phase PSK logic SL, and is inputted to the 16 phase modulation circuit 1. The data on the second bus P2 is made for disagreement detection with the SL output. Taking the exclusive logical sum as P1(+)q1=a, p2(+)q2=b, a=1 and b=1, when 1 is added to one terminal of EXOR gate ER13 ER14, P2 signal to other terminal is outputted with inversion and in other case, no inversion is made. Although (0,0) and (1,1) are not subject to this conversion, demodulation is made independently of the drawing phase because of the symmetry to the reference carriers X and Y. After that, input is made to the circuit 1, conversion is made to binary signal with the demodulation 2 of output, the corresponding signal of P1 and P2 is obtained from the terminals OUT and OUT', and the error rate of P2 can be improved.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP52133695A JPS5842670B2 (en) | 1977-11-08 | 1977-11-08 | Communication method using 16-level orthogonal amplitude modulation |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP52133695A JPS5842670B2 (en) | 1977-11-08 | 1977-11-08 | Communication method using 16-level orthogonal amplitude modulation |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5466762A true JPS5466762A (en) | 1979-05-29 |
JPS5842670B2 JPS5842670B2 (en) | 1983-09-21 |
Family
ID=15110708
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP52133695A Expired JPS5842670B2 (en) | 1977-11-08 | 1977-11-08 | Communication method using 16-level orthogonal amplitude modulation |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5842670B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59112749A (en) * | 1982-12-18 | 1984-06-29 | Fujitsu Ltd | Differential logical circuit for multivalued orthogonal amplitude modulation |
JPS60182246A (en) * | 1984-02-06 | 1985-09-17 | コーデツクス・コーポレーシヨン | Encoding modulation system |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5374306A (en) * | 1976-12-15 | 1978-07-01 | Mitsubishi Electric Corp | Differential coding system |
-
1977
- 1977-11-08 JP JP52133695A patent/JPS5842670B2/en not_active Expired
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5374306A (en) * | 1976-12-15 | 1978-07-01 | Mitsubishi Electric Corp | Differential coding system |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59112749A (en) * | 1982-12-18 | 1984-06-29 | Fujitsu Ltd | Differential logical circuit for multivalued orthogonal amplitude modulation |
JPS60182246A (en) * | 1984-02-06 | 1985-09-17 | コーデツクス・コーポレーシヨン | Encoding modulation system |
JPH0356500B2 (en) * | 1984-02-06 | 1991-08-28 |
Also Published As
Publication number | Publication date |
---|---|
JPS5842670B2 (en) | 1983-09-21 |
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