JPS5558649A - Error rate monitor unit - Google Patents

Error rate monitor unit

Info

Publication number
JPS5558649A
JPS5558649A JP13180678A JP13180678A JPS5558649A JP S5558649 A JPS5558649 A JP S5558649A JP 13180678 A JP13180678 A JP 13180678A JP 13180678 A JP13180678 A JP 13180678A JP S5558649 A JPS5558649 A JP S5558649A
Authority
JP
Japan
Prior art keywords
output
error rate
phase
psk
demodulator circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13180678A
Other languages
Japanese (ja)
Inventor
Tadayoshi Kato
Eiji Itaya
Takao Hara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP13180678A priority Critical patent/JPS5558649A/en
Publication of JPS5558649A publication Critical patent/JPS5558649A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/20—Arrangements for detecting or preventing errors in the information received using signal quality detector
    • H04L1/206—Arrangements for detecting or preventing errors in the information received using signal quality detector for modulated signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

PURPOSE:To estimate always a true error rate correctly by comparing output signals of the first demodulator circuit for synchronizing phase detection and the second demodulator circuit for delay detection with each other to obtain a disagreement output. CONSTITUTION:In the first demodulator circuit 1, PSK phase detector 6 performs the synchronizing detection of an inputted four-phase PSK wave, and the output is discriminated by 3 and is subjected to code conversion in 5, and after that, reproducing signals are outputted. Meanwhile, in the second demodulator circuit 2, the input four- phase PSK wave is subjected to delay detection by PSK phase detector 8, and the output is disciminated by 4 and is outputted. Output signals of the first and the second demodulator circuits are compared with each other through exclusive OR circuits 10 and 11 to obtain a disagreement output. As a result, a false error signal having always correspondence relation to the error rate of reproducing signals obtained from the four-phase PSK modulation wave can be obtained, so that a true error rate can be always estimated correctly.
JP13180678A 1978-10-26 1978-10-26 Error rate monitor unit Pending JPS5558649A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13180678A JPS5558649A (en) 1978-10-26 1978-10-26 Error rate monitor unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13180678A JPS5558649A (en) 1978-10-26 1978-10-26 Error rate monitor unit

Publications (1)

Publication Number Publication Date
JPS5558649A true JPS5558649A (en) 1980-05-01

Family

ID=15066538

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13180678A Pending JPS5558649A (en) 1978-10-26 1978-10-26 Error rate monitor unit

Country Status (1)

Country Link
JP (1) JPS5558649A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4326277A1 (en) * 1993-08-05 1995-02-09 Sel Alcatel Ag Method and circuit arrangement for detecting the bit error rate in a digital optical receiver
JPH0960883A (en) * 1995-08-21 1997-03-04 San Frontier Technol:Kk Anti-wind device in gas equipment

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4326277A1 (en) * 1993-08-05 1995-02-09 Sel Alcatel Ag Method and circuit arrangement for detecting the bit error rate in a digital optical receiver
JPH0960883A (en) * 1995-08-21 1997-03-04 San Frontier Technol:Kk Anti-wind device in gas equipment

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