JPS54130861A - Pll anomaly detection method - Google Patents

Pll anomaly detection method

Info

Publication number
JPS54130861A
JPS54130861A JP3812378A JP3812378A JPS54130861A JP S54130861 A JPS54130861 A JP S54130861A JP 3812378 A JP3812378 A JP 3812378A JP 3812378 A JP3812378 A JP 3812378A JP S54130861 A JPS54130861 A JP S54130861A
Authority
JP
Japan
Prior art keywords
synchronism
phase
signal
anomaly
pll
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3812378A
Other languages
Japanese (ja)
Inventor
Yasumori Hibi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP3812378A priority Critical patent/JPS54130861A/en
Publication of JPS54130861A publication Critical patent/JPS54130861A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/095Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a lock detector

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:To prevent noise to the analogue signal system from mixing in, by mobitoring the digital signal output of a phase detector circuit to perform the ligical processing for out-of-phase. CONSTITUTION:Flip-flops 3 and 7 constitute a phase comparator. Then, outputs of these flip-flops have the phase opposite to each other under a synchronous state. Here, in case of any out-of-synchronism, exclusive OR 8 outputs a pulse corresponding to out-of-synchronism width, however, anomaly is not detected if this width is within tolerance r. When out-of-synchronism is longer than time r, OR 10 between a signal, which is delayed by time r in delay circuit 9, and a signal, which does not pass through the delay circuit, is operated, and the output as OR is obtained. As a result, anomaly can be detected.
JP3812378A 1978-04-03 1978-04-03 Pll anomaly detection method Pending JPS54130861A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3812378A JPS54130861A (en) 1978-04-03 1978-04-03 Pll anomaly detection method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3812378A JPS54130861A (en) 1978-04-03 1978-04-03 Pll anomaly detection method

Publications (1)

Publication Number Publication Date
JPS54130861A true JPS54130861A (en) 1979-10-11

Family

ID=12516670

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3812378A Pending JPS54130861A (en) 1978-04-03 1978-04-03 Pll anomaly detection method

Country Status (1)

Country Link
JP (1) JPS54130861A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5978427A (en) * 1996-08-28 1999-11-02 Nec Corporation Phase-locked loop circuit having a lock state detecting function
CN103941188A (en) * 2014-04-25 2014-07-23 中山职业技术学院 Synchronization and out-of step detecting circuit based on CD4017

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5978427A (en) * 1996-08-28 1999-11-02 Nec Corporation Phase-locked loop circuit having a lock state detecting function
CN103941188A (en) * 2014-04-25 2014-07-23 中山职业技术学院 Synchronization and out-of step detecting circuit based on CD4017
CN103941188B (en) * 2014-04-25 2016-10-19 中山职业技术学院 A kind of synchronization detection of loss of mains circuit based on CD4017

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