JPS5490918A - Transfer system of asynchronous serial data signal - Google Patents
Transfer system of asynchronous serial data signalInfo
- Publication number
- JPS5490918A JPS5490918A JP15603777A JP15603777A JPS5490918A JP S5490918 A JPS5490918 A JP S5490918A JP 15603777 A JP15603777 A JP 15603777A JP 15603777 A JP15603777 A JP 15603777A JP S5490918 A JPS5490918 A JP S5490918A
- Authority
- JP
- Japan
- Prior art keywords
- output
- signal
- terminal
- gate
- data signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
- H04L25/4902—Pulse width modulation; Pulse position modulation
Landscapes
- Physics & Mathematics (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Dc Digital Transmission (AREA)
Abstract
PURPOSE:To aviod the shift of relative phase between transmission and reception, by obtaining the thickness signal through the demodulation at the reception side, after modulating and transferring the pulse width of return-zero caused in synchronizing with the clock pulse into the width corresponding to the logic ''1'' and ''0''. CONSTITUTION:When the terminal Q of FF1 is varied as shown in A with the standard base lock signal fed from the terminal TBC, the terminal Q of FF2 changes as shown in B. When logical operation is made for the carrier gate signal ACG together with FF output by means of the NAND gate G1 and the AND gate G2, the output of G1 is as shown in C, and the output of G2 is as shown in D. When the transmission data SD(waveform F) is fed, since the NOR circuit G5 is as shown in G and the output of the transistor DV is as shown in H. That is, the output of ST performs the modulation of return-zero type to the transmission data F, and the signal having no phase shift can be obtained by demodulating the signal at the reception side.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15603777A JPS5490918A (en) | 1977-12-24 | 1977-12-24 | Transfer system of asynchronous serial data signal |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15603777A JPS5490918A (en) | 1977-12-24 | 1977-12-24 | Transfer system of asynchronous serial data signal |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5490918A true JPS5490918A (en) | 1979-07-19 |
Family
ID=15618931
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15603777A Pending JPS5490918A (en) | 1977-12-24 | 1977-12-24 | Transfer system of asynchronous serial data signal |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5490918A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56107664A (en) * | 1980-01-30 | 1981-08-26 | Nippon Telegr & Teleph Corp <Ntt> | Signal transmission system |
JPS58500345A (en) * | 1981-02-26 | 1983-03-03 | ゼネラル・エレクトリック・カンパニイ | data communication system |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5027403A (en) * | 1973-03-16 | 1975-03-20 | ||
JPS52129214A (en) * | 1976-04-21 | 1977-10-29 | Tokyo Jiki Insatsu Kk | Modem system |
-
1977
- 1977-12-24 JP JP15603777A patent/JPS5490918A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5027403A (en) * | 1973-03-16 | 1975-03-20 | ||
JPS52129214A (en) * | 1976-04-21 | 1977-10-29 | Tokyo Jiki Insatsu Kk | Modem system |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56107664A (en) * | 1980-01-30 | 1981-08-26 | Nippon Telegr & Teleph Corp <Ntt> | Signal transmission system |
JPS58500345A (en) * | 1981-02-26 | 1983-03-03 | ゼネラル・エレクトリック・カンパニイ | data communication system |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0094178A3 (en) | Interface for serial data communications link | |
US3835404A (en) | Extracting circuit for reproducing carrier signals from a multiphase modulated signal | |
JPS5639694A (en) | Method and device for synchrnonizing timing in transmission of digital information signal | |
JPS54148412A (en) | Reproduction system for timing information | |
JPS5490918A (en) | Transfer system of asynchronous serial data signal | |
ES447308A1 (en) | Digital data transmit and receive channel modem | |
JPS558166A (en) | Data transmission system | |
JPS6467036A (en) | Demodulation circuit | |
GB1530828A (en) | Digital data transmission system | |
JPS5294110A (en) | Phase synchronizer using modified fm method | |
JPS6019396Y2 (en) | Synchronous switching circuit for modem | |
JPS5393718A (en) | Interference detecting system for multi-phase modulation same frequencyband polarized wave sharing communication | |
JPS54107616A (en) | Superimposing and transmission system for sub-signal | |
JPS54558A (en) | Modulation and demodulation system | |
JPS52149411A (en) | Multiplex orthogonal modulation and demodulation system | |
JPS5787642A (en) | Binary code trnsmitting system | |
JPS51117861A (en) | Differential phase demodulator | |
JPS55149554A (en) | Carrier reproducing circuit | |
JPS5636253A (en) | Demodulating method of fsk signal | |
JPS5739639A (en) | Delay type phase correction system | |
JPS5794915A (en) | Demodulating circuit | |
JPS52131443A (en) | Phase synchronization circuit | |
JPS52121301A (en) | Phase locked loop for multichannel recored demodulation | |
JPS5643855A (en) | Digital multilevel, multiphase modulation-demodulation system | |
JPS522207A (en) | Receiving circuit |