JPS5490918A - Transfer system of asynchronous serial data signal - Google Patents

Transfer system of asynchronous serial data signal

Info

Publication number
JPS5490918A
JPS5490918A JP15603777A JP15603777A JPS5490918A JP S5490918 A JPS5490918 A JP S5490918A JP 15603777 A JP15603777 A JP 15603777A JP 15603777 A JP15603777 A JP 15603777A JP S5490918 A JPS5490918 A JP S5490918A
Authority
JP
Japan
Prior art keywords
output
signal
terminal
gate
data signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15603777A
Other languages
Japanese (ja)
Inventor
Kazuhiro Sato
Yoshiharu Kamio
Tadao Nozaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15603777A priority Critical patent/JPS5490918A/en
Publication of JPS5490918A publication Critical patent/JPS5490918A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/38Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40Transmitting circuits; Receiving circuits
    • H04L25/49Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4902Pulse width modulation; Pulse position modulation

Landscapes

  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)

Abstract

PURPOSE:To aviod the shift of relative phase between transmission and reception, by obtaining the thickness signal through the demodulation at the reception side, after modulating and transferring the pulse width of return-zero caused in synchronizing with the clock pulse into the width corresponding to the logic ''1'' and ''0''. CONSTITUTION:When the terminal Q of FF1 is varied as shown in A with the standard base lock signal fed from the terminal TBC, the terminal Q of FF2 changes as shown in B. When logical operation is made for the carrier gate signal ACG together with FF output by means of the NAND gate G1 and the AND gate G2, the output of G1 is as shown in C, and the output of G2 is as shown in D. When the transmission data SD(waveform F) is fed, since the NOR circuit G5 is as shown in G and the output of the transistor DV is as shown in H. That is, the output of ST performs the modulation of return-zero type to the transmission data F, and the signal having no phase shift can be obtained by demodulating the signal at the reception side.
JP15603777A 1977-12-24 1977-12-24 Transfer system of asynchronous serial data signal Pending JPS5490918A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15603777A JPS5490918A (en) 1977-12-24 1977-12-24 Transfer system of asynchronous serial data signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15603777A JPS5490918A (en) 1977-12-24 1977-12-24 Transfer system of asynchronous serial data signal

Publications (1)

Publication Number Publication Date
JPS5490918A true JPS5490918A (en) 1979-07-19

Family

ID=15618931

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15603777A Pending JPS5490918A (en) 1977-12-24 1977-12-24 Transfer system of asynchronous serial data signal

Country Status (1)

Country Link
JP (1) JPS5490918A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56107664A (en) * 1980-01-30 1981-08-26 Nippon Telegr & Teleph Corp <Ntt> Signal transmission system
JPS58500345A (en) * 1981-02-26 1983-03-03 ゼネラル・エレクトリック・カンパニイ data communication system

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5027403A (en) * 1973-03-16 1975-03-20
JPS52129214A (en) * 1976-04-21 1977-10-29 Tokyo Jiki Insatsu Kk Modem system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5027403A (en) * 1973-03-16 1975-03-20
JPS52129214A (en) * 1976-04-21 1977-10-29 Tokyo Jiki Insatsu Kk Modem system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56107664A (en) * 1980-01-30 1981-08-26 Nippon Telegr & Teleph Corp <Ntt> Signal transmission system
JPS58500345A (en) * 1981-02-26 1983-03-03 ゼネラル・エレクトリック・カンパニイ data communication system

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