JPS5464959A - Cycle slipping correcting method - Google Patents
Cycle slipping correcting methodInfo
- Publication number
- JPS5464959A JPS5464959A JP13128477A JP13128477A JPS5464959A JP S5464959 A JPS5464959 A JP S5464959A JP 13128477 A JP13128477 A JP 13128477A JP 13128477 A JP13128477 A JP 13128477A JP S5464959 A JPS5464959 A JP S5464959A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- detector
- phase
- output
- carrier wave
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
- H04L27/22—Demodulator circuits; Receiver circuits
- H04L27/227—Demodulator circuits; Receiver circuits using coherent demodulation
- H04L27/2275—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses the received modulated signals
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
PURPOSE:To ensure the output of the correct data even when the cycle slipping occurs, by detecting to which phase state the regenerated carrier wave shifted when the slipping occurs and the selecting the combination of the output data according to the detection of the phase state. CONSTITUTION:The 4-phase PSK modulated signal sent from input terminal 1 is applied to demodulating phase detector 2 and 3 plus carrier regenerating circuit 4. The reference carrier wave regenerated at circuit 4 is sent to detector 2 and also delayed 90 deg. through shifter 5 to be applied to detector 3. Then the output of detector 2 and 3 undergo the positive or negative identification through comparator 6 and 7, undergo the code conversion through amplifier 8 and 9 and are then combined with the binary data via phase indeterminacy eleiminating circuit 10. After this, the combined output is selected through switch selection logic circuit 15 and then delivered through demodulation output terminal 12 and 13 via switch circuit 11. In this case, the reference carrier wave sent from circuit 4 is applied to phase detector 31 and 32 of cycle slipping detector circuit 14, and circuit 15 is controlled via comparator 33 and 34 plus detection logic circuit 38.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13128477A JPS5464959A (en) | 1977-11-01 | 1977-11-01 | Cycle slipping correcting method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13128477A JPS5464959A (en) | 1977-11-01 | 1977-11-01 | Cycle slipping correcting method |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5464959A true JPS5464959A (en) | 1979-05-25 |
Family
ID=15054343
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13128477A Pending JPS5464959A (en) | 1977-11-01 | 1977-11-01 | Cycle slipping correcting method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5464959A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0474043A (en) * | 1990-07-13 | 1992-03-09 | Japan Radio Co Ltd | Qpsk modulation wave identification circuit |
US6046618A (en) * | 1997-05-12 | 2000-04-04 | Samsung Electronics Co., Ltd. | Phase correction circuit and method therefor |
-
1977
- 1977-11-01 JP JP13128477A patent/JPS5464959A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0474043A (en) * | 1990-07-13 | 1992-03-09 | Japan Radio Co Ltd | Qpsk modulation wave identification circuit |
US6046618A (en) * | 1997-05-12 | 2000-04-04 | Samsung Electronics Co., Ltd. | Phase correction circuit and method therefor |
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