JPS5464444A - Memory extension method for microcomputer - Google Patents

Memory extension method for microcomputer

Info

Publication number
JPS5464444A
JPS5464444A JP13064477A JP13064477A JPS5464444A JP S5464444 A JPS5464444 A JP S5464444A JP 13064477 A JP13064477 A JP 13064477A JP 13064477 A JP13064477 A JP 13064477A JP S5464444 A JPS5464444 A JP S5464444A
Authority
JP
Japan
Prior art keywords
input
output port
rom
microcomputer
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13064477A
Other languages
Japanese (ja)
Inventor
Masao Hosaka
Yoshitaka Ogino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP13064477A priority Critical patent/JPS5464444A/en
Publication of JPS5464444A publication Critical patent/JPS5464444A/en
Pending legal-status Critical Current

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  • Microcomputers (AREA)

Abstract

PURPOSE: To enable the extension of memory and to increase the utilizing efficiency of the input and output port, by connecting the bus line of external memory to the input and output port of a single chip microcomputer.
CONSTITUTION: In ROM 25 placed at the external of the single chip microcomputer 24, the address lines A0 to A7 are connected to the output ports 221 and 222 of the input and output port 22 of the computer 24, and the data lines D0 to D7 are connected to the input ports 223 and 224. Accordingly, the deficiency of the capacity of ROM in the computer 24 can be compensated with ROM. Further, the input and output port can efficiently be used by making common use the input and output port to ROM and also external load.
COPYRIGHT: (C)1979,JPO&Japio
JP13064477A 1977-10-31 1977-10-31 Memory extension method for microcomputer Pending JPS5464444A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13064477A JPS5464444A (en) 1977-10-31 1977-10-31 Memory extension method for microcomputer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13064477A JPS5464444A (en) 1977-10-31 1977-10-31 Memory extension method for microcomputer

Publications (1)

Publication Number Publication Date
JPS5464444A true JPS5464444A (en) 1979-05-24

Family

ID=15039171

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13064477A Pending JPS5464444A (en) 1977-10-31 1977-10-31 Memory extension method for microcomputer

Country Status (1)

Country Link
JP (1) JPS5464444A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS583054A (en) * 1981-06-30 1983-01-08 Nec Corp Single chip microcomputer
JPS63195734A (en) * 1987-02-07 1988-08-12 Diesel Kiki Co Ltd Control data processor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS583054A (en) * 1981-06-30 1983-01-08 Nec Corp Single chip microcomputer
JPH03668B2 (en) * 1981-06-30 1991-01-08 Nippon Electric Co
JPS63195734A (en) * 1987-02-07 1988-08-12 Diesel Kiki Co Ltd Control data processor

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