JPS5451433A - Data processing system - Google Patents

Data processing system

Info

Publication number
JPS5451433A
JPS5451433A JP11774777A JP11774777A JPS5451433A JP S5451433 A JPS5451433 A JP S5451433A JP 11774777 A JP11774777 A JP 11774777A JP 11774777 A JP11774777 A JP 11774777A JP S5451433 A JPS5451433 A JP S5451433A
Authority
JP
Japan
Prior art keywords
extended
iocb
ioca
data processing
same
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11774777A
Other languages
Japanese (ja)
Inventor
Kunihiko Hakamazuka
Yoichi Aoki
Yasuyuki Fujii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP11774777A priority Critical patent/JPS5451433A/en
Publication of JPS5451433A publication Critical patent/JPS5451433A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To make easy for the data giving and reception for the data processing unit and to avoid larger size unit, even if I/O is extended through the provision of the bus buffer means.
CONSTITUTION: The data processing unit DPU consisting of the microprocessor MPU, I/O 101 and 102, IOC1 and IOC 2 of the control module of I/O, and memory MEM is connected to the extended input and output control modules IOCA, IOCB, I/O IOA and IOB via the bus buffer BBF. When BBF is connected like this, the control line ICL1 is connected to IOCA and IOCB with the form of sweet potato vines the same as the control line ICL allocated in DPU, and the extended bus line BUS1 is connected to each control module in the form of multi-drop type the same as the bus line BUS2. Accordingly, MPU can be controlled to IOCA and IOCB extended the same as IOC1 and IOC2
COPYRIGHT: (C)1979,JPO&Japio
JP11774777A 1977-09-30 1977-09-30 Data processing system Pending JPS5451433A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11774777A JPS5451433A (en) 1977-09-30 1977-09-30 Data processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11774777A JPS5451433A (en) 1977-09-30 1977-09-30 Data processing system

Publications (1)

Publication Number Publication Date
JPS5451433A true JPS5451433A (en) 1979-04-23

Family

ID=14719301

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11774777A Pending JPS5451433A (en) 1977-09-30 1977-09-30 Data processing system

Country Status (1)

Country Link
JP (1) JPS5451433A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5743217A (en) * 1980-08-29 1982-03-11 Nec Corp Hierarchical structure bidirectional bus controlling system
JPS6148060A (en) * 1984-08-15 1986-03-08 Nec Corp Bus extending system
JPS62201862U (en) * 1987-03-12 1987-12-23

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5261444A (en) * 1975-11-17 1977-05-20 Yokogawa Hokushin Electric Corp Data bus system of information processing unit
JPS52102643A (en) * 1976-02-25 1977-08-29 Hitachi Ltd Data processor
JPS5387133A (en) * 1977-01-06 1978-08-01 Ibm Input*output interface connecting circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5261444A (en) * 1975-11-17 1977-05-20 Yokogawa Hokushin Electric Corp Data bus system of information processing unit
JPS52102643A (en) * 1976-02-25 1977-08-29 Hitachi Ltd Data processor
JPS5387133A (en) * 1977-01-06 1978-08-01 Ibm Input*output interface connecting circuit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5743217A (en) * 1980-08-29 1982-03-11 Nec Corp Hierarchical structure bidirectional bus controlling system
JPS6148060A (en) * 1984-08-15 1986-03-08 Nec Corp Bus extending system
JPH0223893B2 (en) * 1984-08-15 1990-05-25 Nippon Electric Co
JPS62201862U (en) * 1987-03-12 1987-12-23

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