JPS54159169A - Impurity diffusion method to semiconductor - Google Patents

Impurity diffusion method to semiconductor

Info

Publication number
JPS54159169A
JPS54159169A JP6767278A JP6767278A JPS54159169A JP S54159169 A JPS54159169 A JP S54159169A JP 6767278 A JP6767278 A JP 6767278A JP 6767278 A JP6767278 A JP 6767278A JP S54159169 A JPS54159169 A JP S54159169A
Authority
JP
Japan
Prior art keywords
impurity
source
locating
substrate
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6767278A
Other languages
Japanese (ja)
Inventor
Hiroyuki Taniguchi
Naohiro Monma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP6767278A priority Critical patent/JPS54159169A/en
Publication of JPS54159169A publication Critical patent/JPS54159169A/en
Pending legal-status Critical Current

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  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

PURPOSE: To obtain uniform diffusion layer without loosing the smoothness of the Si surface, by locating the constituent consisting of Si, Ta and W at the circumference of substrate.
CONSTITUTION: The Si substrate 3 is located in the protection tube 5 consisting of Si, Ta and W greater in the adhering coefficient with impurity metal together with the buffer material 4, and vacuum sealing is made in the quartz tube 1 by locating the impurity source 2. At the processing with the diffusion furnace, the metal of the source of impurity is attached at the inner wall of the protection tube as shown in arrow, and the attachment to the test piece Si can be made without reflection from here. Accordingly, even with excessive impurity substance source, no coarseness of the Si surface such as alloying is caused and stable and uniform diffusion can be possible.
COPYRIGHT: (C)1979,JPO&Japio
JP6767278A 1978-06-07 1978-06-07 Impurity diffusion method to semiconductor Pending JPS54159169A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6767278A JPS54159169A (en) 1978-06-07 1978-06-07 Impurity diffusion method to semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6767278A JPS54159169A (en) 1978-06-07 1978-06-07 Impurity diffusion method to semiconductor

Publications (1)

Publication Number Publication Date
JPS54159169A true JPS54159169A (en) 1979-12-15

Family

ID=13351714

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6767278A Pending JPS54159169A (en) 1978-06-07 1978-06-07 Impurity diffusion method to semiconductor

Country Status (1)

Country Link
JP (1) JPS54159169A (en)

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