JPS54154946A - Control unit of common bus - Google Patents

Control unit of common bus

Info

Publication number
JPS54154946A
JPS54154946A JP6370778A JP6370778A JPS54154946A JP S54154946 A JPS54154946 A JP S54154946A JP 6370778 A JP6370778 A JP 6370778A JP 6370778 A JP6370778 A JP 6370778A JP S54154946 A JPS54154946 A JP S54154946A
Authority
JP
Japan
Prior art keywords
signal
common bus
computer
output
signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6370778A
Other languages
Japanese (ja)
Other versions
JPS603227B2 (en
Inventor
Kazuhiro Akuta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP6370778A priority Critical patent/JPS603227B2/en
Publication of JPS54154946A publication Critical patent/JPS54154946A/en
Publication of JPS603227B2 publication Critical patent/JPS603227B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Small-Scale Networks (AREA)
  • Bus Control (AREA)

Abstract

PURPOSE: To attain the control for the common bus via the simple bus master by detecting that the signals generated from the bus master have turned to be the signals of the self-computer and then giving the request for use of the common bus using the signal of the self-computer as the trigger.
CONSTITUTION: For bus master 11, the output of clock generator 15 passes through gate 16 and then enters each computer through control line 13 and 14 via counter 17. Gate 18a, 18b, and 19 of computer 10c are the circuits to detect that the clock signals of line 13 and 14 have turned to be the signals predetermined for the self- computer. Using the output signal 20 as the trigger, recognized FF21 is set when common bus using request signal 22 is 1. Signal 23 generated when use of the common bus ends is connected to the reset terminal of FF21, and the NOT signal of the output, i.e.,, the signal showing that common bus 9 is under use is connected to BSY signal 12. Then signal 12 is supplied to gate 16 to inhibit the output given from clock generator 16 from entering counter 17.
COPYRIGHT: (C)1979,JPO&Japio
JP6370778A 1978-05-26 1978-05-26 Common bus control device Expired JPS603227B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6370778A JPS603227B2 (en) 1978-05-26 1978-05-26 Common bus control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6370778A JPS603227B2 (en) 1978-05-26 1978-05-26 Common bus control device

Publications (2)

Publication Number Publication Date
JPS54154946A true JPS54154946A (en) 1979-12-06
JPS603227B2 JPS603227B2 (en) 1985-01-26

Family

ID=13237106

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6370778A Expired JPS603227B2 (en) 1978-05-26 1978-05-26 Common bus control device

Country Status (1)

Country Link
JP (1) JPS603227B2 (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58119069A (en) * 1982-01-06 1983-07-15 Hitachi Ltd Decentralized contention control system
JPS61173367A (en) * 1985-01-29 1986-08-05 Matsushita Electric Ind Co Ltd Microcomputer switching circuit
JPS61236239A (en) * 1985-04-12 1986-10-21 Hitachi Ltd Method for controlling occupancy of bus
JPS6215647A (en) * 1985-07-15 1987-01-24 Fujitsu Ltd Inter-system communication system
JPS63238651A (en) * 1987-03-26 1988-10-04 Nec Corp Data transfer control circuit
JPH01108664A (en) * 1987-10-22 1989-04-25 Fujitsu Ltd Control system for acquiring right of using of bus

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58119069A (en) * 1982-01-06 1983-07-15 Hitachi Ltd Decentralized contention control system
JPH0343658B2 (en) * 1982-01-06 1991-07-03 Hitachi Ltd
JPS61173367A (en) * 1985-01-29 1986-08-05 Matsushita Electric Ind Co Ltd Microcomputer switching circuit
JPH0566626B2 (en) * 1985-01-29 1993-09-22 Matsushita Electric Ind Co Ltd
JPS61236239A (en) * 1985-04-12 1986-10-21 Hitachi Ltd Method for controlling occupancy of bus
JPH0547012B2 (en) * 1985-04-12 1993-07-15 Hitachi Ltd
JPS6215647A (en) * 1985-07-15 1987-01-24 Fujitsu Ltd Inter-system communication system
JPS63238651A (en) * 1987-03-26 1988-10-04 Nec Corp Data transfer control circuit
JPH01108664A (en) * 1987-10-22 1989-04-25 Fujitsu Ltd Control system for acquiring right of using of bus

Also Published As

Publication number Publication date
JPS603227B2 (en) 1985-01-26

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