JPS54146965A - Production of semiconductor device - Google Patents
Production of semiconductor deviceInfo
- Publication number
- JPS54146965A JPS54146965A JP5577178A JP5577178A JPS54146965A JP S54146965 A JPS54146965 A JP S54146965A JP 5577178 A JP5577178 A JP 5577178A JP 5577178 A JP5577178 A JP 5577178A JP S54146965 A JPS54146965 A JP S54146965A
- Authority
- JP
- Japan
- Prior art keywords
- pattern
- convex
- film
- substrate
- region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
Abstract
PURPOSE: To improve an integration density by using the photo mask plate having a pattern, which is protruded with the same thickness as the dimension of difference between a concave and a convex, to perform the light exposure processing when the pattern of a resistor film is formed on the semiconductor substrate having uneven regions.
CONSTITUTION: Base region 2 is formed on Si substrate 1 by diffusion, and SiO2 film 3 and Si3N4 film 4 are laminated and caused to adhere onto all the surface while providing a concave on region 2. Next, negative photo resistor film 5 is applied throughout the surface, and photo mask plate 6 having patterns a, b and c is superposed onto this film 5. At this time, patterns a and c are caused to adhere closely to the convex region of substrate 1, and pattern b is caused to adhere closely to the convex region. Therefore, the thickness of the pattern is set to a=c≪b previously, and further, the thickness of b is made approximately equal to depth t of the convex. The mask plate is constituted in this manner to perform the light exposure processing, so that the incident light can be prevented from entering into the convex, and the substrate is exposed to light as the pattern, and a high-density integration is possible.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5577178A JPS54146965A (en) | 1978-05-10 | 1978-05-10 | Production of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5577178A JPS54146965A (en) | 1978-05-10 | 1978-05-10 | Production of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS54146965A true JPS54146965A (en) | 1979-11-16 |
Family
ID=13008126
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5577178A Pending JPS54146965A (en) | 1978-05-10 | 1978-05-10 | Production of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS54146965A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5710250A (en) * | 1980-06-23 | 1982-01-19 | Seiko Epson Corp | Semiconductor device |
-
1978
- 1978-05-10 JP JP5577178A patent/JPS54146965A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5710250A (en) * | 1980-06-23 | 1982-01-19 | Seiko Epson Corp | Semiconductor device |
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