JPS54146534A - Address conversion system - Google Patents

Address conversion system

Info

Publication number
JPS54146534A
JPS54146534A JP5513578A JP5513578A JPS54146534A JP S54146534 A JPS54146534 A JP S54146534A JP 5513578 A JP5513578 A JP 5513578A JP 5513578 A JP5513578 A JP 5513578A JP S54146534 A JPS54146534 A JP S54146534A
Authority
JP
Japan
Prior art keywords
memory
picture
horizontal
vertical
address designation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5513578A
Other languages
Japanese (ja)
Inventor
Junichi Fujino
Hideto Miyazaki
Koichiro Kurahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP5513578A priority Critical patent/JPS54146534A/en
Publication of JPS54146534A publication Critical patent/JPS54146534A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Memory System (AREA)

Abstract

PURPOSE:To ensure the 1:1 correspondence between the address of each picture element of the picture and the memory cell of the picture memory even in case the memory feturing a square array with the idutical mumber of the vertical and horizontal memory cells against the picture having different numbers between the vertical and horizontal picture elements may be used as the picture memory. CONSTITUTION:Memory I featuring a square array contains the 1K bit of 32 and 32 in the vertical and horizontal directions each, and picture memory II features vertical 28 and horizontal 36 respectively. The upper Am part of memory I is made to oppose to the Ag part of memory II, and the lower Bm part is made to oppose to the Bg part respectively. Vertical address designation bits are indicated by V0-V4, and h0-h5 show the horizontal address designation bits each. In case the maximum bit h5 of the horizontal address designation is 0, i.e., V0-V27 and H0-H31, V0-V4 are connected directly to vertical designation bits V0m-V4m of memory 4; while h0-h4 are connected to the horizontal address designation bits of memory 4 respectively. In case h5 is 1, the Bm part of memory I is selected by the function of inverse gate 1 and others and then converted to the Bg part of picture memory II.
JP5513578A 1978-05-09 1978-05-09 Address conversion system Pending JPS54146534A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5513578A JPS54146534A (en) 1978-05-09 1978-05-09 Address conversion system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5513578A JPS54146534A (en) 1978-05-09 1978-05-09 Address conversion system

Publications (1)

Publication Number Publication Date
JPS54146534A true JPS54146534A (en) 1979-11-15

Family

ID=12990329

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5513578A Pending JPS54146534A (en) 1978-05-09 1978-05-09 Address conversion system

Country Status (1)

Country Link
JP (1) JPS54146534A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2540277A1 (en) * 1983-02-01 1984-08-03 Brion Alain WORDS MEMORY PROVIDED WITH AN ADDRESS TRANSCODING CIRCUIT
JPS6275485A (en) * 1985-09-27 1987-04-07 日立電子エンジニアリング株式会社 Display unit
WO1988001426A1 (en) * 1986-08-11 1988-02-25 N.V. Philips' Gloeilampenfabrieken Integrated semiconductor memory and integrated signal processor having such a memory

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2540277A1 (en) * 1983-02-01 1984-08-03 Brion Alain WORDS MEMORY PROVIDED WITH AN ADDRESS TRANSCODING CIRCUIT
JPS6275485A (en) * 1985-09-27 1987-04-07 日立電子エンジニアリング株式会社 Display unit
WO1988001426A1 (en) * 1986-08-11 1988-02-25 N.V. Philips' Gloeilampenfabrieken Integrated semiconductor memory and integrated signal processor having such a memory
JPH0823996B2 (en) * 1986-08-11 1996-03-06 エヌ・ベー・フィリップス・フルーイランペンファブリケン Aggregation of two or more integrated semiconductor circuits

Similar Documents

Publication Publication Date Title
JPS563499A (en) Semiconductor memory device
GB1477009A (en) Building structures
OA06580A (en) Spherical solar collector, with simplified structure.
JPS54146534A (en) Address conversion system
JPS52129337A (en) Memory circuit
JPS57203154A (en) Microcomputer
JPS53129925A (en) Memory device
IT7830870A0 (en) BIPOLAR DYNAMIC MEMORY CELL.
JPS53139939A (en) Memory addressing method
ES347920A1 (en) Improvements in the construction of foundations for individual or collective houses. (Machine-translation by Google Translate, not legally binding)
JPS5552593A (en) Memory unit
JPS5375786A (en) Semiconductor device
NL186934C (en) STATIC BIPOLAR MEMORY CELL.
JPS5616982A (en) Buffer memory control system
JPS551658A (en) Parity inspection unit
JPS5782288A (en) Dynamic memory
JPS57143794A (en) Memory device
JPS56137568A (en) Decoding circuit for address signal
JPS53115139A (en) Character signal generator
JPS5558874A (en) Information processing system
JPS5421131A (en) Memory unit
JPS5532159A (en) Memory system
Vant-Hull Methods for estimating total flux in the direct solar beam at any time
KR910017640A (en) Highly Integrated Memory Cell and Core Array Structures
WHITE Project Themis summary(Solar radiation effects on upper earth atmosphere)[Final Technical Report, 1 Jul. 1969- 30 Jun. 1973]