JPS54129882A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS54129882A
JPS54129882A JP2895278A JP2895278A JPS54129882A JP S54129882 A JPS54129882 A JP S54129882A JP 2895278 A JP2895278 A JP 2895278A JP 2895278 A JP2895278 A JP 2895278A JP S54129882 A JPS54129882 A JP S54129882A
Authority
JP
Japan
Prior art keywords
film
silicide layer
scribing
substrate
sio
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2895278A
Other languages
Japanese (ja)
Inventor
Nobuyuki Yamamichi
Koichiro Takahata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP2895278A priority Critical patent/JPS54129882A/en
Publication of JPS54129882A publication Critical patent/JPS54129882A/en
Pending legal-status Critical Current

Links

Landscapes

  • Dicing (AREA)

Abstract

PURPOSE: To avoid the scaling to the silicide layer even with laser scribing, by taking the construction that the silicide layer such as Pt provided on the Si substrate is covered with the SiO2 film for the constitution of scribing region.
CONSTITUTION: The part on the scribing region 5 is removed by coating the SiO2 film 2 on the Si substrate 1 and the part on the substrate 1 exposed is formed by the Pt silicide layer 4. Next, new SiO2 film 3 is coated on the entire surface, and the scribing groove 6 is made at the region 5 by using laser while providing the film 3. Thus, the trash of Si caused in scribing is not caused on the silicide layer 4 and non-defective element rate can not be decreased. Further, the silicide layer is not limited to Pt and it can be Co, Mo, Cr, Pd, Ni, Ti, Ta, W, and the protective film can be Si3N4 or organic film.
COPYRIGHT: (C)1979,JPO&Japio
JP2895278A 1978-03-13 1978-03-13 Semiconductor device Pending JPS54129882A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2895278A JPS54129882A (en) 1978-03-13 1978-03-13 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2895278A JPS54129882A (en) 1978-03-13 1978-03-13 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS54129882A true JPS54129882A (en) 1979-10-08

Family

ID=12262738

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2895278A Pending JPS54129882A (en) 1978-03-13 1978-03-13 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS54129882A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6228766B1 (en) 1997-01-23 2001-05-08 Nec Corporation Process for fabricating semiconductor device without separation between silicide layer and insulating layer

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4933907A (en) * 1972-07-28 1974-03-28

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4933907A (en) * 1972-07-28 1974-03-28

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6228766B1 (en) 1997-01-23 2001-05-08 Nec Corporation Process for fabricating semiconductor device without separation between silicide layer and insulating layer
KR100294131B1 (en) * 1997-01-23 2001-07-12 가네꼬 히사시 Process for fabricating semiconductor device without separation between silicide layer and insulating layer

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