JPS54129845A - Buffer unit for bidirectional data line - Google Patents

Buffer unit for bidirectional data line

Info

Publication number
JPS54129845A
JPS54129845A JP3680178A JP3680178A JPS54129845A JP S54129845 A JPS54129845 A JP S54129845A JP 3680178 A JP3680178 A JP 3680178A JP 3680178 A JP3680178 A JP 3680178A JP S54129845 A JPS54129845 A JP S54129845A
Authority
JP
Japan
Prior art keywords
gate
signal
low
data line
buffer unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3680178A
Other languages
Japanese (ja)
Inventor
Katsuzo Sakai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP3680178A priority Critical patent/JPS54129845A/en
Publication of JPS54129845A publication Critical patent/JPS54129845A/en
Pending legal-status Critical Current

Links

Landscapes

  • Information Transfer Systems (AREA)
  • Bidirectional Digital Transmission (AREA)
  • Small-Scale Networks (AREA)

Abstract

PURPOSE: To make unnecessary the control signal for the changeover of the direction of transmission and reception, through the simple constitution so that the switching of the transmission and reception gate with one FF can be controlled.
CONSTITUTION: FF7 consisting of the NOR gates 6A and 6B is provided. When signal is present at A side which is at low level, the output of the gate 6B is low and that of 6A is high, setting FF7. Accordingly, the NAND gate 5A is ON and the low signal is outputted at B. That is, the low signal is delivered from A to B. Conversely, when a signal is present at first and it is low level, the output of the gate 6B is High, setting FF7. Accordingly, the gate 5B is ON and the gate 5A keeps OFF, causing the low signal from B to A delivered.
COPYRIGHT: (C)1979,JPO&Japio
JP3680178A 1978-03-31 1978-03-31 Buffer unit for bidirectional data line Pending JPS54129845A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3680178A JPS54129845A (en) 1978-03-31 1978-03-31 Buffer unit for bidirectional data line

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3680178A JPS54129845A (en) 1978-03-31 1978-03-31 Buffer unit for bidirectional data line

Publications (1)

Publication Number Publication Date
JPS54129845A true JPS54129845A (en) 1979-10-08

Family

ID=12479881

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3680178A Pending JPS54129845A (en) 1978-03-31 1978-03-31 Buffer unit for bidirectional data line

Country Status (1)

Country Link
JP (1) JPS54129845A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5696562A (en) * 1979-12-28 1981-08-04 Fujitsu Ltd Connection circuit for transmission line
JPS581271A (en) * 1981-06-26 1983-01-06 Fujitsu Ltd Operation processing device
JPS58166842A (en) * 1982-03-27 1983-10-03 Nec Corp Signal controller
JPS63153787A (en) * 1986-12-18 1988-06-27 Fujitsu Ltd Two-way semiconductor device
JPH0324609A (en) * 1989-06-21 1991-02-01 Mitsuba Electric Mfg Co Ltd Buffer ic for input/output
JPH04124751A (en) * 1990-09-17 1992-04-24 Toshiba Corp Data transfer system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52153313A (en) * 1976-06-14 1977-12-20 Sanyo Electric Co Ltd Two-way digital amplifier circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52153313A (en) * 1976-06-14 1977-12-20 Sanyo Electric Co Ltd Two-way digital amplifier circuit

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5696562A (en) * 1979-12-28 1981-08-04 Fujitsu Ltd Connection circuit for transmission line
JPS581271A (en) * 1981-06-26 1983-01-06 Fujitsu Ltd Operation processing device
JPS58166842A (en) * 1982-03-27 1983-10-03 Nec Corp Signal controller
JPS63153787A (en) * 1986-12-18 1988-06-27 Fujitsu Ltd Two-way semiconductor device
JPH0422314B2 (en) * 1986-12-18 1992-04-16 Fujitsu Ltd
JPH0324609A (en) * 1989-06-21 1991-02-01 Mitsuba Electric Mfg Co Ltd Buffer ic for input/output
JPH04124751A (en) * 1990-09-17 1992-04-24 Toshiba Corp Data transfer system

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