JPS5741728A - Controlling system of data transfer - Google Patents

Controlling system of data transfer

Info

Publication number
JPS5741728A
JPS5741728A JP11695280A JP11695280A JPS5741728A JP S5741728 A JPS5741728 A JP S5741728A JP 11695280 A JP11695280 A JP 11695280A JP 11695280 A JP11695280 A JP 11695280A JP S5741728 A JPS5741728 A JP S5741728A
Authority
JP
Japan
Prior art keywords
reset
gate
signal
reset signal
data transfer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11695280A
Other languages
Japanese (ja)
Inventor
Mikio Hagiwara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP11695280A priority Critical patent/JPS5741728A/en
Publication of JPS5741728A publication Critical patent/JPS5741728A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/24—Resetting means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)

Abstract

PURPOSE:To prevent the destruction of data during its transfer, ranking reset signals. CONSTITUTION:In case a hard reset signal is delivered, it is immediately turned into a reset signal through an OR gate 40 to reset an external storage device 3. In case a soft reset signal is delivered, an AND is obtained between the soft reset signal and the transfer unit end signal through an AND gate 30. The output signal sent from the gate 30 is turned into a reset signal through the gate 40 to reset the device 3.
JP11695280A 1980-08-27 1980-08-27 Controlling system of data transfer Pending JPS5741728A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11695280A JPS5741728A (en) 1980-08-27 1980-08-27 Controlling system of data transfer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11695280A JPS5741728A (en) 1980-08-27 1980-08-27 Controlling system of data transfer

Publications (1)

Publication Number Publication Date
JPS5741728A true JPS5741728A (en) 1982-03-09

Family

ID=14699791

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11695280A Pending JPS5741728A (en) 1980-08-27 1980-08-27 Controlling system of data transfer

Country Status (1)

Country Link
JP (1) JPS5741728A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10368070B2 (en) 2010-12-09 2019-07-30 Velos Media, Llc Image processing device and image processing method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10368070B2 (en) 2010-12-09 2019-07-30 Velos Media, Llc Image processing device and image processing method
US10499057B2 (en) 2010-12-09 2019-12-03 Velos Media, Llc Image processing device and image processing method

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