JPS58166842A - Signal controller - Google Patents

Abstract

PURPOSE:To convert easily a piece of bi-directional bus into two pieces of buses for transmission and reception respectively, by inhibiting the output of a transmitting signal with the output of an FF which is set by a receiving signal and reset by a tansmitting signal. CONSTITUTION:An FF and an FF' are provided between lines A and A' for a data transmitting terminal which uses an open collector output to a data output and shares the lines A and A' for transmission and reception. The FF and FF' are set when a low level is fed to line receivers R2 and R2', respectively, and line drivers D2 and D2' are inhibited with the outputs of the R2 and R2' to prevent a low level from returning to the remote side. The FF and FF' are reset when the lines A and A' are set a high level respectively to release the inhibition of drivers D2 and D2'. Thus signals of high levels are transmitted in both ways. In this case, a change is possible for a signal of a low level since a low level has higher priority than a high level.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a bidirectional data transmission path that outputs an open collector of a gate circuit, and particularly relates to a bidirectional data transmission path in which the signal line used is
This invention relates to a device for converting a bidirectional bus into two separate buses for transmission and reception.

As a circuit type for performing bidirectional data transmission using one signal line, there is a method in which an open collector of a gate circuit is used as an output. In a bidirectional transmission line that forms a bidirectional bus with this output.

Since the open collector is the output, as will be explained in detail later, the impedance changes greatly depending on whether the transistor is on or off, so if the transmission path is made long, the signal may not be transmitted correctly due to signal reflection. Therefore, even if the bidirectional bus transmission line has been used without problems until now, if for some reason it becomes necessary to increase the distance between the two end stations, depending on the degree of extension, it may be necessary to It may become impossible to send or receive signals.

It goes without saying that in order to solve this problem, you can separate the bidirectional signals and use separate lines for sending and receiving, but if you want to make use of the equipment you have been using, There is one problem. It is necessary to identify which terminal station is transmitting on a bidirectional bus and control accordingly.

Therefore, an object of the present invention is to provide a device for controlling a signal line when converting a data transmission line using a bidirectional bus with an open collector as an output into a data transmission line using separate signal lines for sending and receiving. be.

According to the present invention, there is provided a device that uses an open collector output as a data output and converts a signal line used for both transmission and reception of a data transmission terminal that uses one signal line for both transmission and reception into separate signal lines for transmission and reception.

A signal control device is obtained, comprising a flip-flop that is set by a received signal and reset by a transmitted signal, and means for inhibiting the output of the transmitted signal based on the set output of the flip-flop.

Next, a detailed explanation will be given with reference to the drawings.

FIG. 1 is a diagram showing an example of the configuration of a bidirectional transmission line driven by a conventional open collector. Since the terminals on both sides of the transmission line in Figure 1 have the same configuration, they are denoted by common symbols, and SD is the transmission data,
RD is received data, DI is a drive circuit with open collector output, R1 is a receiving circuit, Ra and R1)
indicates the signal input/output resistance network. Since priority is given to the state having such a configuration, the cost becomes considerably high when both the drive circuits D1 of both signal lines are turned off. Therefore, as mentioned above, if the transmission distance becomes long, there may be cases where the correct signal cannot be transmitted.

In the above, it is necessary to identify whether signals are to be transmitted and received separately between the two lines between the signal lines AA', and to control the signal lines based on this identification.

2 is a block diagram showing the basic configuration of the signal control device of the present invention; FIG. The device shown in FIG. 2 will be described as being inserted between the signal lines AA' in the device shown in FIG.

Signals from A and A' are sent to line drivers D2 and D, respectively.
2' and is transmitted to the other party through line receivers R2 and R2'.

However, when a LOW level signal is input from A that turns on the transistor, line driver D2
The signal is transmitted to A' through R2, but from the signal fdA' side it returns to A through line drivers D2' and R2'. Now the device is D2°D2', R2
, R2' alone.

In other words, there are no flip-flops FF and FF', and only the first
The transmission line of the conventional device shown in the figure is changed to two lines to create a line receiver R.
If only line driver D is provided, as mentioned above, the LOW level is prioritized, so even if A is turned off and becomes HIGH level, the LOW level will return from the A/ side. A is HIGH because
Therefore, the signal state of A-A' becomes LO.
Fixed at W level.

In the present invention, clip-flops FF and FF' are added to avoid the above situation. Flip-flops FF and FF' are line receivers R2 and R2
' is set when a LOW level is input to line driver D2. D2' is prohibited and L
The OW level prohibits returning to the opponent's side. A, A
When ' is HIGH level, flip-flop FF, FF
' is reset and line driver D2. The ban on D2' has been lifted.

HIGH level signals are transmitted in both directions. In this case, an apparently HIGH level signal will not be returned.
Since GH level does not have priority over LOW level,
When a LOW level is input, a change to the LOW level is possible. In other words, LOW from line driver D2
The level is transmitted to the other party and the other party's line receiver R
21C is included. At that point, the flip-flop FF is set and the line driver D2' on the other side is prohibited. Then, the LOW level signal is transmitted to the other party via line receiver R2, but since the line receiver D2' is prohibited, the LOW level signal does not return, and the LOW level signal
It never enters a level state.

FIG. 6 is a diagram showing the A side half of the configuration of a specific example of the present invention. In Figure 6, RaRb is an input/output resistor network, D3 is a line driver with open collector output, R3 is a line receiver, G1 is a gate that inhibits signal return), and G2 and 03 are gates that are OFF in Figure 2. G4 constitutes a flip-flop with the function G2. G3
In the above configuration, A is set to HIGH level, and G2 is set to HIGH level. Since the line receiver R3 of the gate G1 is LOW, a HIGH level is output to B. Next, when A goes to LOW level.

Line l/seiver R3 output becomes HIGH, and G2
．． The game signal of the flip-flop composed of G3 is BV
c will be transmitted.

When a LOW level signal is input from C on the other side, G
2. The flip-flop of G3 is inverted and the output of G2 becomes LOW, and accordingly the output of G1 becomes H.
Becomes IGH. Further, the LOW level signal from gate G5. It is output as A K LOW level through line driver D3. This LOW level output is output from line receiver R5 and becomes HIGH, but since the LOW level is input to gate G1 from gate G2, it becomes HIGH.
The IGH level will be maintained and a return to the LOW level will be prohibited. Gate G4 is used to prevent an erroneous state in which the output of gate G3 becomes HIGH when the C input is HIGH. Although the above explanation has been made regarding the A' half of the figure, the same can be said about the A' half, which is not shown in the figure.

As can be seen from the above description, according to the present invention, bidirectional signal separation control can be easily performed with a simple logic circuit configuration.

[Brief explanation of drawings]

FIG. 1 is a diagram showing an example of the configuration of a conventional bidirectional transmission line driven by an open collector, FIG. 2 is a block diagram showing the basic configuration of the signal control device of the present invention, and FIG. FIG. 2 is a diagram showing a specific example of a signal control device. Explanation of symbols: A, A' are points on the line, B and C are lines, D is line driver, FF is flip-flop, G
is the gate and R is the line receiver. Ra and Rh represent resistance networks, respectively.

Claims (1)

[Claims] 1. A device that uses open collector output as data output and converts a signal line used for both sending and receiving in a data transmission terminal that uses one signal line for both sending and receiving into separate signal lines for sending and receiving, and is tessetted by the received signal and transmits. 1. A signal control device comprising: a Sarel flip-flop that is reset by a signal; and means for inhibiting the output of a transmission signal by a set output of the flip-flop.