JPH0422314B2 - - Google Patents

Description

[Detailed description of the invention]

[Summary] A changeover switch is provided between an internal input/output port and an external port of a unidirectional internal circuit, for example, a first-in/first-out FIFO, and the changeover switch is connected to at least two ports that originally exist without providing a special external port. This device enables bidirectional data transfer within one chip by controlling according to the change order of signals of two external ports, thereby reducing the mounting area and simplifying wiring. [Industrial Application Field] The present invention relates to a bidirectional semiconductor device that enables a unidirectional circuit such as a FIFO to perform bidirectional data transfer. [Prior art] In general, a two-port buffer (chip) such as a FIFO, last-in/first-out LIFO, or shift register has an input port and an output port, and allows unidirectional data transfer from the input port to the output port. Conventionally, each terminal corresponding to these input ports and external ports is fixed. For example, in the case of FIFO, as shown in Figure 9,
Write control signal is input to pin 1, input data IN
(I ₀ - I ₈ ) are sent to the 2nd - 6th pins and 24th - 27th pins, the read control signal is sent to the 15th pin, and the output data OUT (O ₀ - O ₈ ) is sent to the 9th - 13th pins and 16th
~ Fixed to pin 19. Note that V _cc and V _ss are power supplies, and other pins are full and empty.
etc. When performing bidirectional data transfer using a unidirectional FIFO with fixed input and output pins as described above, two
Connect FIFO, and use FIFO for data transfer from A to B.
1, and on the other hand, for data transfer from B to A
This was done using FIFO2. [Problems to be Solved by the Invention] However, when the bidirectional device is configured as shown in FIG. 10, the mounting area on the printed board doubles due to the increase in the number of chips used, and the input/output I/O on the printed board increases. There was a problem that the O wiring became complicated. It should be noted that the complication of the I/O wiring also causes a decrease in printed board mounting density due to an increase in the area occupied by the I/O wiring, and a deterioration of electrical characteristics due to an increase in the stray capacitance of the wiring. SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a bidirectional semiconductor device that reduces the mounting area on a printed board and simplifies I/O wiring. [Means for solving the problem] A means for solving the above-mentioned problem is shown in FIG. In Figure 1, the unidirectional internal circuit includes an internal input port IN, an internal input control port that controls this internal input port, and an internal output port.
OUT, and the internal output control port that controls this internal output port. For the internal input/output ports IN and OUT, an external input/output port I/O (A) on the A side and an external input/output port I/O (B) on the B side are provided, and the connection between these is the first It is switched by the switching means. On the other hand, for the internal input/output control port, an external input/output control port (A) on the A side and an external output control port (B) on the B side are provided, and the connection between them is made by the second switching means. It can be switched accordingly. The mode setting of the first and second switching means is performed by the mode signal M of the mode setting means, which is applied to two external input/output control ports, for example (A) and (B). A mode signal M is generated using the change order of the signals. [Operation] According to the above-mentioned means, the A side input/output port I/O
(A) → Internal circuit → B side input/output port I/O (B)
data transfer and B side input/output port I/O (B)
→ Internal circuit → A side input/output port I/O (A) data transfer is switched by the first and second switching means, and the modes of the first and second switching means are switched. Settings are originally performed according to signals from the necessary external input/output control ports (A) and (B), and no special ports are required. [Embodiment] FIG. 2 is a circuit diagram showing an embodiment of a bidirectional semiconductor device according to the present invention. The dash-dotted line frame in FIG. 2 indicates one chip. This chip has only one unidirectional internal circuit, such as a FIFO.
There are internal ports such as write control port, read control port, input port IN, output port
OUT etc. are provided. In addition, there are external ports on the A side, such as a write/read control port (A), for connection to the outside around the chip.
An input/output port I/O (A) and an external port on the B side, such as a write/read control port (B), an input/output port I/O (B), etc. are provided. And external port (A), W/R
A first switch is connected between (B) and internal port W.
SW ₁ is provided, external port (A),
A second switch SW ₂ is provided between R(B) and the internal port, and external ports I/O(A), I/O
A third switch SW ₃ is provided between O(B) and internal port IN, and external port I/O(A), I/O
A fourth switch _SW4 is provided between O(B) and the internal port OUT. These switches
SW ₁ to SW ₄ are mode signals M of mode setting circuit SC
operate simultaneously. In addition, the internal ports IN, OUT, and
External ports I/O (A) and I/O (B) actually have a multi-bit configuration, for example, 9 bits as shown in FIG. 9, but for the sake of simplicity, they are assumed to have a 1-bit configuration. Although not shown, the FIFO has a port for applying a reset signal. Referring to Figure 3, the mode setting circuit SC in Figure 2
Explain. The mode setting circuit SC is composed of two RS flip-flops FF1 and FF2, each of which
RS flip-flops FF1 and FF2 are constructed as shown in FIG. Here, flipflop
In FF1, the set terminal S receives the power supply V _cc , the reset terminal R receives the ground potential, the clear terminal CL receives the reset signal, and the clock terminal CK receives the signal from the A side input/output control port (A), respectively.
is being applied. And flipflop FF
1 (= ₁ ) is supplied to the NAND circuit _G1 together with the signal of the B-side input/output control port W/R (B), and as a result, a signal φ is generated. In flip-flop FF2, the set terminal S is connected to the power supply _Vcc , the reset terminal R is connected to the ground potential, the clear terminal CL is connected to the reset signal, and the clock terminal is connected to the ground potential.
A signal φ is applied to each CK. Then, the output of flip-flop FF2 becomes mode signal M. Therefore, as shown in Figure 5A, after the FIFO is reset (="0"), the pulse at the A side input/output control port (A) precedes the pulse at the B side input/output control port W/R (B). Then, the mode signal M is held at high level (“1”). On the other hand,
As shown in Figure 5B, after resetting the FIFO (RS
When the pulse at the B-side input/output control port (B) precedes the pulse at the A-side input/output control port (A) at T=“0”), the mode signal M changes to a low level (“0”). In this way, a desired mode signal M is generated inside the chip by inputting to an existing external port without adding a special external port. In FIG. 3, the two flip-flops FF1 and FF2 are reset (cleared) by the reset signal, but the flip-flop
By appropriately setting the circuit constants of FF1 and FF2, a reset operation can be performed automatically upon application of power. In this case as well, the mode signal M is set depending on whether the preceding pulse is applied to either the A-side input/output control port (A) or the B-side input/output control port (B) after power is applied. Furthermore, in the circuit of FIG. 3, it is particularly meaningful for FIFO to determine that the side to which the voltage is applied first among ports (A) and (B) is the write side. In other words, in the FIFO, after a reset, it is meaningless to read unwritten data, so a write command is usually applied before a read command. Each of the switches SW ₁ to _{SW 4} in FIG. 2 will be explained with reference to FIGS. 6A to 6D. As shown in FIG. 6A, the switch SW ₁ is composed of NAND circuits G ₁₁ , G ₁₂ , G ₁₃ and an inverter I ₁₁ , and therefore, when the mode signal M is “1”,
W/R (A) is input to the write control port of the FIFO, and on the other hand, when the mode signal M is "0", (B) is input to the write control port of the FIFO. Similarly, as shown in FIG. 6B, switch SW ₂
is composed of NAND circuits G ₂₁ , G ₂₂ , G ₂₃ and an inverter I ₂ . Therefore, when the mode signal M is “1”, (B) is input to the read control port of the FIFO, and on the other hand, the mode signal M When is "0", (A) is input to the read control port of the FIFO. Similarly, as shown in Figure 6C, switch SW ₃
is composed of NAND circuits G ₃₁ , G ₃₂ , G ₃₃ and inverter I ₃ . Therefore, when mode signal M is “1”, I/O (A) is the input data port of FIFO.
On the other hand, when the mode signal M is "0", I/O (B) is input to the input data port IN of the FIFO. In addition, as shown in Figure 6D, switch SW ₄
is composed of NAND circuits G ₄₁ , G ₄₂ , G ₄₃ , G ₄₄ , inverters I ₄ to I ₈ , and CMOS buffers BF ₁ and BF ₂ . Therefore, when the mode signal M is "1", the lower circuit in FIG. '', the upper circuit in FIG. 6D operates and the data at the output data port OUT is sent to the port I/O (A). To summarize the above,

〔Effect of the invention〕

As explained above, according to the present invention, a bidirectional semiconductor device is configured with only one unidirectional circuit,
Furthermore, since bidirectional data transfer is controlled by signals generated within the chip, the mounting area on the printed board can be reduced and the wiring can be simplified.

[Brief explanation of drawings]

1 is a diagram showing the basic configuration of the present invention, FIG. 2 is a circuit diagram showing an embodiment of the bidirectional semiconductor device according to the present invention, FIG. 3 is a circuit diagram of the mode setting circuit of FIG. 2, 4 is a circuit diagram of the flip-flop shown in FIG. 3, FIGS. 5A and 5B are timing diagrams explaining the circuit operation of FIG. 3, and FIGS.
Detailed logic circuit diagram of the switch shown in Figure 7.
Figure 8 is a timing diagram for explaining the circuit operation of Figure 7, Figure 9 is an overview diagram showing a conventional unidirectional device, and Figure 10 is a conventional bidirectional circuit diagram. FIG. FIFO: First-in/first-out (unidirectional circuit), SC: Mode setting circuit, IN,
OUT,,: Internal port, (A),
R (B), I/O (A), I/O (B): External port,
SW ₁ to _{SW 4} : Switch.

Claims (1)

[Claims] 1. Internal input port IN, internal output port OUT,
a unidirectional internal circuit having an internal write control port () and an internal read control port (); first and second external input/output ports I/O (A);
I/O (B); first and second external input/output control ports (A) that can be selectively connected to the internal write control port () or the internal read control port;
W/R (B), and connecting the internal input port to one of the first and second external input/output ports according to the mode setting,
a first switching means for connecting the internal output port to the other; and selectively connecting the first and second external input/output control ports to the internal write control port and the internal read control port according to a mode setting. Second to do
switching means; and mode setting means for setting the mode of the first and second switching means according to the input order of external control signals to the first and second external input/output control ports after power application or initial setting. The mode setting means sets the first and second ports so that the port that first receives the write signal as the external control signal becomes the write-side port after power is applied or initial settings are made. A bidirectional semiconductor device characterized by controlling switching means.