JPS5384632A - Output*input cache system - Google Patents

Output*input cache system

Info

Publication number
JPS5384632A
JPS5384632A JP15461877A JP15461877A JPS5384632A JP S5384632 A JPS5384632 A JP S5384632A JP 15461877 A JP15461877 A JP 15461877A JP 15461877 A JP15461877 A JP 15461877A JP S5384632 A JPS5384632 A JP S5384632A
Authority
JP
Japan
Prior art keywords
output
cache system
input cache
input
cache
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15461877A
Other languages
English (en)
Other versions
JPS6133217B2 (ja
Inventor
Kooru Jieimu
Daburiyuu Shierubaagu Roorensu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Italia SpA
Original Assignee
Honeywell Information Systems Italia SpA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Information Systems Italia SpA filed Critical Honeywell Information Systems Italia SpA
Publication of JPS5384632A publication Critical patent/JPS5384632A/ja
Publication of JPS6133217B2 publication Critical patent/JPS6133217B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0888Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using selective caching, e.g. bypass

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Multi Processors (AREA)
  • Bus Control (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
JP15461877A 1976-12-30 1977-12-23 Output*input cache system Granted JPS5384632A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/755,871 US4075686A (en) 1976-12-30 1976-12-30 Input/output cache system including bypass capability

Publications (2)

Publication Number Publication Date
JPS5384632A true JPS5384632A (en) 1978-07-26
JPS6133217B2 JPS6133217B2 (ja) 1986-08-01

Family

ID=25041015

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15461877A Granted JPS5384632A (en) 1976-12-30 1977-12-23 Output*input cache system

Country Status (7)

Country Link
US (1) US4075686A (ja)
JP (1) JPS5384632A (ja)
AU (1) AU509939B2 (ja)
CA (1) CA1105147A (ja)
DE (1) DE2755897A1 (ja)
FR (1) FR2376465A1 (ja)
GB (1) GB1596519A (ja)

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JPS55154649A (en) * 1979-05-22 1980-12-02 Nec Corp Disc cash write-in system
JPS55154648A (en) * 1979-05-22 1980-12-02 Nec Corp Disc cash control system
JPS564857A (en) * 1979-06-25 1981-01-19 Hitachi Ltd Access system for memory unit
JPS5667430A (en) * 1979-11-07 1981-06-06 Toshiba Corp Dma control device
JPS5876957A (ja) * 1981-10-15 1983-05-10 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション 記憶階層制御方法
US6529996B1 (en) 1997-03-12 2003-03-04 Storage Technology Corporation Network attached virtual tape data storage subsystem
US6658526B2 (en) 1997-03-12 2003-12-02 Storage Technology Corporation Network attached virtual data storage subsystem
US6834324B1 (en) 2000-04-10 2004-12-21 Storage Technology Corporation System and method for virtual tape volumes
US6925525B2 (en) 1998-07-06 2005-08-02 Storage Technology Corporation Data storage management system and method
US7114013B2 (en) 1999-01-15 2006-09-26 Storage Technology Corporation Intelligent data storage manager

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US4246637A (en) * 1978-06-26 1981-01-20 International Business Machines Corporation Data processor input/output controller
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GB2037038B (en) * 1978-12-11 1983-05-05 Honeywell Inf Systems Cache storage systems
US4208716A (en) * 1978-12-11 1980-06-17 Honeywell Information Systems Inc. Cache arrangement for performing simultaneous read/write operations
US4225922A (en) * 1978-12-11 1980-09-30 Honeywell Information Systems Inc. Command queue apparatus included within a cache unit for facilitating command sequencing
CA1119307A (en) * 1978-12-15 1982-03-02 Guenther K. Machol Microcomputer having separate bit and word accumulators and separate bit and word instruction sets
US4868734A (en) * 1984-04-30 1989-09-19 Unisys Corp. Variable rate improvement of disc cache subsystem
US5371855A (en) * 1979-06-04 1994-12-06 Unisys Corporation Disc cache subsystem having plural-level cache memories
US5241666A (en) * 1979-06-04 1993-08-31 Unisys Corporation Variable rate improvement of disc cache subsystem
US4371929A (en) * 1980-05-05 1983-02-01 Ibm Corporation Multiprocessor system with high density memory set architecture including partitionable cache store interface to shared disk drive memory
US4394732A (en) * 1980-11-14 1983-07-19 Sperry Corporation Cache/disk subsystem trickle
US4392201A (en) * 1980-12-31 1983-07-05 Honeywell Information Systems Inc. Diagnostic subsystem for a cache memory
US4410944A (en) * 1981-03-24 1983-10-18 Burroughs Corporation Apparatus and method for maintaining cache memory integrity in a shared memory environment
US4445174A (en) * 1981-03-31 1984-04-24 International Business Machines Corporation Multiprocessing system including a shared cache
CA1187198A (en) * 1981-06-15 1985-05-14 Takashi Chiba System for controlling access to channel buffers
JPS5856277A (ja) * 1981-09-29 1983-04-02 Toshiba Corp 情報処理装置ならびに方法
US4500954A (en) * 1981-10-15 1985-02-19 International Business Machines Corporation Cache bypass system with post-block transfer directory examinations for updating cache and/or maintaining bypass
US4466059A (en) * 1981-10-15 1984-08-14 International Business Machines Corporation Method and apparatus for limiting data occupancy in a cache
US4476526A (en) * 1981-11-27 1984-10-09 Storage Technology Corporation Cache buffered memory subsystem
US4780808A (en) * 1981-11-27 1988-10-25 Storage Technology Corporation Control of cache buffer for memory subsystem
US4571674A (en) * 1982-09-27 1986-02-18 International Business Machines Corporation Peripheral storage system having multiple data transfer rates
WO1984002017A1 (en) * 1982-11-15 1984-05-24 Storage Technology Corp Control of cache buffer for memory subsystem
US4547851A (en) * 1983-03-14 1985-10-15 Kurland Lawrence G Integrated interactive restaurant communication method for food and entertainment processing
US4586133A (en) * 1983-04-05 1986-04-29 Burroughs Corporation Multilevel controller for a cache memory interface in a multiprocessing system
US4635194A (en) * 1983-05-02 1987-01-06 International Business Machines Corporation Instruction buffer bypass apparatus
DE3502147A1 (de) * 1984-01-23 1985-08-08 Hitachi Microcomputer Engineering Ltd., Kodaira, Tokio/Tokyo Datenverarbeitungssystem mit verbesserter pufferspeichersteuerung
US4740889A (en) * 1984-06-26 1988-04-26 Motorola, Inc. Cache disable for a data processor
CA1233271A (en) * 1984-06-26 1988-02-23 David S. Mothersole Cache disable for a data processor
JPH0630075B2 (ja) * 1984-08-31 1994-04-20 株式会社日立製作所 キャッシュメモリを有するデータ処理装置
US4663742A (en) * 1984-10-30 1987-05-05 International Business Machines Corporation Directory memory system having simultaneous write, compare and bypass capabilites
US4636990A (en) * 1985-05-31 1987-01-13 International Business Machines Corporation Three state select circuit for use in a data processing system or the like
US4821185A (en) * 1986-05-19 1989-04-11 American Telephone And Telegraph Company I/O interface system using plural buffers sized smaller than non-overlapping contiguous computer memory portions dedicated to each buffer
JP2965987B2 (ja) * 1988-02-22 1999-10-18 株式会社日立製作所 データ処理システム
US5034885A (en) * 1988-03-15 1991-07-23 Kabushiki Kaisha Toshiba Cache memory device with fast data-write capacity
DE3812858A1 (de) * 1988-04-18 1989-10-26 Siemens Ag Verfahren zur kennzeichnung ungueltiger eintraege in einem speicher, insbesondere in einem cache-speicher, und anordnung zur durchfuehrung des verfahrens
US4905141A (en) * 1988-10-25 1990-02-27 International Business Machines Corporation Partitioned cache memory with partition look-aside table (PLAT) for early partition assignment identification
US5201041A (en) * 1988-12-29 1993-04-06 International Business Machines Corporation Cache bypass apparatus
US5161219A (en) * 1989-01-13 1992-11-03 International Business Machines Corporation Computer system with input/output cache
US5287482A (en) * 1989-01-13 1994-02-15 International Business Machines Corporation Input/output cache
GB2228116B (en) * 1989-02-10 1993-05-26 Intel Corp Pipelined floating-point load instruction for microprocessor
US5067078A (en) * 1989-04-17 1991-11-19 Motorola, Inc. Cache which provides status information
US5247639A (en) * 1989-06-20 1993-09-21 Nec Corporation Microprocessor having cache bypass signal terminal
US4998221A (en) * 1989-10-31 1991-03-05 International Business Machines Corporation Memory by-pass for write through read operations
JP2826857B2 (ja) 1989-12-13 1998-11-18 株式会社日立製作所 キャッシュ制御方法および制御装置
DE69025302T2 (de) * 1989-12-22 1996-10-02 Digital Equipment Corp Hochleistungsrasterpuffer- und -cachespeicheranordnung
US5838946A (en) * 1990-04-14 1998-11-17 Sun Microsystems, Inc. Method and apparatus for accomplishing processor read of selected information through a cache memory
US5488709A (en) * 1990-06-27 1996-01-30 Mos Electronics, Corp. Cache including decoupling register circuits
US5732241A (en) * 1990-06-27 1998-03-24 Mos Electronics, Corp. Random access cache memory controller and system
US5247447A (en) * 1990-10-31 1993-09-21 The Boeing Company Exception processor system
US5446850A (en) * 1991-01-15 1995-08-29 International Business Machines Corporation Cross-cache-line compounding algorithm for scism processors
US5454093A (en) * 1991-02-25 1995-09-26 International Business Machines Corporation Buffer bypass for quick data access
US5293603A (en) * 1991-06-04 1994-03-08 Intel Corporation Cache subsystem for microprocessor based computer system with synchronous and asynchronous data path
US5319760A (en) * 1991-06-28 1994-06-07 Digital Equipment Corporation Translation buffer for virtual machines with address space match
JPH07122864B2 (ja) * 1991-07-22 1995-12-25 インターナショナル・ビジネス・マシーンズ・コーポレイション データ処理システム、データ処理システムに使用するインターフエース回路及びデータ・プロセツサ間の通信方法
US5371872A (en) * 1991-10-28 1994-12-06 International Business Machines Corporation Method and apparatus for controlling operation of a cache memory during an interrupt
JPH07504527A (ja) * 1992-03-09 1995-05-18 オースペックス システムズ インコーポレイテッド 高性能の不揮発性ram保護式の書き込みキャッシュアクセラレータシステム
DE4323929A1 (de) * 1992-10-13 1994-04-14 Hewlett Packard Co Software-geführtes Mehrebenen-Cache-Speichersystem
US5551000A (en) * 1993-03-18 1996-08-27 Sun Microsystems, Inc. I/O cache with dual tag arrays
US5550998A (en) * 1993-06-14 1996-08-27 Storage Technology Corporation Pre-seeking process for enhancing reading and writing performance in a mass storage system having multiple individual disk drives
JPH07160582A (ja) * 1993-12-06 1995-06-23 Mitsubishi Electric Corp キャッシュバッファを有するデータ処理装置
GB2286910B (en) * 1994-02-24 1998-11-25 Intel Corp Apparatus and method for prefetching data to load buffers in a bridge between two buses in a computer
EP0782079A1 (en) * 1995-12-18 1997-07-02 Texas Instruments Incorporated Burst access in data processing systems
US6272599B1 (en) * 1998-10-30 2001-08-07 Lucent Technologies Inc. Cache structure and method for improving worst case execution time
US7010575B1 (en) * 2000-03-31 2006-03-07 Emc Corporation Data storage system having separate data transfer section and message network having bus arbitration
EP1275046B1 (en) * 2000-04-12 2010-10-06 DSP Group Switzerland AG Data processing circuit with a cache memory and apparatus containing such a circuit
US9131899B2 (en) 2011-07-06 2015-09-15 Apple Inc. Efficient handling of misaligned loads and stores
JP5008845B2 (ja) * 2005-09-01 2012-08-22 株式会社日立製作所 ストレージシステムとストレージ装置及びその制御方法
JP4295815B2 (ja) * 2006-03-24 2009-07-15 富士通株式会社 マルチプロセッサシステムおよびマルチプロセッサシステムの動作方法
US8683139B2 (en) 2006-10-31 2014-03-25 Hewlett-Packard Development Company, L.P. Cache and method for cache bypass functionality
US8621154B1 (en) 2008-04-18 2013-12-31 Netapp, Inc. Flow based reply cache
US8161236B1 (en) 2008-04-23 2012-04-17 Netapp, Inc. Persistent reply cache integrated with file system
US8171227B1 (en) 2009-03-11 2012-05-01 Netapp, Inc. System and method for managing a flow based reply cache
KR20140040870A (ko) * 2009-07-07 2014-04-04 엘에스아이 코포레이션 계층화된 비휘발성 스토리지를 위한 시스템 및 방법
US20120290786A1 (en) * 2011-05-11 2012-11-15 Mesnier Michael P Selective caching in a storage system
US8904128B2 (en) * 2011-06-08 2014-12-02 Hewlett-Packard Development Company, L.P. Processing a request to restore deduplicated data
JP6155723B2 (ja) * 2013-03-18 2017-07-05 富士通株式会社 レーダ装置及びプログラム
US10956086B2 (en) * 2018-01-29 2021-03-23 Micron Technology, Inc. Memory controller

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Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6331805B2 (ja) * 1979-05-22 1988-06-27 Nippon Electric Co
JPS55154648A (en) * 1979-05-22 1980-12-02 Nec Corp Disc cash control system
JPS55154649A (en) * 1979-05-22 1980-12-02 Nec Corp Disc cash write-in system
JPS564857A (en) * 1979-06-25 1981-01-19 Hitachi Ltd Access system for memory unit
JPS5667430A (en) * 1979-11-07 1981-06-06 Toshiba Corp Dma control device
JPH023215B2 (ja) * 1981-10-15 1990-01-22 Intaanashonaru Bijinesu Mashiinzu Corp
JPS5876957A (ja) * 1981-10-15 1983-05-10 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション 記憶階層制御方法
US6529996B1 (en) 1997-03-12 2003-03-04 Storage Technology Corporation Network attached virtual tape data storage subsystem
US6658526B2 (en) 1997-03-12 2003-12-02 Storage Technology Corporation Network attached virtual data storage subsystem
US6925525B2 (en) 1998-07-06 2005-08-02 Storage Technology Corporation Data storage management system and method
US7873781B2 (en) 1998-07-06 2011-01-18 Storage Technology Corporation Data storage management method for selectively controlling reutilization of space in a virtual tape system
US7114013B2 (en) 1999-01-15 2006-09-26 Storage Technology Corporation Intelligent data storage manager
US6834324B1 (en) 2000-04-10 2004-12-21 Storage Technology Corporation System and method for virtual tape volumes

Also Published As

Publication number Publication date
DE2755897A1 (de) 1978-07-06
AU3122077A (en) 1979-06-14
FR2376465A1 (fr) 1978-07-28
US4075686A (en) 1978-02-21
JPS6133217B2 (ja) 1986-08-01
DE2755897C2 (ja) 1989-03-30
FR2376465B1 (ja) 1984-11-09
AU509939B2 (en) 1980-05-29
CA1105147A (en) 1981-07-14
GB1596519A (en) 1981-08-26

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