JPS5384466A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5384466A
JPS5384466A JP15951376A JP15951376A JPS5384466A JP S5384466 A JPS5384466 A JP S5384466A JP 15951376 A JP15951376 A JP 15951376A JP 15951376 A JP15951376 A JP 15951376A JP S5384466 A JPS5384466 A JP S5384466A
Authority
JP
Japan
Prior art keywords
manufacture
semiconductor device
vamp
simplify
prevent
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15951376A
Other languages
Japanese (ja)
Other versions
JPS617742B2 (en
Inventor
Kenzo Hatada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP15951376A priority Critical patent/JPS5384466A/en
Publication of JPS5384466A publication Critical patent/JPS5384466A/en
Publication of JPS617742B2 publication Critical patent/JPS617742B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods

Landscapes

  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

PURPOSE: To prevent the element contamination as well as to simplify the manufacturing processes, by removing the sensitive resin film and the multi-layer metal film around the metal vamp through the dry etching.
COPYRIGHT: (C)1978,JPO&Japio
JP15951376A 1976-12-29 1976-12-29 Manufacture of semiconductor device Granted JPS5384466A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15951376A JPS5384466A (en) 1976-12-29 1976-12-29 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15951376A JPS5384466A (en) 1976-12-29 1976-12-29 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5384466A true JPS5384466A (en) 1978-07-25
JPS617742B2 JPS617742B2 (en) 1986-03-08

Family

ID=15695405

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15951376A Granted JPS5384466A (en) 1976-12-29 1976-12-29 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5384466A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5524414A (en) * 1978-08-09 1980-02-21 Hitachi Ltd Electrode forming process
EP0609918A2 (en) * 1987-11-18 1994-08-10 Casio Computer Company Limited A method for forming a bump electrode structure of a semiconductor device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6620720B1 (en) * 2000-04-10 2003-09-16 Agere Systems Inc Interconnections to copper IC's

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS492482A (en) * 1972-04-18 1974-01-10

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS492482A (en) * 1972-04-18 1974-01-10

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5524414A (en) * 1978-08-09 1980-02-21 Hitachi Ltd Electrode forming process
EP0609918A2 (en) * 1987-11-18 1994-08-10 Casio Computer Company Limited A method for forming a bump electrode structure of a semiconductor device
EP0609918A3 (en) * 1987-11-18 1994-11-17 Casio Computer Co Ltd A method for forming a bump electrode structure of a semiconductor device.

Also Published As

Publication number Publication date
JPS617742B2 (en) 1986-03-08

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