Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu LtdfiledCriticalFujitsu Ltd
Priority to JP4655077ApriorityCriticalpatent/JPS53131775A/en
Publication of JPS53131775ApublicationCriticalpatent/JPS53131775A/en
PURPOSE: To obtain a J type FET of good switching characteristics by providing a high impurity concentration layer in a first gate between channel layers under a second gate on a substrate.