JPS522281A - Method of making semiconductor devices - Google Patents

Method of making semiconductor devices

Info

Publication number
JPS522281A
JPS522281A JP50076713A JP7671375A JPS522281A JP S522281 A JPS522281 A JP S522281A JP 50076713 A JP50076713 A JP 50076713A JP 7671375 A JP7671375 A JP 7671375A JP S522281 A JPS522281 A JP S522281A
Authority
JP
Japan
Prior art keywords
semiconductor devices
making semiconductor
header
chassis
lead frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP50076713A
Other languages
English (en)
Inventor
Masayoshi Yoshimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP50076713A priority Critical patent/JPS522281A/ja
Publication of JPS522281A publication Critical patent/JPS522281A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP50076713A 1975-06-24 1975-06-24 Method of making semiconductor devices Pending JPS522281A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50076713A JPS522281A (en) 1975-06-24 1975-06-24 Method of making semiconductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50076713A JPS522281A (en) 1975-06-24 1975-06-24 Method of making semiconductor devices

Publications (1)

Publication Number Publication Date
JPS522281A true JPS522281A (en) 1977-01-08

Family

ID=13613174

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50076713A Pending JPS522281A (en) 1975-06-24 1975-06-24 Method of making semiconductor devices

Country Status (1)

Country Link
JP (1) JPS522281A (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5966157A (ja) * 1982-10-08 1984-04-14 Fujitsu Ltd 半導体装置及びその製造方法
US5596231A (en) * 1991-08-05 1997-01-21 Asat, Limited High power dissipation plastic encapsulated package for integrated circuit die
US5687474A (en) * 1992-04-30 1997-11-18 Vlsi Technology, Inc. Method of assembling and cooling a package structure with accessible chip

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5966157A (ja) * 1982-10-08 1984-04-14 Fujitsu Ltd 半導体装置及びその製造方法
JPH041503B2 (ja) * 1982-10-08 1992-01-13 Fujitsu Ltd
US5596231A (en) * 1991-08-05 1997-01-21 Asat, Limited High power dissipation plastic encapsulated package for integrated circuit die
US5687474A (en) * 1992-04-30 1997-11-18 Vlsi Technology, Inc. Method of assembling and cooling a package structure with accessible chip

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