JPS52119131A - Mos dynamic memory - Google Patents
Mos dynamic memoryInfo
- Publication number
- JPS52119131A JPS52119131A JP3576876A JP3576876A JPS52119131A JP S52119131 A JPS52119131 A JP S52119131A JP 3576876 A JP3576876 A JP 3576876A JP 3576876 A JP3576876 A JP 3576876A JP S52119131 A JPS52119131 A JP S52119131A
- Authority
- JP
- Japan
- Prior art keywords
- dynamic memory
- mos dynamic
- mos
- ratioless
- reproducing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3576876A JPS52119131A (en) | 1976-03-31 | 1976-03-31 | Mos dynamic memory |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3576876A JPS52119131A (en) | 1976-03-31 | 1976-03-31 | Mos dynamic memory |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS52119131A true JPS52119131A (en) | 1977-10-06 |
JPS5732435B2 JPS5732435B2 (enrdf_load_html_response) | 1982-07-10 |
Family
ID=12451033
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3576876A Granted JPS52119131A (en) | 1976-03-31 | 1976-03-31 | Mos dynamic memory |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS52119131A (enrdf_load_html_response) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6346695A (ja) * | 1987-06-08 | 1988-02-27 | Hitachi Ltd | 半導体メモリ |
JPH03238692A (ja) * | 1990-02-15 | 1991-10-24 | Nec Corp | 半導体メモリ回路 |
-
1976
- 1976-03-31 JP JP3576876A patent/JPS52119131A/ja active Granted
Non-Patent Citations (1)
Title |
---|
IBM TECHNICAL DISCLOUSURE BULLETIN=1974 * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6346695A (ja) * | 1987-06-08 | 1988-02-27 | Hitachi Ltd | 半導体メモリ |
JPH03238692A (ja) * | 1990-02-15 | 1991-10-24 | Nec Corp | 半導体メモリ回路 |
Also Published As
Publication number | Publication date |
---|---|
JPS5732435B2 (enrdf_load_html_response) | 1982-07-10 |
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