JPS51135385A - Method of producing semiconductor device - Google Patents

Method of producing semiconductor device

Info

Publication number
JPS51135385A
JPS51135385A JP51024032A JP2403276A JPS51135385A JP S51135385 A JPS51135385 A JP S51135385A JP 51024032 A JP51024032 A JP 51024032A JP 2403276 A JP2403276 A JP 2403276A JP S51135385 A JPS51135385 A JP S51135385A
Authority
JP
Japan
Prior art keywords
semiconductor device
producing semiconductor
producing
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP51024032A
Other languages
English (en)
Inventor
Jii Potsusurii Guren
Jii Matsusee Robaato
Bii Uiriamusu Birii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of JPS51135385A publication Critical patent/JPS51135385A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76294—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using selective deposition of single crystal silicon, i.e. SEG techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639—Preparation of substrate for selective deposition
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/026—Deposition thru hole in mask

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Element Separation (AREA)
  • Bipolar Transistors (AREA)
JP51024032A 1975-03-06 1976-03-05 Method of producing semiconductor device Pending JPS51135385A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US55603775A 1975-03-06 1975-03-06

Publications (1)

Publication Number Publication Date
JPS51135385A true JPS51135385A (en) 1976-11-24

Family

ID=24219627

Family Applications (1)

Application Number Title Priority Date Filing Date
JP51024032A Pending JPS51135385A (en) 1975-03-06 1976-03-05 Method of producing semiconductor device

Country Status (2)

Country Link
US (1) US4101350A (ja)
JP (1) JPS51135385A (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5892233A (ja) * 1981-11-27 1983-06-01 Mitsubishi Electric Corp 酸化膜分離集積回路の製造方法
JPS6113641A (ja) * 1984-06-25 1986-01-21 インタ−ナシヨナル・ビジネス・マシ−ンズ・コ−ポレ−シヨン 半導体基板における分離パタ−ンの形成方法
JPS62106665A (ja) * 1985-10-31 1987-05-18 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション 集積回路装置の製造方法

Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5539677A (en) * 1978-09-14 1980-03-19 Chiyou Lsi Gijutsu Kenkyu Kumiai Semiconductor device and its manufacturing
JPS55130176A (en) * 1979-03-30 1980-10-08 Hitachi Ltd Field effect semiconductor element and method of fabricating the same
US4251300A (en) * 1979-05-14 1981-02-17 Fairchild Camera And Instrument Corporation Method for forming shaped buried layers in semiconductor devices utilizing etching, epitaxial deposition and oxide formation
JPS56135969A (en) * 1980-03-27 1981-10-23 Fujitsu Ltd Manufacture of semiconductor device
US4412868A (en) * 1981-12-23 1983-11-01 General Electric Company Method of making integrated circuits utilizing ion implantation and selective epitaxial growth
US4462847A (en) * 1982-06-21 1984-07-31 Texas Instruments Incorporated Fabrication of dielectrically isolated microelectronic semiconductor circuits utilizing selective growth by low pressure vapor deposition
US4554570A (en) * 1982-06-24 1985-11-19 Rca Corporation Vertically integrated IGFET device
EP0098111B1 (en) * 1982-06-24 1989-08-09 Harris Semiconductor Patents, Inc. Vertical igfet device and method for fabricating same
US4400411A (en) * 1982-07-19 1983-08-23 The United States Of America As Represented By The Secretary Of The Air Force Technique of silicon epitaxial refill
DE3467953D1 (en) * 1983-04-21 1988-01-14 Toshiba Kk Semiconductor device having an element isolation layer and method of manufacturing the same
US4566914A (en) * 1983-05-13 1986-01-28 Micro Power Systems, Inc. Method of forming localized epitaxy and devices formed therein
EP0134504B1 (en) * 1983-07-15 1989-05-10 Kabushiki Kaisha Toshiba A c-mos device and process for manufacturing the same
JPS6054450A (ja) * 1983-09-05 1985-03-28 Oki Electric Ind Co Ltd 半導体装置の製造方法
US4615746A (en) * 1983-09-29 1986-10-07 Kenji Kawakita Method of forming isolated island regions in a semiconductor substrate by selective etching and oxidation and devices formed therefrom
US4703554A (en) * 1985-04-04 1987-11-03 Texas Instruments Incorporated Technique for fabricating a sidewall base contact with extrinsic base-on-insulator
US4619033A (en) * 1985-05-10 1986-10-28 Rca Corporation Fabricating of a CMOS FET with reduced latchup susceptibility
US4735918A (en) * 1985-05-24 1988-04-05 Hughes Aircraft Company Vertical channel field effect transistor
US4660278A (en) * 1985-06-26 1987-04-28 Texas Instruments Incorporated Process of making IC isolation structure
US4717677A (en) * 1985-08-19 1988-01-05 Motorola Inc. Fabricating a semiconductor device with buried oxide
US4929570A (en) * 1986-10-06 1990-05-29 National Semiconductor Corporation Selective epitaxy BiCMOS process
US4851362A (en) * 1987-08-25 1989-07-25 Oki Electric Industry Co., Ltd. Method for manufacturing a semiconductor device
US4786615A (en) * 1987-08-31 1988-11-22 Motorola Inc. Method for improved surface planarity in selective epitaxial silicon
JPH01151268A (ja) * 1987-12-08 1989-06-14 Mitsubishi Electric Corp 半導体装置の製造方法
US4847210A (en) * 1988-08-05 1989-07-11 Motorola Inc. Integrated pin photo-detector method
DE3828809A1 (de) * 1988-08-25 1990-03-01 Licentia Gmbh Verfahren zur herstellung von halbleiterbauelementen
US5010034A (en) * 1989-03-07 1991-04-23 National Semiconductor Corporation CMOS and bipolar fabrication process using selective epitaxial growth scalable to below 0.5 micron
US5266517A (en) * 1991-12-17 1993-11-30 Texas Instruments Incorporated Method for forming a sealed interface on a semiconductor device
US5286996A (en) * 1991-12-31 1994-02-15 Purdue Research Foundation Triple self-aligned bipolar junction transistor
KR100191270B1 (ko) * 1995-09-29 1999-06-15 윤종용 바이폴라 반도체장치 및 그의 제조방법
KR100190029B1 (ko) * 1996-03-19 1999-06-01 윤종용 바이씨모스 에스램 소자의 제조방법
KR100248504B1 (ko) * 1997-04-01 2000-03-15 윤종용 바이폴라 트랜지스터 및 그의 제조 방법
US7348652B2 (en) * 2003-03-07 2008-03-25 Micron Technology, Inc. Bulk-isolated PN diode and method of forming a bulk-isolated PN diode
GB2439357C (en) * 2006-02-23 2008-08-13 Innos Ltd Integrated circuit manufacturing
US20080063027A1 (en) * 2006-03-15 2008-03-13 Giovanni Galli Precision temperature sensor
DE102020213385A1 (de) * 2020-10-23 2022-04-28 Robert Bosch Gesellschaft mit beschränkter Haftung Verfahren zum Herstellen einer Buried-Layer-Schichtstruktur und entsprechende Buried-Layer-Schichtstruktur

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3206339A (en) * 1963-09-30 1965-09-14 Philco Corp Method of growing geometricallydefined epitaxial layer without formation of undesirable crystallites
US3386865A (en) * 1965-05-10 1968-06-04 Ibm Process of making planar semiconductor devices isolated by encapsulating oxide filled channels
GB1280022A (en) * 1968-08-30 1972-07-05 Mullard Ltd Improvements in and relating to semiconductor devices
US3753803A (en) * 1968-12-06 1973-08-21 Hitachi Ltd Method of dividing semiconductor layer into a plurality of isolated regions
NL7101307A (ja) * 1970-02-03 1971-08-05
US3861968A (en) * 1972-06-19 1975-01-21 Ibm Method of fabricating integrated circuit device structure with complementary elements utilizing selective thermal oxidation and selective epitaxial deposition
US3998673A (en) * 1974-08-16 1976-12-21 Pel Chow Method for forming electrically-isolated regions in integrated circuits utilizing selective epitaxial growth

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5892233A (ja) * 1981-11-27 1983-06-01 Mitsubishi Electric Corp 酸化膜分離集積回路の製造方法
JPS6113641A (ja) * 1984-06-25 1986-01-21 インタ−ナシヨナル・ビジネス・マシ−ンズ・コ−ポレ−シヨン 半導体基板における分離パタ−ンの形成方法
JPH0586660B2 (ja) * 1984-06-25 1993-12-13 Ibm
JPS62106665A (ja) * 1985-10-31 1987-05-18 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション 集積回路装置の製造方法

Also Published As

Publication number Publication date
US4101350A (en) 1978-07-18

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