JPH1197713A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To form a fine and thin thermal oxide film having no pin hole and having a uniform thickness on the surface of an active layer, by forming an island-like active layer on a glass substrate, and annealing the active layer in an oxidizing atmosphere at a temperature which does not cause warping or contraction of the substrate. SOLUTION: An amorphous silicon film 205 is formed on an underlying layer 202 formed on a substrate 201, and this amorphous silicon film 205 is patterned to form an active layer 203. After the active layer is crystallized by laser irradiation, it is annealed in an oxygen atmosphere at about 600 deg.C for approximately one hour. Thus, a thermal oxide film 204 is formed on the surface of the active layer 203. Moreover, using tetra excimer silane as a material, a gate insulating film 205 of silicon oxide is formed by a plasma CVD method. By thus annealing the active layer at the temperature which does not cause warping or contraction of the substrate 201, the fine and thin thermal oxide film 204 having no pin hole and having a uniform thickness is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having an insulating gate structure using a non-single-crystal silicon film provided on an insulating substrate such as glass or an insulating film formed on various substrates. The present invention relates to a method for manufacturing a thin film transistor (TFT), a thin film diode (TFD), or a thin film integrated circuit using the same, particularly a thin film integrated circuit for an active liquid crystal display device (liquid crystal display).

[0002]

2. Description of the Related Art In recent years, semiconductor devices having TFTs on an insulating substrate such as glass, for example, active type liquid crystal display devices and image sensors using TFTs for driving pixels have been developed.

[0003] Thin film silicon semiconductors are generally used for TFTs used in these devices. Thin-film silicon semiconductors are roughly classified into two types: those made of an amorphous silicon semiconductor (a-Si) and those made of a crystalline silicon semiconductor. Amorphous silicon semiconductors are most commonly used because they have a low manufacturing temperature, can be manufactured relatively easily by a gas phase method, and have high mass productivity. Since it is inferior to a silicon semiconductor having
In order to obtain higher-speed characteristics in the future, it has been strongly required to establish a method for manufacturing a TFT made of a crystalline silicon semiconductor. Note that, as a silicon semiconductor having crystallinity, polycrystalline silicon, microcrystalline silicon, amorphous silicon containing a crystal component, semi-amorphous silicon having an intermediate state between crystalline and amorphous, and the like are known. .

In order to obtain an insulating gate structure using these silicon films, it is necessary to form an insulating film having excellent interface characteristics on the surface of the silicon film by some means. For example, on a substrate that can withstand high temperatures, such as a quartz substrate, a gate insulating film could be obtained by means of thermal oxidation. Quartz substrates are expensive and have a high melting point, making it difficult to increase the area. Therefore, other glass materials (for example, Corning 705) having a low melting point, being more excellent in mass productivity, and being inexpensive.
No. 9) was desired to be used as a substrate. But,
When a less expensive substrate material is used, there is a problem that the substrate cannot withstand a high temperature enough to obtain a thermal oxide film. Therefore, the physical vapor deposition method (PV
D method (for example, sputtering method) and chemical vapor deposition (CVD method)
Method, for example, a plasma CVD method, an optical CVD method, etc.).

However, the insulating films produced by these PVD and CVD methods have many pinholes and have poor interface characteristics. Therefore, the electric field mobility and the sub-threshold characteristic value (S value) in the case of a TFT are
There is a problem that it is not good, or a problem that leakage current of the gate electrode is large, deterioration is severe, and yield is low. In particular, in the case of a TFT using amorphous silicon originally having a low mobility, such characteristics of the gate insulating film did not cause much problem. However, in a TFT using a crystalline silicon film having a high mobility, However, the characteristics of the gate insulating film became a bigger problem than the silicon film itself.

[0006]

SUMMARY OF THE INVENTION The present invention provides means for solving the above problems. That is, a TF excellent in characteristics, reliability, and yield is obtained by using a crystalline silicon film.
In providing a method for manufacturing T, an object is to provide a method for manufacturing a gate insulating film and a structure of the gate insulating film under conditions that do not particularly affect the substrate material.

[Means for Solving the Problems]

According to the present invention, in an oxidizing atmosphere of oxygen, nitrogen oxide, ozone or the like, the island-shaped crystalline silicon film is irradiated with strong light having a wavelength and a duration that does not affect the substrate material; By thermally annealing an island-shaped crystalline silicon film at a temperature that does not affect the substrate material, a thin silicon oxide film (thermal oxide film) is formed on the surface of the crystalline silicon film. A gate insulating film having a desired thickness is formed by forming a thick insulating film by the PVD method or the CVD method.

In the present invention, when irradiating light,
For example, light from near-infrared light to visible light, preferably light having a wavelength of 4 μm to 0.5 μm (for example, a wavelength of 1.3 μm
When infrared light having a peak at
Irradiation for a relatively short time of about 2,000 seconds is desirable to raise the temperature of the surface of the silicon film to 900 to 1200 ° C. Since light of this wavelength is absorbed by the silicon film and is not substantially absorbed by the substrate, only the silicon film can be selectively heated without affecting the substrate during the above irradiation time.

In the case of using ultraviolet light having a shorter wavelength,
The optimal light duration is shorter because it is absorbed by many substrate materials as well as the silicon film. For example, 24
At a wavelength of 8 nm, it is desired to be 1 μsec or less. If irradiation is performed for a longer time, a considerable amount of light is absorbed by the substrate, and the substrate is deformed. As described above, it is necessary to select an amount of light such that the temperature of the surface of the silicon film instantaneously rises to a high temperature exceeding 1000 ° C. in the light irradiation for a very short time. In addition, since the temperature rises and falls instantaneously, oxidation does not sufficiently proceed in one irradiation, so that it is necessary to perform a plurality of irradiations. In this case, the thickness of the obtained oxide film depends on the number of times of irradiation. It is ideal to use a pulsed laser such as an excimer laser to perform irradiation in such an extremely short time using ultraviolet light as a light source. Various excimer lasers have a pulse width of 100 nsec or less. Further, in the present invention, the substrate temperature may be raised to a maximum of 600 ° C., preferably 400 ° C. when irradiating strong light.

In the present invention, when thermal annealing is performed, it is preferable to perform the thermal annealing at a temperature that does not affect the substrate such as warpage or shrinkage.
It is desirable to carry out the reaction at a temperature of 00 ° C, preferably 500 to 600 ° C. Generally, it should be performed at a temperature lower than the strain temperature (strain point) of the substrate. However, thermal treatment is applied to the substrate in advance to release internal strain energy, so that shrinkage can be sufficiently performed even at a temperature higher than the strain temperature. In such a case, the temperature may be higher than the strain temperature. The insulating film formed by the PVD method or the CVD method after the above-mentioned strong light irradiation or thermal annealing is generally a silicon oxide film, but may be a silicon nitride film or a silicon oxynitride film.

The method for producing a crystalline silicon film used in the present invention can be employed either by crystallization by irradiation with a laser beam or equivalent strong light, or by crystallization by thermal annealing. In particular, when a method of performing crystallization at a temperature lower than a normal solid-phase growth temperature using a metal element such as nickel that promotes crystallization is adopted in the case of thermal annealing, the present invention has a new effect. Is generated. Elements that promote crystallization include Group 8 elements Fe, Co, Ni, R
u, Rh, Pd, Os, Ir, and Pt can be used. The 3d elements Sc, Ti, V, Cr, Mn,
Cu and Zn can also be used. Further, according to the experiment, the action of crystallization was confirmed also in Au and Ag. In particular, among the above-mentioned elements, Ni has a remarkable effect, and Ni has been confirmed to operate as a TFT using a crystalline silicon film crystallized by the effect.

It has been observed that the silicon film to which these metals are added grows in a needle-like crystal. However,
The entire surface is not crystallized, and an amorphous region or a region with low crystallinity equivalent thereto is left between crystals. In the silicon film to which such a metal element is added, crystals grow in a needle shape, and the width thereof is 0.5 to 2 times the thickness of the film.
The growth is less than the growth direction in the <111> direction but in the width direction, that is, on the side surface of the crystal. For this reason, the amorphous region does not crystallize even after annealing for a long time, and when this is used for a TFT, there is a problem of deterioration of characteristics. However, when the above method of irradiating strong light is employed, part of the light energy is also used for crystal growth, and the growth on the side surface of the crystal is promoted. Therefore, a dense crystalline silicon film can be obtained. Further, the crystallinity may be further improved by performing thermal annealing again after irradiation with strong light. Further, such intense light irradiation and thermal annealing may be repeated a plurality of times.

[0013]

The thickness of the thermal oxide film obtained by irradiating strong light or annealing at a medium temperature is 20 to 200 °, typically 100 °. In contrast, it is a very dense and uniform thickness film without pinholes. The interface with the silicon film is also in an ideal state. Since a thicker insulating film, typically a silicon oxide film, is overlaid on this thermal oxide film, the leak current due to the pinhole is small, and the yield is improved.

Also, since the interface with the silicon film is good,
Various characteristic values in the case of a TFT are improved, and the reliability is high. In particular, as shown in FIG. 5A, in the conventional TFT process, when an island-shaped silicon film was formed, holes were generated at the edge of the silicon film due to overetching. In particular, when the underlying film was soft (the etching rate was large), it was remarkable. In the conventional PVD method or CVD method, these holes cannot be filled well, and a leak current often occurs due to cracks or the like. (FIG. 5B)
In the present invention, since a thermal oxide film having no pinholes and the like having a uniform thickness is formed around the silicon film, even if the above-described crack occurs, there is almost no problem in use. (FIG. 5 (C))

[0015]

【Example】

[Embodiment 1] In this embodiment, a circuit in which a P-channel TFT (referred to as PTFT) using a crystalline silicon film formed on a glass substrate and an N-channel TFT (referred to as NTFT) are combined in a complementary manner. It is an example of forming. The configuration of this embodiment can be used for a switching element of a pixel electrode and a peripheral driver circuit of an active type liquid crystal display device, as well as an image sensor and an integrated circuit.

FIG. 1 is a sectional view showing a manufacturing process of this embodiment. First, a 2000-nm-thick silicon oxide base film 102 was formed on a substrate (Corning 7059) 101 by a sputtering method. The substrate is annealed at a temperature higher than the strain temperature before or after the formation of the base film, and then slowly cooled to a strain temperature or lower at 0.1 to 1.0 ° C./min. Substrate shrinkage in the accompanying steps (including the oxidation step by irradiation with infrared light and thermal annealing of the present invention) is small, and mask alignment is prepared. For Corning 7059 substrate, after annealing at 620-660 ° C. for 1-4 hours, 0.1-1.0 ° C./min, preferably 0.1-1.0 ° C./min.
It is good to gradually cool at a rate of 1 to 0.3 ° C./min, and to take out when the temperature has dropped to 450 to 590 ° C.

Next, a thickness of 5
An intrinsic (I-type) amorphous silicon film of 00 to 1500 °, for example, 1000 ° was formed. Then, it is crystallized by annealing in a nitrogen inert atmosphere (atmospheric pressure) at 600 ° C. for 48 hours, and the silicon film is patterned into a size of 10 to 1000 μm to form an island-shaped silicon film (TFT active layer) 103. Was formed. Then, in an oxygen atmosphere, an infrared light having a peak of 0.5 to 4 μm, here 0.8 to 1.4 μm, is irradiated with an infrared light of 30 to 1 μm.
Irradiation for 80 seconds, the silicon oxide film 104 on the surface of the active layer 103
Was formed. 0.1 to 10% HCl could be mixed into the atmosphere. (Fig. 1 (A))

A halogen lamp was used as an infrared light source. The intensity of the infrared light was adjusted so that the temperature of the monitor on the single crystal silicon wafer was between 900 and 1200 ° C. Specifically, the temperature of the thermocouple embedded in the silicon wafer was monitored and fed back to the infrared light source. In the present embodiment, the temperature rise / fall is performed as shown in FIG.
(A) or (B). The temperature rise is constant, the speed is 50-200 ° C./sec, and the temperature fall is 20 by natural cooling.
１００100 ° C.

FIG. 4A shows a general temperature cycle, which comprises three steps of a temperature raising time a, a holding time b, and a temperature lowering time c. However, in this case, since the sample is rapidly heated and cooled from room temperature to as high as 1000 ° C., and further from the high temperature state to room temperature, the influence on the silicon film and the substrate is large, and the possibility of peeling of the silicon film is also high. high. In order to solve this problem, as shown in FIG. 4 (B), a preheating time d and a post-heating time f are provided before reaching the holding time, and before reaching the holding time, the substrate or film at 200 to 500 ° C. It is desirable to keep it at a temperature that does not have a significant effect.

Since the infrared light irradiation selectively heats the silicon film, the heating of the glass substrate can be minimized. Further, it is also very effective in reducing defects and unbound bonds in the silicon film. The thickness of the silicon oxide 104 formed by this infrared light irradiation is 50 to 1
It was 50 degrees.

Next, a thickness of 10
A silicon oxide film 105 having a thickness of 00 ° was formed as a gate insulating film. TEOS (tetraethoxysilane, Si (OC ₂ H ₅ ) ₄ ) and oxygen are used as source gases for CVD.
The substrate temperature during film formation is 300 to 550 ° C., for example, 400 ° C.
And (FIG. 1 (B))

Subsequently, by a sputtering method,
Aluminum (including 0.01 to 0.2% scandium) having a thickness of 6000 to 8000 °, for example, 6000 ° was deposited. Then, the aluminum film was patterned to form gate electrodes 106 and 108. Further, the surface of the aluminum electrode was anodized to form oxide layers 107 and 109 on the surface. This anodization was performed in an ethylene glycol solution containing tartaric acid at 1 to 5%. The thickness of the obtained oxide layers 107 and 109 is 200
It was 0 °. Since the oxides 107 and 109 have a thickness for forming an offset gate region in a later ion doping process, the length of the offset gate region can be determined in the anodic oxidation process.

Next, the ion doping method (plasma doping)
The active layer region (source / do
Rain, which constitutes the channel), the gate electrode,
Gate electrode 106 and its surrounding oxide layer 107, gate
Using the electrode 108 and the surrounding oxide layer 109 as a mask,
Add an impurity that imparts P or N conductivity type in a self-aligned manner.
Added. Phosphine (P
H_Three) And diborane (B _TwoH₆) And the former case
Means that the acceleration voltage is 60 to 90 kV, for example, 80 kV,
In this case, the voltage is set to 40 to 80 kV, for example, 65 kV. Do
1 × 10^Fifteen~ 8 × 10^Fifteencm^-2, For example, phosphorus
5 × 10^Fifteencm^-2, Boron 2 × 10^FifteenAnd Dopi
When polishing, cover one area with photoresist.
And selectively doping each element by
Was. As a result, N-type impurity regions 113 and 115, P-type
Impurity regions 110 and 112 are formed to form a P-channel type.
TFT (PTFT) region and N-channel TFT (NT
FT).

Thereafter, annealing was performed by laser light irradiation. As the laser light, a KrF excimer laser (wavelength: 248 nm, pulse width: 20 nsec) was used, but another laser may be used. The irradiation condition of the laser beam is such that the energy density is 200 to 400 mJ / cm ² ,
For example, 250 mJ / cm ^2, and ² to 10
A shot, for example, two shots was irradiated. The effect may be increased by heating the substrate to about 200 to 450 ° C. during the irradiation with the laser light. (Fig. 1 (C))

This step may be performed by lamp annealing using near-infrared light. Near infrared rays are more easily absorbed by crystallized silicon than amorphous silicon, and effective annealing comparable to thermal annealing at 1000 ° C. or higher can be performed. On the other hand, a glass substrate (far-infrared light is absorbed by the glass substrate, but visible / near-infrared light (wavelength 0.5 to 4
(μm) is hardly absorbed), so it is not necessary to heat the glass substrate to a high temperature and requires only a short processing time. Therefore, it is the most suitable method in the process where shrinkage of the glass substrate becomes a problem. It can be said that.

Subsequently, a silicon oxide film 11 having a thickness of 6000.degree.
6 was formed as an interlayer insulator by a plasma CVD method. Polyimide may be used as the interlayer insulator. Further, a contact hole is formed, and TF is formed by a metal material, for example, a multilayer film of titanium nitride and aluminum.
T electrodes / wirings 117, 118 and 119 were formed. Finally, annealing was performed at 350 ° C. for 30 minutes in a hydrogen atmosphere at 1 atm to complete a semiconductor circuit having a complementary TFT. (Fig. 1 (D))

The circuit shown above has a CMOS structure in which a PTFT and an NTFT are provided in a complementary manner. In the above-described process, two TFTs are simultaneously formed and cut at the center, whereby two independent TFTs are simultaneously formed. It is also possible to produce. Regarding the characteristics of the TFT obtained in this embodiment, the mobility of the NTFT is 110 to 150 cm ² / Vs,
S value is 0.2-0.5V / digit, PTFT mobility is 90
１２０120 cm ² / Vs, the S value is 0.4-0.6 V / digit, and the mobility is 20% or more higher than that of a case where a gate insulating film is formed by a known PVD method or CVD method.
The value has been halved.

[Embodiment 2] This embodiment also relates to a complementary TFT circuit. FIG. 2 schematically shows the manufacturing process of this embodiment.
Shown in In this embodiment, the substrate 201 is a Corning 7059 glass substrate (1.1 mm thick, 300 × 4
00 mm). First, as in Example 1, 640
After annealing at ℃ for 1 hour, a substrate gradually cooled to 580 ° C. at 0.2 ° C./min was used. Then, a base film 202 (silicon oxide) was formed to a thickness of 2000 ° by a plasma CVD method. TEOS and oxygen were used as source gases for CVD. The substrate temperature was 350 ° C. A sputtering method may be used instead of the plasma CVD method.

Thereafter, LPCVD or plasma C
An amorphous silicon film 205 was formed to a thickness of 500 ° by the VD method. This was patterned to form an active layer 203 of the TFT. Then, after dehydrogenation at 450 ° C. for 1 hour, crystallization was performed by laser irradiation. As a laser, a KrF excimer laser (wavelength: 248 nm) was used, and a laser beam having an energy density of 250 to 450 mJ / cm ² was irradiated for two shots at one location. Laser irradiation is performed in a vacuum and the substrate temperature is 350 to 500
° C. After the laser irradiation step, the substrate was annealed at 600 ° C. for 1 hour in an oxygen atmosphere. As a result, a thermal oxide film 204 having a thickness of 20 to 200 °, typically 40 to 100 ° was formed on the surface of the active layer. (Fig. 2 (A))

Further, tetraethoxysilane (TEO)
S) as a raw material, a gate insulating film of silicon oxide (thickness of 70 to 120 n) is formed by a plasma CVD method in an oxygen atmosphere.
m, typically 120 nm) 206 was formed. During film formation, trichlorethylene (TCE) was added at a flow rate ratio of 3 to 50% to TEOS. The substrate temperature was 350 ° C. Thus, a gate insulating film 205 was formed. (Figure 2
(B)) Next, an aluminum film having a thickness of 6000 ° is formed by a sputtering method, and is patterned to form a gate electrode 2.
06 and 208 were formed. Then, as in Example 1, the periphery of the gate electrode was covered with anodic oxides 207 and 209.

Thereafter, N-type and P-type impurities are implanted by ion doping, and the P-type source region 2 is self-aligned.
10, P-type drain region 212, N-type source region 21
3, N-type drain region 215, channel formation region 21
1, 214 were formed. By irradiating a KrF laser beam, the crystallinity of the silicon film whose crystallinity was deteriorated due to impurity introduction was improved. At this time, the energy density of the laser beam was set to 250 to 300 mJ / cm ² . Due to this laser irradiation, the source / drain sheet resistance of this TFT became 300 to 800 Ω / cm ² . This step may be performed by lamp annealing with infrared light. (Fig. 2 (C))

Thereafter, an interlayer insulator 216 was formed of silicon oxide or polyimide, a contact hole was formed, and electrodes 217, 218, and 219 were formed in a source / drain region of the TFT with a chromium / aluminum multilayer film. Finally, hydrogenation was performed by annealing in hydrogen at 200 to 400 ° C. for 2 hours. In this way, the TFT
Was completed. In order to further improve the moisture resistance, a passivation film may be formed on the entire surface using silicon nitride or the like. (FIG. 2 (D))

[Embodiment 3] This embodiment will be described with reference to FIG. First, as a glass substrate 301, Corning 70
After annealing at 620 to 660 ° C. for 1 to 4 hours using a 59 substrate, 0.1 to 1.0 ° C./min, preferably 0.1 to 1.0 ° C./min.
It was gradually cooled at -0.3C / min, and was taken out at the stage when the temperature was lowered to 450-590C. Then, a base film 3 is formed on the substrate.
02, and an amorphous silicon film 30 having a thickness of 300 to 800 ° is formed by a plasma CVD method.
3 was formed. Then, using a silicon oxide mask 304 having a thickness of 1000 °, a region having a thickness of
A 50 ° nickel film was formed by a sputtering method. The nickel film need not be a continuous film. Thereafter, heat annealing was performed at 500 to 620 ° C., for example, 550 ° C. for 8 hours in a nitrogen atmosphere to crystallize the silicon film 303. Crystallization progressed in a direction parallel to the substrate as indicated by an arrow, starting from a region 305 where the nickel and silicon films were in contact. (FIG. 3 (A))

Next, the silicon film 304 was patterned to form island-shaped active layer regions 306 and 307.
At this time, a region indicated by 300 in FIG. 3A is a region where nickel is directly introduced, and is a region where nickel is present at a high concentration. Also, as shown in Examples 2 and 3, nickel also exists at a high concentration at the tip of crystal growth. It has been found that these regions have a nickel concentration that is nearly an order of magnitude higher than the crystallized regions between them. Therefore, in this embodiment, the active layer regions 306 and 307 are patterned so as to avoid these regions where the nickel concentration is high, and the regions where the nickel concentration is high are removed. Then, T is applied to a region where almost no nickel is present.
An active layer of FT was formed. The etching of the active layer was performed by the RIE method having anisotropy in the vertical direction. The nickel concentration in the active layer of this embodiment is 10 ¹⁷ to 10 ¹⁹ cm ^−3.
It was about. Thereafter, irradiation with visible / near-infrared light was performed under the same conditions as in Example 1 to obtain a silicon oxide film 308 having a thickness of 50 to 150 ° on the surfaces of the active layers 306 and 307 and crystallized by the previous thermal annealing. The crystallinity of the region was further improved. (FIG. 3 (B))

Thereafter, the gate insulating film 3 is formed in the same manner as in the first embodiment.
09 (FIG. 3C), and gate electrodes 310 and 311 are formed.
Is formed, and P-type and N-type impurities are introduced (FIG. 3).
(D)), an interlayer insulator 312 is formed, a contact hole is formed therein, and metal wirings 313, 314, and 31 are formed.
5 was formed. (FIG. 3 (E))

[Embodiment 4] FIG.
Shown in The present embodiment is an example of a process of irradiating an island-like silicon film with KrF excimer laser light (wavelength: 248 nm) in an oxidizing atmosphere to form a thin oxide film on the surface thereof and promote crystallization of the silicon film. is there.
Hereinafter, a process of forming a switching transistor of a pixel of an active matrix circuit using the silicon film thus processed will be described with reference to FIG.

As in Example 3, a substrate 601 was used, which was first annealed at 640 ° C. for 1 hour and then gradually cooled to 580 ° C. at 0.2 ° C./min. A base film 602 (silicon oxide, thickness of 2000 Å) and an amorphous silicon film 603 (thickness of 50
0 °), and the surface of the amorphous silicon film 603 is thermally oxidized or treated with an oxidizing agent such as a hydrogen peroxide solution.
A silicon oxide film having a thickness of 10 to 100 ° was formed. In this state, an extremely thin nickel acetate layer 604 was formed by spin coating. Water or ethanol is used as the solvent, and the concentration of nickel acetate is 10 to 5
It was set to 0 ppm. (FIG. 6 (A))

Then, the substrate is placed in a nitrogen atmosphere at 550 ° C. for 4 hours.
Annealed for ~ 8 hours. As a result, the amorphous silicon film 603 was crystallized by the crystallization promoting action of nickel. In this crystallization, it has been confirmed that there is a region having a size of 1 to several μm which is left in an amorphous state in a part of the film.

Next, the silicon film was etched by a known photolithography method to obtain an island-shaped silicon region 605. The oxide film remaining on the silicon film surface was removed at this stage. Next, the substrate is placed in an oxygen atmosphere, and KrF
Excimer laser light was applied. The irradiation energy density is 250 to 450 mJ / cm ² , for example, 300
mJ / cm ^2, and 10 to 50 shots were irradiated at one location. As a result, a silicon oxide film 606 having a thickness of 10 to 50 ° was obtained. The energy density of the laser and the number of shots may be selected depending on the thickness of the silicon oxide film 606 to be obtained. Further, by the laser irradiation step, the amorphous region remaining in the crystalline silicon film was also crystallized, and the crystallinity of the silicon film could be further improved. After this step, thermal annealing may be performed again under the same conditions as described above. (FIG. 6 (B))

Next, a thickness of 12
A silicon oxide film 607 of 00 ° was formed as a gate insulating film. TEOS (tetraethoxysilane, Si (OC ₂ H ₅ ) ₄ ) and oxygen are used as source gases for CVD.
The substrate temperature during film formation is 300 to 550 ° C., for example, 400 ° C.
And (FIG. 6 (C))

Subsequently, by a sputtering method,
Aluminum (containing 0.01 to 0.2% of scandium) having a thickness of 3000 to 8000, for example, 6000, was deposited. Then, a gate electrode 608 was formed by patterning the aluminum film.

Next, by using the gate electrode 608 as a mask, an impurity for imparting a P conductivity type was added in a self-aligned manner by ion doping. Diborane (B ₂ H ₆ ) is used as a doping gas, and the accelerating voltage is 40 to 80 k.
V, for example, 65 kV. Dose amount is 1 × 10 ^{14 to} 5
× 10 ¹⁵ cm ^-2 , for example, 5 × 10 ¹⁴ cm ^-2 . As a result, P-type impurity regions 609 and 610 were formed. Thereafter, annealing was performed by laser light irradiation. As a laser beam, a KrF excimer laser (wavelength: 248 nm, pulse width: 20 nsec) was used.
The conditions were the same as in Example 1. (FIG. 6 (D))

Subsequently, a silicon oxide film 61 having a thickness of 6000.degree.
1 is formed as an interlayer insulator by a plasma CVD method, a contact hole is formed, and a metal material, for example,
An electrode / wiring 612 was formed in the P-type impurity region 609 using a multilayer film of titanium nitride and aluminum. further,
The thickness is 2000 to 5000 by the plasma CVD method.
A silicon nitride film 613 having a thickness of, for example, 3000 nm is formed as a passivation film, and the silicon oxide film 611 is etched to form a contact hole in the impurity region 610. Finally, an indium tin oxide film (thickness: 1000 °) as a transparent conductive material was formed by a sputtering method, and this was etched to form a pixel electrode 614. (FIG. 6E)

Through the above steps, a pixel transistor of the active matrix circuit could be formed. If such elements are arranged in a matrix, an active matrix circuit can be obtained. In this embodiment, a KrF excimer laser is used as a laser, but it goes without saying that another laser may be used.

[0045]

According to the present invention, an island-like silicon film to be an active layer of a TFT is irradiated with intense light having a wavelength not absorbed by the substrate in an oxidizing atmosphere, or annealed in an oxidizing atmosphere at a temperature at which the substrate does not warp or shrink. By forming a thin thermal oxide film having a uniform thickness and no pinholes on the surface of the active layer, and further forming a thick insulating film thereon by a known CVD method or PVD method, The properties and reliability of the gate insulating film were significantly improved.

In the embodiment, only the complementary type TFT circuit is described.
Obviously, it can be applied to FT. According to the present invention, characteristics that were conventionally obtained only by using an expensive substrate such as quartz can be obtained even with a less expensive substrate. Thus, the present invention has great industrial benefits.

[Brief description of the drawings]

FIG. 1 shows a manufacturing process of a TFT of Example 1.

FIG. 2 illustrates a manufacturing process of a TFT of Example 2.

FIG. 3 illustrates a manufacturing process of a TFT according to a third embodiment.

FIG. 4 shows an example of temperature setting in the first embodiment.

FIG. 5 shows a difference between a conventional gate insulating film and a gate insulating film of the present invention.

FIG. 6 shows a process for manufacturing a TFT of Example 4.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 101 Glass substrate 102 Base film (silicon oxide film) 103 Mask 104 Thin thermal oxide film (silicon oxide) 105 Gate insulating film (silicon oxide) 106 Gate electrode (aluminum) 107 Anodized layer (aluminum oxide) 108 Gate electrode 109 Anodized Layer 110 Source (drain) region 111 Channel formation region 112 Drain (source) region 113 Source (drain) region 114 Channel formation region 115 Drain (source) region 116 Interlayer insulator 117 Electrode 118 Electrode 119 Electrode

 ──────────────────────────────────────────────────の Continued on the front page (72) Inventor Hiroshi Uehara 398 Hase, Atsugi City, Kanagawa Prefecture Inside Semi-Conductor Energy Laboratory Co., Ltd.

Claims (9)

[Claims] A first step of forming an island-shaped active layer made of a crystalline silicon film obtained by crystallizing an amorphous silicon film on a glass substrate; A second step of oxidizing the surface of the layer to form an oxide film, a third step of forming an insulating film on the oxide film by a chemical vapor reaction means or a physical vapor reaction means,
A method for manufacturing a semiconductor device, comprising: 2. The method for manufacturing a semiconductor device according to claim 1, wherein the active layer contains a metal element that promotes crystallization of silicon. 3. The method according to claim 1, wherein the annealing in the second step is performed in an oxidizing atmosphere at a wavelength of 4 μm.
A method for manufacturing a semiconductor device, wherein light annealing is performed by irradiating light of m to 0.5 μm. 4. The method for manufacturing a semiconductor device according to claim 1, wherein the annealing in the second step is optical annealing in which an ultraviolet ray is irradiated in an oxidizing atmosphere. 5. The method according to claim 1, wherein the annealing in the second step is performed at 400 ° C. in an oxidizing atmosphere.
A method for manufacturing a semiconductor device, which is thermal annealing in which heat treatment is performed at a temperature of about 700 ° C. 6. The method for manufacturing a semiconductor device according to claim 1, wherein HCl is added to the oxidizing atmosphere in the second step. 7. The method for manufacturing a semiconductor device according to claim 1, wherein the insulating film is a silicon oxide film, a silicon nitride film, or a silicon oxynitride film. 8. An active layer formed on a glass substrate, an oxide film formed by oxidizing the surface of the active layer, and a chemical vapor reaction means or a physical vapor reaction means on the oxide film A semiconductor device, wherein the active layer includes a metal element that promotes crystallization of silicon. 9. The semiconductor device according to claim 8, wherein the insulating film is a silicon oxide film, a silicon nitride film, or a silicon oxynitride film.