JP2896124B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device having a non-single-crystal silicon film provided on an insulating substrate made of glass or the like or an insulating film formed on various substrates, for example, a thin film transistor (TFT), Thin film diode (T
FD) or a thin film integrated circuit using the same, particularly,
The present invention relates to a method for manufacturing a thin film integrated circuit for an active liquid crystal display device (liquid crystal display).

[0002]

2. Description of the Related Art In recent years, semiconductor devices having thin film transistors on an insulating substrate such as glass, for example, active type liquid crystal display devices and image sensors using the thin film transistors for driving pixels have been developed.

In general, a thin film silicon semiconductor is used for a thin film transistor used in these devices. Thin-film silicon semiconductors are roughly classified into two types: those made of an amorphous silicon semiconductor (a-Si) and those made of a crystalline silicon semiconductor. Amorphous silicon semiconductors are most commonly used because they have a low manufacturing temperature, can be manufactured relatively easily using a vapor phase method, and have high mass productivity. However, since a non-single-crystal silicon semiconductor is inferior in physical properties such as conductivity to a silicon semiconductor having crystallinity,
In order to obtain higher-speed characteristics in the future, there has been a strong demand for establishing a method of manufacturing a thin film transistor made of a silicon semiconductor having crystallinity. Note that as the silicon semiconductor having crystallinity, polycrystalline silicon, microcrystalline silicon, amorphous silicon containing a crystal component, semi-amorphous silicon having an intermediate state between crystalline and amorphous, and the like are known. .

A method for obtaining a silicon semiconductor in the form of a thin film having crystallinity is as follows: (1) A film having crystallinity is directly formed at the time of film formation. (2) An amorphous semiconductor film is formed, and crystallinity is imparted by the energy of laser light. (3) An amorphous semiconductor film is formed in advance, and crystallinity is imparted by applying thermal energy (annealing) for a long time. The method is known.

However, in the method (1), it is technically difficult to uniformly form a film having good semiconductor properties over the entire surface of the substrate, and the film forming temperature is 600.
Since the temperature is high at not less than ° C., there is also a problem of cost that an inexpensive glass substrate cannot be used. If the film forming temperature is low, it has been difficult to obtain a film having good characteristics. Further, since the crystal grows perpendicularly to the substrate, it is not suitable for use in a thin film transistor using planar electric conduction.

The method (2) has a problem in that the throughput is low because the irradiation area of the laser beam is small, taking the excimer laser, which is currently most commonly used, as an example. In order to uniformly process the entire surface of the area substrate, the stability of the laser is not sufficient. Furthermore, in order to obtain good crystallinity, it was necessary to heat the substrate and irradiate it with a laser in a vacuum. For this reason, there is a problem that the throughput is limited.

The method (3) has an advantage that it can be applied to a large area as compared with the methods (1) and (2), but also requires a high heating temperature of 600 ° C. or more. Considering the use of inexpensive glass substrates,
Further, it is necessary to lower the heating temperature. In particular, in the case of the current liquid crystal display device, the screen is becoming larger, and therefore, it is necessary to use a large glass substrate as well. When such a large glass substrate is used, shrinkage and distortion in a heating step which is indispensable for semiconductor fabrication lowers the accuracy of mask alignment and the like, and is a serious problem. In particular, the most commonly used Corning 7059 glass today has a strain point of 59.
It is 3 ° C., and if it is performed by a conventional heating crystallization method, large deformation will occur. In addition to the problem of the temperature, in the current process, the heating time required for crystallization is several tens of hours or more. Therefore, it is necessary to further shorten the heating time.

[0008]

SUMMARY OF THE INVENTION The present invention provides means for solving the above problems. More specifically, the present invention provides a method of crystallizing a thin film made of amorphous silicon by heating, which has good crystallinity and lower heating temperature, in other words, the effect on a glass substrate. It is an object of the present invention to provide a method for manufacturing a semiconductor device which can establish a process capable of reducing the number of semiconductor devices. The present invention provides a method for manufacturing a semiconductor device in which after crystallization is performed by heat annealing through a non-single-crystal silicon film, the remaining portion that has not been crystallized is irradiated with infrared light to promote crystallization. The purpose is to do. An object of the present invention is to provide a method for manufacturing a semiconductor device suitable for an insulated gate field effect semiconductor device by adding a metal element which promotes crystallization to a non-single-crystal silicon film.

[0009]

According to the present invention, after a non-single-crystal silicon film is formed on a substrate, the non-single-crystal silicon
It is crystallized by heat annealing at 0 ° C. or less. afterwards,
The non-single-crystal silicon film is irradiated with infrared light to promote the crystallinity of a portion not crystallized by the heat annealing, and at the same time, to densify the film quality and to separate the substrate from the non-single-crystal silicon film. It is characterized by preventing. Specifically, after the end of the heat annealing, light from near-infrared light to visible light is applied to the non-single-crystal silicon film patterned in an island shape,
Light having a wavelength of preferably 4 μm to 0.5 μm (for example,
Infrared light having a peak at a wavelength of 1.3 μm) for 10 seconds to 1
Irradiation is performed for a relatively short time of about 2,000 seconds to heat the non-single-crystal silicon film, thereby promoting crystallinity. The wavelength of the light used is absorbed by the silicon film and is not substantially absorbed by the glass substrate. further,
In such a heat treatment, the separation between the silicon film and the substrate due to the difference in the coefficient of thermal expansion between the silicon film and the substrate, the difference in the temperature between the surface of the silicon film and the interface between the silicon film and the silicon film, etc. was reduced. In particular,
The decrease in the peeling phenomenon was remarkable because the silicon film was formed into an island shape on the substrate. Therefore, the silicon film is divided into sufficiently small areas, and the distance between the silicon films is sufficiently widened so as not to absorb excess heat.
The separation between the silicon film and the substrate can be prevented. Further, since the entire surface of the substrate is not heated through the silicon film, thermal contraction of the substrate can be minimized.

A method for manufacturing a semiconductor device according to the present invention comprises:
A first step of forming a non-single-crystal silicon film on a substrate, a second step of allowing the non-single-crystal silicon film to contain a metal element that selectively promotes crystallization, It comprises a third step of heat annealing and a fourth step of optically annealing the non-single-crystal silicon film in a hydrogen atmosphere containing a compound of fluorine, chlorine or bromine, or hydrogen halide. In particular, the intrinsic or substantially intrinsic amorphous silicon film is well-absorbed by visible light, particularly light having a wavelength of less than 0.5 μm, and can convert light into heat.
Irradiation is performed with light having a wavelength of 0.5 μm to 4 μm. This wavelength can effectively absorb light and convert it into heat for a crystallized intrinsic or substantially intrinsic (phosphor or boron of 10 ¹⁷ cm ⁻³ or less) silicon film. Further, far-infrared light having a wavelength of 10 μm or more is absorbed by a glass substrate and heated,
When most of the wavelengths below μm are used, heating of the glass is extremely low. That is, in order to further crystallize the crystallized silicon film, a wavelength of 0.5 μm to 4 μm is effective.

In the first step of the present invention, when a method of performing crystallization at a lower temperature than a normal solid phase growth temperature using a metal element such as nickel which promotes crystallization is adopted, The effect of the invention is remarkable. Elements that promote crystallization that can be used in the present invention include Group VIII elements Fe, Co, Ni, Ru, Rh, Pd, Os, and I.
r and Pt can be used. The 3d element S
c, Ti, V, Cr, Mn, Cu, Zn can also be used. Further, according to the experiment, the action of crystallization was confirmed also in Au and Ag. In particular, among the above elements, nickel has a remarkable effect, and nickel has been confirmed to operate as a thin film transistor using a crystalline silicon film crystallized by the effect.

[0012] In the silicon film to which these metals are added, it has been observed that acicular crystals grow not in the film thickness direction but in the direction along the substrate surface. However, the entire surface of the silicon film is not uniformly crystallized, and an amorphous region or a region having low crystallinity equivalent to the amorphous region is left between crystals.

As described above, in the silicon film to which such a metal element is added, a crystal grows in a needle shape, the width thereof is about 0.5 to 3 times the silicon film thickness, and Growth, ie, on the sides of the crystal. For this reason, the amorphous region is not completely crystallized even by long-time thermal annealing,
When this is used for a thin film transistor, there is a problem that the characteristics are not sufficiently improved.

The optical annealing of the present invention is apparently 500
At a temperature of 800 ° C. to 1300 ° C. (measured by bringing a thermocouple into contact with silicon), the needle-like crystal growth is not limited to the lateral growth from The low crystallization areas between the grown teeth, such as "teeth", contribute particularly to further crystallization. That is, in the silicon film of the present invention, the crystal grows epitaxially from the side face of the needle-like crystal, and then the amorphous portion is crystallized.

[0015]

DETAILED DESCRIPTION OF THE INVENTION A thermal anneal at 400.degree. C. to 650.degree. C., typically 500.degree.
Among the crystallized thin-film silicon semiconductors, active elements,
For example, patterning was removed except for a region where a thin film transistor was formed. By irradiating visible or near-infrared light to this needle-like laterally grown island-like crystal region,
The silicon film can be selectively heated, and crystallinity can be further promoted. At this time, since the absorption of infrared light from the glass substrate or the like is sufficiently small, the optical annealing should be performed without heating the glass substrate to a degree that renders the glass substrate soft or shrinkable so that the glass substrate cannot be used engineeringly. Can be.

In particular, when a metal element that promotes crystallization is used in the thermal annealing, the crystallization of the needle-like crystal on the side surface, which has been insufficient until then, is promoted. A thin film can be obtained. Example 1 below shows that the present invention increases the crystal region of a silicon film by Raman spectroscopy. Examples of steps for manufacturing a thin film transistor using the present invention are described in Examples 2 to 4.

[0017]

【Example】

[Embodiment 1] FIGS. 1A to 1E show steps of manufacturing a thin film transistor according to Embodiments 1 and 2 of the present invention. The present embodiment relates to improvement of crystallinity of a silicon thin film formed on a glass substrate. FIG. 1 (A) to (C)
This will be described with reference to FIG. First, the substrate (Corning 7059)
On the substrate 101, a thickness of 2000 mm is formed by a sputtering method.
A silicon oxide base film 102 was formed. Next, a metal mask, a mask 103 formed of a silicon oxide or silicon nitride film, or the like was provided. The mask 103 exposes the base film 102 in a slit shape. That is, FIG.
When the state is viewed from above, the base film 102 is exposed in a slit shape, and the other parts are in a masked state. After the mask 103 is provided, the thickness is 5 to 200 °, for example, 20 ° by sputtering.
Was selectively formed in 100 regions. In this state, nickel is selectively introduced into the region of 100. (Fig. 1 (A))

Next, the mask 103 was removed. Then, a thickness of 300 to 150 mm is formed by a plasma CVD method.
An intrinsic (I-type) amorphous silicon film 104 of 0 °, for example, 800 ° was formed.

The amorphous silicon film 104 was crystallized by thermal annealing in a nitrogen inert atmosphere (atmospheric pressure) at 550 ° C. for 8 hours or 600 ° C. for 4 hours. At this time, in the region 100 where the nickel film was selectively formed, the crystallization of the crystalline silicon film 104 progressed in the direction perpendicular to the substrate 101. Then, in regions other than the region 100, crystal growth proceeded from the region 100 in a lateral direction (a direction parallel to the substrate) as indicated by an arrow 105. (FIG. 1 (B))

After this step, the silicon film 104 is
It was patterned by etching to a size of 1000 μm. For example, patterning into 100 μm square,
Many island-shaped silicon films 104 'were formed on the substrate. And 0.5 μm to 4 μm, here 0.8 μm to 1.4.
Visible / near infrared light having a peak at μm was irradiated for 30 seconds to 600 seconds to further promote crystallization of the silicon film 104 ′.
(See Fig. 1 (C))

FIGS. 5A and 5B show an example of temperature setting according to the first embodiment of the present invention. As an infrared light source,
A halogen lamp was used. The intensity of visible and near-infrared light is 800 ° C on a single crystal silicon wafer of the monitor.
~ 1300 ° C, typically 900 ° C ~ 1200 ° C
Adjusted to be between. Specifically, the temperature of the thermocouple embedded in the silicon wafer was monitored and fed back to the infrared light source. In this example, the temperature was raised and lowered as shown in FIG. 5 (A) or (B). For example, the temperature rise is constant at a speed of 50 ° C./sec to 200 ° C./sec.
° C.

FIG. 5A shows a general temperature cycle, which comprises three steps of a temperature raising time a, a holding time b, and a temperature lowering time c. However, in this case, the sample is heated from room temperature to 1000 ° C.
Since the substrate is rapidly heated and cooled to a high temperature and further from a high temperature to room temperature, the influence on the silicon film and the substrate is large, and the possibility of peeling of the silicon film is high.

In order to solve this problem, FIG.
Before reaching the holding time, a pre-heating time d and a post-heating time f are provided.
It is desirable to maintain a temperature of C to 500 ° C. which does not greatly affect the substrate or the film.

It is preferable that a silicon oxide or silicon nitride film be formed as a protective film on the surface during the irradiation with infrared light. This is to improve the state of the surface of the silicon film 104. Further, in order to improve the state of the surface of the silicon film 104, the etching was performed in a hydrogen atmosphere. 0.1% to 10% HCl, a compound of hydrogen halide, fluorine, chlorine, or bromine may be mixed in the hydrogen atmosphere.

This visible / near-infrared light irradiation selectively heats the crystallized silicon film, so that the heating of the glass substrate can be minimized. And it is very effective in reducing the defects and the dangling bonds in the silicon film. It is important that the visible / near-infrared light irradiation is performed after the crystallization step by heating. When the amorphous silicon film was immediately irradiated with infrared light without being previously crystallized by thermal annealing, good crystals could not be obtained.

FIG. 4 shows the results of Raman scattering spectroscopy of the crystalline silicon film obtained according to the first embodiment of the present invention. "C-S
“i” indicates the Raman scattering intensity of a single crystal silicon wafer measured as a standard sample, where “1100 ° C.,
“180 sec” means that the infrared light irradiation temperature was 1100 ° C. and the irradiation was performed for 180 seconds. As is clear from the figure, the infrared light irradiation
Raman intensity increases, indicating that the crystal volume fraction has increased. Thus, it was shown that the region where crystallization was insufficient was crystallized by irradiation with infrared light.

[Embodiment 2] In this embodiment, FIGS.
A P-channel thin film transistor (referred to as a P thin film transistor) and an N-channel thin film transistor (N thin film transistor) using a crystalline silicon film formed on a glass substrate shown in FIG.
This is an example of forming a circuit in which a circuit is combined with a thin film transistor in a complementary manner. The configuration of this embodiment can be used for a switching element of a pixel electrode and a peripheral driver circuit of an active type liquid crystal display device, as well as an image sensor and an integrated circuit.

In FIG. 1, first, a substrate (Corning 7
059) The thickness 2 was formed on 101 by sputtering.
An underlayer 102 of silicon oxide of 000 ° was formed. Substrate 1
01 is annealed at a temperature higher than the strain temperature before or after the formation of the base film 102, and then performed at 0.1 ° C. /
When the substrate is gradually cooled to a strain temperature or lower at a temperature of from 1.0 to 1.0 ° C./min, the shrinkage of the substrate 101 in a process involving a temperature rise (including the irradiation of infrared light of the present invention) is small, and mask alignment is easy. Become. For Corning 7059 substrate 101, 620
After annealing for 1 hour to 4 hours at ° C to 660 ° C,
0.1 ° C./min to 1.0 ° C./min, preferably 0.1
° C / min ~ 0.3 ° C / min.
It is good to take out at the stage when the temperature has dropped to 0 ° C.

After the formation of the base film, a mask 103 formed of a silicon nitride film or the like was provided. This mask 103
Exposes the base film 102 in a slit shape. That is, when the state of FIG. 1A is viewed from above, the base film 102 is exposed in a slit shape, and the other portions are masked. After providing the mask 103, by sputtering, the thickness 5～200A, for example, 20 Å of nickel silicide film (chemical formula NiSi _x,
0.4 ≦ x ≦ 2.5, for example, x = 2.0) to 100
Was selectively formed in the region of. In this state, nickel is 1
00 will be selectively introduced. (Figure 1
(See (A))

Next, the mask 103 was removed, and an intrinsic (I-type) amorphous silicon film 104 having a thickness of 300 to 1500 °, for example, 500 ° was formed by a plasma CVD method. Then, it was annealed at 550 ° C. for 4 to 8 hours in an inert atmosphere (nitrogen or argon, atmospheric pressure) to crystallize. At this time, in the region 100 where the nickel silicide film was selectively formed, the crystallization of the crystalline silicon film 104 progressed in the direction perpendicular to the substrate 101.
Then, in regions other than the region 100, crystal growth proceeded from the region 100 in a lateral direction (a direction parallel to the substrate) as indicated by an arrow 105. (See FIG. 1 (B))

After this step, the silicon film was patterned to form an island-shaped active layer 104 'of the thin film transistor. At this time, it is important that a tip portion of crystal growth (that is, a nickel concentration is high at a boundary between the crystalline silicon region and the amorphous silicon region) does not exist in a portion to be a channel formation region. In this manner, carriers moving between the source and the drain are formed in the channel formation region.
The effect of the nickel element can be eliminated. The size of the active layer 104 'is determined in consideration of the channel length and channel width of the thin film transistor. 50 μm × 20 μm for small ones, 100 μm for large ones
m × 1000 μm.

Many such active layers were formed on the substrate. And 0.5 μm to 4 μm, in this embodiment 0.8 μm
30 seconds to 18 hours of infrared light having a peak at μm to 1.4 μm.
Irradiation for 0 seconds further promoted crystallization of the active layer. The temperature is between 800 ° C and 1300 ° C, typically 900 ° C
１1200 ° C., for example, 1100 ° C. Irradiation was performed in a hydrogen atmosphere to improve the condition of the surface of the active layer. In this step, since the active layer is selectively heated, heating of the glass substrate can be minimized. And, it is very effective in reducing defects and unbound bonds in the active layer. (See Fig. 1 (C))

Next, a thickness of 10
A silicon oxide film 106 having a thickness of 00 ° was formed as a gate insulating film. The CVD source gas, TEOS with oxygen _{(tetraethoxysilane, Si (OC 2 H 5)} 4), the substrate temperature during film formation, 300 ° C~550 ° C, for example, 400 ° C And

The silicon oxide film 106 serving as the gate insulating film
After the film formation, light annealing by irradiation with visible / near infrared light was performed again. By this optical annealing, the level mainly at the interface between the silicon oxide film 106 and the silicon film 104 and in the vicinity thereof could be eliminated. This is extremely useful for an insulating gate type field effect semiconductor device in which the interface characteristics between the gate insulating film and the channel formation region are extremely important.

Subsequently, by a sputtering method,
Aluminum (including 0.01% to 0.2% scandium) having a thickness of 6000 to 8000, for example, 6000, was deposited. Then, the aluminum film was patterned to form gate electrodes 107 and 109. Further, the surface of the aluminum electrode was anodized to form oxide layers 108 and 110 on the surface. This anodization was performed in an ethylene glycol solution containing tartaric acid at 1 to 5%. The thickness of the obtained oxide layers 108 and 110 was 2000 °. The oxides 108 and 110
In the subsequent ion doping process, the thickness is such that the offset gate region is formed, so that the length of the offset gate region can be determined in the anodic oxidation process.

Next, by an ion doping method (also referred to as a plasma doping method), a gate electrode portion, that is, a gate electrode 107, an oxide layer 108 surrounding the gate electrode 107, and a gate electrode are formed in an active layer region (constituting a source / drain and a channel). 109 and the surrounding oxide layer 110 as a mask,
Impurities for imparting P conductivity type or N conductivity type are added in a self-aligned manner. Phosphine (PH ₃ ) and diborane (B ₂ H ₆ ) are used as the doping gas. In the former case, the acceleration voltage is 60 kV to 90 kV, for example, 8 kV.
0 kV, and in the latter case, 40 kV to 80 kV, for example, 65 kV. The dose amount is 1 × 10 ¹⁵ cm ^-2 -8
× 10 ¹⁵ cm ^-2 , for example, phosphorus was set to 2 × 10 ¹⁵ cm ^-2 and boron was set to 5 × 10 ¹⁵ cm ^-2 . When doping, by covering one area with photoresist,
Each element was selectively doped. As a result,
N-type impurity regions 114 and 116, P-type impurity region 1
11 and 113 were formed, and a region of a P-channel thin film transistor (P thin film transistor) and a region of an N-channel thin film transistor (N thin film transistor) could be formed.

Thereafter, annealing was performed by laser light irradiation. As the laser light, a KrF excimer laser (wavelength: 248 nm, pulse width: 20 nsec) was used, but another laser may be used. The irradiation condition of the laser beam is such that the energy density is 200 mJ / cm ^{2 to} 400 m.
mJ / cm ^2, for example, and 250mJ / cm ^{2, 2} shot to 10 shots per one place, for example, was 2 shots. When irradiating this laser beam,
By heating to about 0 ° C. to 450 ° C., the effect may be increased. (See Fig. 1 (D))

This step may be performed by lamp annealing using visible / near infrared light. Visible and near-infrared light is crystallized silicon, or phosphorus or boron is 10 ¹⁹ cm ^-3
It is easily absorbed by amorphous silicon to which 10 ²¹ cm ^{−3 is} added, and effective annealing comparable to thermal annealing at 1000 ° C. or higher can be performed. When phosphorus or boron is added, light is sufficiently absorbed even in the near infrared due to the impurity scattering. This can be fully inferred from the fact that the color is black even when observed with the naked eye. On the other hand, it is hardly absorbed by the glass substrate, so the glass substrate does not need to be heated to a high temperature, and only a short processing time is required. It can be said that there is.

Subsequently, a silicon oxide film 11 having a thickness of 6000.degree.
8 was formed as an interlayer insulator by a plasma CVD method. As the interlayer insulator, a two-layer film of polyimide or silicon oxide and polyimide may be used. Further, contact holes were formed, and electrodes / wirings 117, 120, and 119 of the thin film transistor were formed using a metal material, for example, a multilayer film of titanium nitride and aluminum. Finally, annealing was performed at 350 ° C. for 30 minutes in a hydrogen atmosphere at 1 atm to complete a semiconductor circuit in which the thin film transistors were configured in a complementary manner. (See FIG. 1 (E).) In particular, in the present invention, the dangling bonds generated in the optical annealing process using visible / near infrared light are replaced in a subsequent process in a hydrogen atmosphere at 250 ° C. to 400 ° C. It is important to neutralize by heating at.

The above-described circuit has a CMOS structure in which a P thin film transistor and an N thin film transistor are provided in a complementary manner. In the above-described process, two thin film transistors are simultaneously formed and cut at the center to form two independent thin film transistors. It is also possible to manufacture them simultaneously.

In this embodiment, as a method for introducing nickel, nickel is selectively thinned on the base film 102 under the amorphous silicon film 104 (it is difficult to observe nickel as a thin film). And the crystal growth is performed from this portion.
After the formation of 4, a method of selectively forming a nickel silicide film may be used. That is, crystal growth may be performed from the upper surface of the amorphous silicon film or from the lower surface. In addition, an amorphous silicon film is formed in advance, and further, nickel ions are added to the amorphous silicon film 104 by ion doping.
Alternatively, a method of selectively injecting the gas may be employed. This case has a feature that the concentration of the nickel element can be finely controlled. Further, a method using a plasma treatment or a CVD method may be used.

[Embodiment 3] This embodiment is an example in which an N-channel thin film transistor is provided as a switching element in each pixel in an active liquid crystal display device. Hereinafter, one pixel will be described, but a large number (generally, hundreds of thousands) of other pixels are formed in a similar structure. Also, instead of an N-channel type thin film transistor,
Needless to say, a channel thin film transistor may be used. Further, it can be used not only for the pixel portion of the liquid crystal display device but also for the peripheral circuit portion. Further, it can be used for image sensors and other devices. That is, as long as it is used as a thin film transistor, its use is not particularly limited.

FIGS. 2A to 2E show steps of manufacturing a thin film transistor according to a third embodiment of the present invention. In the present embodiment shown in FIG.
59 glass substrate (1.1 mm thick, 300 × 400 m
m) was used. First, a base film 202 (silicon oxide) was formed to a thickness of 2000 ° by a plasma CVD method. CVD
TEOS and oxygen were used as raw material gases for the above. After this,
In order to selectively introduce nickel, a mask 203 was formed using a silicon nitride film. Then, a nickel film was formed by a sputtering method. This nickel film was formed to a thickness of 5 ° to 200 °, for example, 20 ° by a sputtering method. Thus, the nickel film was selectively formed in the region 204. (FIG. 2 (A)
reference)

Thereafter, LPCVD or plasma C
An amorphous silicon film 205 was formed to a thickness of 1000 ° by the VD method. Then, after performing dehydrogenation at 450 ° C. for 1 hour, crystallization was performed by heat annealing. This annealing step was performed at 550 ° C. for 8 hours in a nitrogen atmosphere.
In this annealing step, 2
Since a nickel film was formed in the region 04, crystallization occurred from this portion. During this crystallization, FIG.
As shown by the arrow (B), crystal growth of silicon proceeded in the direction perpendicular to the substrate 201 in the region 204 where nickel was formed. In addition, as indicated by arrows, in regions where nickel was not deposited (regions other than region 205), crystal growth proceeded in a direction parallel to the substrate. (See FIG. 2 (B))

After this thermal annealing step, the crystallized silicon film is patterned to form the island-like active layer 2 of the thin film transistor.
Only 05 ′ remained, and the others were removed. At this time, it is important that the tip of the grown crystal does not exist in the active layer, especially in the channel formation region. Specifically, in the silicon film 205 of FIG. 2B, at least the tip of crystallization and the portion of 204 into which nickel has been introduced are removed by etching, and the crystalline silicon film 205 is removed in a direction parallel to the substrate. It is preferable to use the intermediate portion where the crystal has grown as an active layer. This is to prevent the nickel concentrated at the front end portion from adversely affecting the characteristics of the thin film transistor in view of the fact that nickel is concentrated at the front end portion and the introduction portion of the crystal growth. Then, the island-shaped active layer 205 'was irradiated with visible / near-infrared light and light-annealed. The temperature was 1100 ° C. and the time was 30 seconds. (Figure 2
(See (C))

Further, tetraethoxysilane (TE)
OS) as a raw material, a gate insulating film of silicon oxide (thickness: 70 nm to 1 nm) is formed by a plasma CVD method in an oxygen atmosphere.
(20 nm, typically 120 nm) 206 was formed.
The substrate temperature was 350 ° C. Next, a gate electrode 207 was formed by forming a known film mainly containing polycrystalline silicon by a CVD method and performing patterning. Phosphorus was introduced into polycrystalline silicon as an impurity in an amount of 0.1% to 5% in order to improve conductivity.

Thereafter, phosphorus is implanted as an N-type impurity by ion doping, and the source region 20 is self-aligned.
8, a channel formation region 209 and a drain region 210 were formed. By irradiating a KrF laser beam, the crystallinity of the silicon film having deteriorated crystallinity due to ion implantation was improved. At this time, the energy density of the laser beam was set to 250 to 300 mJ / cm ² . By this laser irradiation, the sheet resistance of the source / drain of the thin film transistor becomes 300 Ω / cm ^{2 to} 800 Ω /
cm ² . This step may be performed by lamp annealing of visible / near infrared light. (See FIG. 2 (D))

Thereafter, an interlayer insulator 211 is formed of silicon oxide or polyimide, and further, a pixel electrode 212 is formed.
Was formed by ITO. Then, a contact hole was formed, and electrodes 213 and 214 were formed of a chromium / aluminum multilayer film in source / drain regions of the thin film transistor. One of the electrodes 214 was also connected to the ITO 212. Finally, 200 to 40 in hydrogen
Annealing was performed at 0 ° C. for 2 hours to perform hydrogenation. Thus, a thin film transistor was completed. This step is
At the same time, the same process is performed in many other pixel regions.
In order to further improve the moisture resistance, a passivation film may be formed on the entire surface using silicon nitride or the like. (Figure 2
(See (E))

The thin film transistor manufactured in this embodiment is
As the active layer constituting the source region, the channel formation region, and the drain region, a crystalline silicon film grown in the direction in which carriers flow is used, so that the carriers do not cross the crystal grain boundaries. Since the crystal moves along the crystal grain boundary of the needle-like crystal, a thin film transistor with high carrier mobility can be obtained.
The thin film transistor manufactured in this embodiment is of an N-channel type and has a mobility of 90 (cm ² / Vs) to 130 (cm ² / Vs).
(Cm ² / Vs). The conventional N-channel type thin film transistor using a crystalline silicon film obtained by crystallization by thermal annealing at 600 ° C. for 48 hours was moved to 5
This is a significant improvement in characteristics as compared with 0 (cm ² / Vs) to 70 (cm ² / Vs). Further, after the step of crystallization by annealing at 550 ° C.,
Without annealing by irradiation of visible / near-infrared light, generally only low mobility and low on / off ratio were obtained. From this, it was found that the step of promoting crystallization by intense light irradiation is useful for improving the reliability of the thin film transistor.

[Embodiment 4] FIGS. 3A to 3E show steps of manufacturing a thin film transistor according to Embodiment 4 of the present invention.
This embodiment will be described with reference to FIG. First, a base film 302 is formed on a glass substrate 301, and a plasma C
An amorphous silicon film 304 having a thickness of 300 to 800 ° was formed by the VD method. Then, a nickel film was formed in a region indicated by reference numeral 300 in the same manner as in Example 1 by using a silicon oxide mask 303 having a thickness of 1000 °. Next, 550 °
C, heat annealing was performed for 8 hours to crystallize the silicon film 304. At this time, as indicated by an arrow 305, crystal growth proceeded in a direction parallel to the substrate. (FIG. 3
(See (A))

Next, the silicon film 304 is patterned
Island-shaped active layer regions 306 and 307 were formed. At this time, a region indicated by 300 in FIG. 3A is a region where nickel is directly introduced, and is a region where nickel is present at a high concentration. Also, as shown in Examples 2 and 3, nickel also exists at a high concentration at the end point of crystal growth. It has been found that these regions have a nickel concentration that is nearly an order of magnitude higher than the crystallized regions between them. Therefore, in the present embodiment, the active layer regions 306 and 307, which are regions for forming an active element, for example, a thin film transistor, are patterned so as to avoid these regions having a high nickel concentration. Then, the high concentration region of nickel was intentionally removed. The etching of the active layer was performed by the RIE method having anisotropy in the vertical direction. The nickel concentration in the active layer of this embodiment is 1 × 10
It was about ¹⁷ to 1 × 10 ¹⁹ cm ⁻³ . (See FIG. 3B)

In the present embodiment, a complementary thin film transistor circuit is obtained by utilizing the active layers 306 and 307. That is, the circuit according to the second embodiment is different from the circuit according to the second embodiment in that the P thin film transistor and the N thin film transistor are separated.
Is different from the structure shown in FIG. That is, FIG.
In the structure shown in (D), the active layers of the two thin film transistors are continuously connected, and the nickel concentration is high in the intermediate region. In this embodiment, however, regardless of which part is taken, the nickel concentration is It has the characteristic of being low. Therefore, operation stability can be improved.

Next, a silicon oxide or silicon nitride film 308 having a thickness of 200 to 3000 mm was formed by a plasma CVD method. Then, lamp annealing of visible / near infrared light was performed in the same manner as in Example 2. The conditions were the same as in Example 3. In the present embodiment, a protective film of silicon oxide or silicon nitride is formed on the surface of the active layer during irradiation of visible / near infrared light, so that the surface is roughened or contaminated during irradiation of infrared light. Could be prevented. (See FIG. 3 (C))

After the irradiation with visible / near infrared light, the protective film 308 was removed. Thereafter, the gate insulating film 30 is formed in the same manner as in the second embodiment.
9. Gate electrodes 310 and 311 are formed (see FIG. 3D), an interlayer insulator 312 is formed, contact holes are formed therein, and metal wirings 313, 314 and 315 are formed.
Was formed. (See FIG. 3E.) Thus, a complementary thin film transistor circuit was formed. In the present embodiment, a protective film is formed on the surface of the active layer upon irradiation with visible / near infrared light, so that surface roughness and contamination are prevented. Therefore, the characteristics (electric field mobility and threshold voltage) and reliability of the thin film transistor of this example were extremely good.

[0055]

According to the present invention, the crystalline silicon film crystallized by heat annealing is additionally subjected to light annealing of visible / near infrared light irradiation, thereby further improving the crystallinity. At the same time, the film quality could be densified, and a silicon film having good crystallinity could be obtained. According to the present invention, after an insulating film is formed on a silicon film, annealing is performed by irradiating infrared light, whereby interface levels can be reduced. After these steps, hydrogenation annealing is performed. 200 ° C ~ 4 in hydrogen atmosphere
By the treatment at 50 ° C, dangling bonds could be removed and neutralized. According to the present invention, it is extremely effective particularly for forming an insulating gate type semiconductor device.

[Brief description of the drawings]

FIGS. 1A to 1E show steps of manufacturing a thin film transistor of Example 1 and Example 2 of the present invention.

FIGS. 2A to 2E show steps of manufacturing a thin film transistor according to a third embodiment of the present invention.

FIGS. 3A to 3E show steps of manufacturing a thin film transistor according to Example 4 of the present invention.

FIG. 4 shows the results of Raman scattering spectroscopy of the crystalline silicon film obtained according to Example 1 of the present invention.

5 (A) and (B) show Example 1 of the present invention.
3 shows an example of temperature setting.

[Explanation of symbols]

 Reference Signs List 101 glass substrate 102 base film (silicon oxide film) 103 mask 104 silicon film 104 'island-like silicon film (active layer) 105 direction of crystallization 106 gate insulating film (silicon oxide film) 107 gate electrode (aluminum) 108 anodized layer (Aluminum oxide) 109 Gate electrode 110 Anodized layer 111 Source (drain) region 112 Channel formation region 113 Drain (source) region 114 Source (drain) region 115 Channel formation region 116 Drain (source) region 117 Electrode 118 Interlayer insulator 119 Electrode 120 electrode

Continuation of the front page (56) References JP-A-3-95921 (JP, A) JP-A-2-275622 (JP, A) JP-A-1-196116 (JP, A) JP-A-62-298150 (JP) , A) (58) Field surveyed (Int.Cl. ⁶ , DB name) H01L 21/20

Claims (4)

(57) [Claims] A step of forming a non-single-crystal silicon film on a substrate; a step of causing the non-single-crystal silicon film to contain a metal element for selectively promoting crystallization; and heating the non-single-crystal silicon film. A method for manufacturing a semiconductor device, comprising: annealing; and optically annealing the non-single-crystal silicon film in a hydrogen atmosphere containing a compound of fluorine, chlorine, or bromine, or in a hydrogen atmosphere containing hydrogen halide. 2. A step of forming a non-single-crystal silicon film on a substrate; a step of causing the non-single-crystal silicon film to contain a metal element that selectively promotes crystallization; and heating the non-single-crystal silicon film. Annealing, after the step, a step of removing at least a portion of the non-single-crystal silicon film containing the metal element and a crystallization tip, fluorine, chlorine, A photoannealing step in a hydrogen atmosphere containing a bromine compound or in a hydrogen atmosphere containing hydrogen halide. 3. The method for manufacturing a semiconductor device according to claim 1, wherein the metal element which promotes crystallization is nickel. 4. The method for manufacturing a semiconductor device according to claim 1, wherein a wavelength of light used in the light annealing step has a maximum peak from visible light to near infrared light.