JP2003264199A - Manufacturing method of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To form a gate insulating film without exerting an influence on a substrate material in a process for manufacturing a semiconductor device with superior characteristics, reliability, and yield by using a crystalline silicon film. <P>SOLUTION: A base film is formed on a substrate by a plasma CVD method, and an island-shaped crystalline silicon film is formed on the base film. While the substrate is heated at a temperature not more than a distortion temperature, the island-shaped crystalline silicon film is annealed by heat under an oxidizing atmosphere. A gate insulating film is formed on the island-shaped crystalline silicon film by a plasma CVD method, and a gate electrode is formed on the gate insulating film. In this case, a thermal oxide film is formed on the surface of the island-shaped crystalline silicon film by annealing by heat, and the gate insulating film is formed on the thermal oxide film. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having an insulating gate structure using a non-single-crystal silicon film provided on an insulating substrate such as glass or an insulating coating formed on various substrates, for example, The present invention relates to a method for manufacturing a thin film transistor (TFT), a thin film diode (TFD), or a thin film integrated circuit using them, particularly a thin film integrated circuit for an active liquid crystal display device (liquid crystal display).

[0002]

2. Description of the Related Art In recent years, semiconductor devices having TFTs on an insulating substrate such as glass, for example, active type liquid crystal display devices using TFTs for driving pixels and image sensors have been developed.

Thin film silicon semiconductors are generally used for TFTs used in these devices. The thin-film silicon semiconductor is roughly classified into two, that is, an amorphous silicon semiconductor (a-Si) and a crystalline silicon semiconductor. Amorphous silicon semiconductors are the most commonly used because they have a low manufacturing temperature, can be relatively easily manufactured by the vapor phase method, and have high mass productivity. Since it is inferior to the silicon semiconductors it has,
In order to obtain higher speed characteristics in the future, establishment of a method for manufacturing a TFT made of a crystalline silicon semiconductor has been strongly demanded. As the crystalline silicon semiconductor, polycrystalline silicon, microcrystalline silicon, amorphous silicon containing a crystalline component, semi-amorphous silicon having an intermediate state between crystalline and amorphous are known. .

In order to obtain an insulating gate structure using these silicon films, it is necessary to form an insulating film having excellent interface characteristics on the surface of the silicon film by some means. For example, if it is on a substrate such as a quartz substrate that can withstand high temperatures, a gate insulating film could be obtained by means of thermal oxidation. Since a quartz substrate is expensive and has a high melting point, and thus it is difficult to increase the area, it is possible to use another glass material (for example, Corning 705) which has a low melting point, is more excellent in mass productivity, and is inexpensive.
It was desired to use # 9) as a substrate. But,
When a cheaper substrate material is used, there is a problem that the substrate cannot withstand the high temperature enough to obtain a thermal oxide film. Therefore, the physical vapor deposition method (PV
D method such as sputtering method and chemical vapor deposition method (CVD
Method such as plasma CVD method or photo CVD method).

However, the insulating films produced by the PVD method and the CVD method have many pinholes and the interface characteristics are not good. Therefore, when the TFT is used, the electric field mobility and the subthreshold characteristic value (S value) are
There was a problem that it was not good, or that there was a large amount of leakage current in the gate electrode, the deterioration was severe, and the yield was low. In particular, in the case of a TFT using amorphous silicon which originally has low mobility, such characteristics of the gate insulating film did not cause much problem, but in a TFT using a crystalline silicon film having high mobility, However, the characteristics of the gate insulating film are more serious than the silicon film itself.

[0006]

SUMMARY OF THE INVENTION The present invention provides means for solving the above problems. That is, by using a crystalline silicon film, TF excellent in characteristics, reliability and yield is obtained.
In the case of providing the manufacturing method of T, it is an object to provide a manufacturing method of the gate insulating film and a structure of the gate insulating film under conditions that do not particularly affect the substrate material.

[Means for Solving the Problems]

According to the present invention, the island-shaped crystalline silicon film is irradiated with strong light having a wavelength and a duration that do not affect the substrate material in an oxidizing atmosphere of oxygen, nitrogen oxide, ozone, or the like, or By thermally annealing the island-shaped crystalline silicon film at a temperature that does not affect the substrate material, a thin silicon oxide film (thermal oxide film) is formed on the surface of the island-shaped crystalline silicon film. Is characterized in that a thick insulating film is formed by the PVD method or the CVD method to obtain a gate insulating film having a desired thickness.

In the present invention, when irradiating with light,
For example, light from near-infrared light to visible light, preferably light having a wavelength of 4 μm to 0.5 μm (for example, wavelength 1.3 μm
Infrared light having a peak at 10) to 10 to 1
It is desirable to raise the temperature of the surface of the silicon film to 900 to 1200 ° C. by performing irradiation for a relatively short time of about 000 seconds. Light of this wavelength is absorbed by the silicon film and is not substantially absorbed by the substrate, so that the silicon film alone can be selectively heated during the above irradiation time without affecting the substrate.

When using ultraviolet light having a shorter wavelength,
Not only the silicon film is absorbed by many substrate materials, but the optimal light duration is shorter. For example, 24
It is desired to be 1 μsec or less at a wavelength of 8 nm. If irradiation is performed for a longer time than that, a considerable amount of light is also absorbed in the substrate, and the substrate is deformed. As described above, it is necessary to select the amount of light such that the temperature of the surface of the silicon film instantaneously becomes a high temperature exceeding 1000 ° C. in the irradiation of light for an extremely short time. In addition, since the temperature rises and falls instantaneously, the oxidation does not proceed sufficiently with one irradiation, so it is necessary to perform the irradiation a plurality of times. In this case, the thickness of the obtained oxide film depends on the number of times of irradiation. Ideally, a pulsed laser such as an excimer laser is used to perform irradiation in such an extremely short time using ultraviolet light as a light source. The pulse width of various excimer lasers is 100 nsec or less. Further, in the present invention, the substrate temperature may be raised up to 600 ° C., preferably 400 ° C., when irradiating strong light.

Further, in the present invention, when the thermal annealing is performed, it is desirable that the thermal annealing is performed at a temperature at which the substrate is not affected by warping, shrinkage or the like.
It is desirable to carry out at a medium temperature condition of 00 ° C, preferably 500 to 600 ° C. Generally, it should be performed below the strain temperature (strain point) of the substrate, but by thermally treating the substrate in advance to release the internal strain energy, sufficient shrinkage can be achieved above the strain temperature. Since it can be made extremely small, in this case, the temperature may be higher than the strain temperature. The insulating film formed by the PVD method or the CVD method after the above intense light irradiation or thermal annealing is generally a silicon oxide film, but may be a silicon nitride film or a silicon oxynitride film.

As the method for producing the crystalline silicon film used in the present invention, either crystallization by irradiation of laser or strong light equivalent thereto or crystallization by thermal annealing can be adopted. In particular, in the case of thermal annealing, when a method of performing crystallization at a temperature lower than the normal solid-phase growth temperature by using a metal element that promotes crystallization such as nickel, the present invention has a new effect. Cause Fe, Co, Ni and R, which are Group 8 elements, are used as elements that promote crystallization.
u, Rh, Pd, Os, Ir and Pt can be used. Also, 3d elements such as Sc, Ti, V, Cr, Mn,
Cu and Zn can also be used. Further, according to the experiment, the crystallization effect is confirmed also in Au and Ag. In particular, among the above elements, Ni has a remarkable effect, and the operation of the TFT has been confirmed by using the crystalline silicon film crystallized by the action.

It has been observed that crystals grow like needles in the silicon film to which these metals are added. However,
The entire surface is not crystallized, and an amorphous region or a region of low crystallinity equivalent thereto is left between the crystals. In such a silicon film to which a metal element is added, crystals grow like needles, and the width thereof is 0.5 to 2 times the thickness of the film.
In addition, the growth is not in the <111> direction but in the width direction, that is, the growth on the side surface of the crystal is small. Therefore, the amorphous region does not crystallize even if it is annealed for a long time, and when this is used for a TFT, deterioration of characteristics becomes a problem. However, when the above method of irradiating strong light is adopted, a part of the light energy is also used for crystal growth, and the growth on the side surface of the crystal is promoted. Therefore, a dense crystalline silicon film can be obtained. Further, the crystallinity may be further improved by irradiating strong light and then performing thermal annealing again. Further, such intense light irradiation and thermal annealing may be repeated a plurality of times.

The thickness of the thermal oxide film obtained by irradiating strong light or annealing at a medium temperature is 20 to 200.
Å, typically 100 Å, but known PVD method, C
Unlike the film formed by the VD method, it is a film that is very dense and has a uniform thickness without pinholes. The interface with the silicon film is also in an ideal state. Since a thicker insulating film, typically a silicon oxide film, is stacked on this thermal oxide film, the leak current due to the pinhole is small and the yield is improved.

Since the interface with the silicon film is good,
When TFT is used, various characteristic values are improved and reliability is high. In particular, as shown in FIG. 5 (A), in the conventional TFT process, when the island-shaped silicon film was formed, overetching caused holes at the edges of the silicon film. This was particularly noticeable when the base film was soft (the etching rate was high). In addition, the conventional PVD method and the CVD method were not able to satisfactorily fill these holes, and a leak current was often generated due to cracks or the like. (Fig. 5 (B)) However,
In the present invention, since a thermally-oxidized film having a uniform thickness and having no pinholes is formed around the silicon film, even if the above crack occurs, there is almost no problem in use. (Fig. 5 (C))

[0015]

[Embodiment 1] This embodiment is a P-channel TFT (P-type TFT using a crystalline silicon film formed on a glass substrate.
This is an example of forming a circuit in which a TFT and a N-channel TFT (referred to as NTFT) are complementarily combined. The structure of this embodiment can be used for a switching element of a pixel electrode of an active type liquid crystal display device, a peripheral driver circuit, an image sensor and an integrated circuit.

FIG. 1 shows a cross-sectional view of the manufacturing process of this embodiment. First, a 2000-Å-thick silicon oxide base film 102 was formed on a substrate (Corning 7059) 101 by a sputtering method. The substrate is annealed at a temperature higher than the strain temperature before or after the formation of the base film, and then gradually cooled to the strain temperature or less at 0.1 to 1.0 ° C./min. Substrate shrinkage is small in the accompanying steps (including the infrared light irradiation of the present invention and the oxidation step by thermal annealing), and mask alignment is ready. For Corning 7059 substrates, after annealing at 620-660 ° C for 1-4 hours, 0.1-1.0 ° C / min, preferably 0.
It is advisable to perform slow cooling at 1 to 0.3 ° C./min and take out when the temperature has dropped to 450 to 590 ° C.

Next, a thickness of 5 is obtained by the plasma CVD method.
An intrinsic (I-type) amorphous silicon film having a thickness of 00 to 1500 Å, for example 1000 Å, was formed. Then, it is annealed in a nitrogen-inert atmosphere (atmospheric pressure) at 600 ° C. for 48 hours to be crystallized, and the silicon film is patterned into a size of 10 to 1000 μm to form an island-shaped silicon film (active layer of TFT) 103. Was formed. Then, in an oxygen atmosphere, infrared light having a peak at 0.5 to 4 μm, here 0.8 to 1.4 μm, is added to 30 to 1
Irradiate for 80 seconds, and the silicon oxide film 104 is formed on the surface of the active layer 103.
Was formed. It was acceptable to mix 0.1-10% HCl in the atmosphere. (Fig. 1 (A))

A halogen lamp was used as the infrared light source. The intensity of infrared light was adjusted so that the temperature on the monitor single crystal silicon wafer was between 900 and 1200 ° C. Specifically, the temperature of the thermocouple embedded in the silicon wafer was monitored and fed back to the infrared light source. In this embodiment, the temperature rising / falling temperature is as shown in FIG.
It carried out like (A) or (B). The temperature rise is constant, the speed is 50 to 200 ° C / sec, and the temperature fall is 20 by natural cooling.
Was ~ 100 ° C.

FIG. 4A shows a general temperature cycle, which is composed of three processes of a temperature raising time a, a holding time b, and a temperature lowering time c. However, in this case, since the sample is rapidly heated and cooled from room temperature to a temperature as high as 1000 ° C., and further from a high temperature state to room temperature, it has a great influence on the silicon film and the substrate, and the silicon film may be peeled off. high. In order to solve this problem, as shown in FIG. 4B, a preheat time d or a postheat time f is provided before reaching the holding time, and a substrate or a film at 200 to 500 ° C. is provided before reaching the holding time. It is desirable to keep the temperature so that it does not have a great influence.

Since this infrared light irradiation selectively heats the silicon film, the heating of the glass substrate can be minimized. And it is also very effective in reducing defects and intangible bonds in the silicon film. The thickness of the silicon oxide 104 formed by this infrared light irradiation is 50 to 1
It was 50Å.

Next, a thickness of 10 is obtained by the plasma CVD method.
A 00Å silicon oxide film 105 was formed as a gate insulating film. TEOS (tetra-ethoxy-silane, Si (OC ₂ H ₅ ) ₄ ) and oxygen are used as source gases for CVD,
The substrate temperature during film formation is 300 to 550 ° C., for example 400 ° C.
And (Fig. 1 (B))

Subsequently, by the sputtering method,
A film of aluminum (containing 0.01 to 0.2% scandium) having a thickness of 6000 to 8000Å, for example, 6000Å was formed. Then, the aluminum film was patterned to form the gate electrodes 106 and 108. Further, the surface of the aluminum electrode was anodized to form oxide layers 107 and 109 on the surface. This anodic oxidation was performed in an ethylene glycol solution containing 1-5% tartaric acid. The thickness of the obtained oxide layers 107 and 109 is 200.
It was 0Å. Since the oxides 107 and 109 have a thickness to form the offset gate region in the subsequent ion doping process, the length of the offset gate region can be determined in the anodizing process.

Next, an ion doping method (plasma doping)
The active layer region (source / drain
Rain, which constitutes the channel),
The gate electrode 106 and the oxide layer 107 around it, the gate
Using the electrode 108 and the oxide layer 109 around it as a mask,
Add impurities that impart P or N conductivity type in a self-aligning manner.
Added As a doping gas, phosphine (P
H₃) And diborane (B ₂H₆), The former case
Is an acceleration voltage of 60 to 90 kV, for example 80 kV, the latter
In the case of, it is set to 40 to 80 kV, for example, 65 kV. Do
1 x 10¹⁵~ 8 × 10¹⁵cm^-2, For example, phosphorus
5 x 10¹⁵cm^-2, Boron 2 × 10¹⁵And Dopi
When coating, cover one area with photoresist.
By selectively doping each element with
It was As a result, the N type impurity regions 113 and 115, the P type
Impurity regions 110 and 112 of the
TFT (PTFT) area and N-channel TFT (NT
It was possible to form a region with FT).

After that, annealing was performed by irradiation with laser light. As the laser light, a KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) was used, but another laser may be used. The laser light irradiation conditions are energy density of 200 to 400 mJ / cm ² ,
For example, 250 mJ / cm ² and ² to 10 per place
Shot, for example, 2 shots were irradiated. The effect may be increased by heating the substrate to about 200 to 450 ° C. during the irradiation of the laser light. (Fig. 1 (C))

Further, this step may be performed by lamp annealing with near infrared light. Near-infrared rays are more easily absorbed by crystallized silicon than by amorphous silicon, and effective annealing comparable to thermal annealing at 1000 ° C. or higher can be performed. On the other hand, a glass substrate (far infrared light is absorbed by the glass substrate, but visible / near infrared light (wavelength 0.5 to 4
(μm) is hard to be absorbed to), so the glass substrate does not have to be heated to a high temperature and can be processed in a short time, so it is an optimal method in the process where shrinkage of the glass substrate is a problem. Can be said.

Subsequently, a silicon oxide film 11 having a thickness of 6000Å
6 was formed as an interlayer insulator by the plasma CVD method. Polyimide may be used as the interlayer insulator. Further, a contact hole is formed, and TF is formed by a metal material, for example, a multilayer film of titanium nitride and aluminum.
T electrodes / wirings 117, 118, and 119 were formed. Finally, annealing was carried out at 350 ° C. for 30 minutes in a hydrogen atmosphere of 1 atm to complete a semiconductor circuit having a complementary TFT structure. (Fig. 1 (D))

The circuit shown above has a CMOS structure in which PTFT and NTFT are provided in a complementary type, but in the above process, two independent TFTs are simultaneously formed by simultaneously forming two TFTs and cutting them at the center. It is also possible to produce. Regarding the characteristics of the TFT obtained in this example, the mobility of NTFT is 110 to 150 cm ² / Vs,
S value is 0.2-0.5V / digit, mobility of PTFT is 90
˜120 cm ² / Vs, S value is 0.4 to 0.6 V / digit, and the mobility is 20% or more higher than that in the case where the gate insulating film is formed by the known PVD method or CVD method.
The value was halved.

[Embodiment 2] This embodiment also relates to a complementary TFT circuit. An outline of the manufacturing process of this embodiment is shown in FIG.
Shown in. In this embodiment, a Corning 7059 glass substrate (thickness 1.1 mm, 300 × 4) is used as the substrate 201.
00 mm) was used. Initially 640 as in Example 1.
A substrate was used, which was annealed at 0 ° C. for 1 hour and then gradually cooled to 580 ° C. at 0.2 ° C./minute. Then, the base film 202 (silicon oxide) was formed to a thickness of 2000 Å by the plasma CVD method. TEOS and oxygen were used as source gases for CVD. The substrate temperature was 350 ° C. A sputtering method may be used instead of the plasma CVD method.

After this, the LPCVD method or plasma C
An amorphous silicon film 205 was formed to a thickness of 500Å by the VD method. This was patterned to form an active layer 203 of the TFT. After dehydrogenation at 450 ° C. for 1 hour, laser irradiation was performed to crystallize. A KrF excimer laser (wavelength: 248 nm) was used as a laser, and a laser beam having an energy density of 250 to 450 mJ / cm ² was irradiated at one location for 2 shots. Laser irradiation is performed in vacuum, and the substrate temperature is 350 to 500.
℃ was made. After the laser irradiation step, the substrate was annealed in an oxygen atmosphere at 600 ° C. for 1 hour. As a result, a thermal oxide film 204 having a thickness of 20 to 200Å, typically 40 to 100Å, was formed on the surface of the active layer. (Fig. 2 (A))

Further, tetra ethoxy silane (TEO
S) as a raw material by a plasma CVD method in an oxygen atmosphere by a silicon oxide gate insulating film (thickness 70 to 120 n
m, typically 120 nm) 206. During film formation, trichloroethylene (TCE) was added at a flow rate ratio of 3 to 50% with respect to TEOS. The substrate temperature was 350 ° C. Thus, the gate insulating film 205 was formed. (Fig. 2
(B) Next, a gate electrode 206, 208 was formed by forming an aluminum film having a thickness of 6000Å by a sputtering method and performing patterning. Then, in the same manner as in Example 1, the periphery of the gate electrode was covered with anodic oxides 207 and 209.

After that, N-type and P-type impurities are implanted by an ion doping method to self-align with the P-type source region 2.
10, P-type drain region 212, N-type source region 21
3, N-type drain region 215, channel forming region 21
1, 214 were formed. Then, by irradiating the KrF laser beam, the crystallinity of the silicon film whose crystallinity was deteriorated due to the introduction of impurities was improved. At this time, the energy density of the laser light was set to 250 to 300 mJ / cm ² . By this laser irradiation, the sheet resistance of the source / drain of this TFT became 300 to 800 Ω / cm ² . Further, this step may be performed by lamp annealing of infrared light. (Fig. 2 (C))

After that, an interlayer insulator 216 was formed from silicon oxide or polyimide, a contact hole was formed, and electrodes 217, 218, and 219 were formed by a chromium / aluminum multilayer film in the source / drain regions of the TFT. Finally, hydrogenation was performed by annealing in hydrogen at 200 to 400 ° C. for 2 hours. In this way, the TFT
Was completed. Further, in order to further improve the moisture resistance, a passivation film may be formed on the entire surface with silicon nitride or the like. (Fig. 2 (D))

[Embodiment 3] This embodiment will be described with reference to FIG. First, as the glass substrate 301, Corning 70
After using a 59 substrate and annealing at 620 to 660 ° C. for 1 to 4 hours, 0.1 to 1.0 ° C./min, preferably 0.1
It was slowly cooled at ~ 0.3 ° C / min, and was taken out when the temperature dropped to 450 to 590 ° C. Then, the base film 3 is formed on the substrate.
02, and further, an amorphous silicon film 30 having a thickness of 300 to 800 Å by the plasma CVD method.
3 was deposited. Then, using a silicon oxide mask 304 having a thickness of 1000Å, a thickness of 20 to
A 50Å nickel film was formed by the sputtering method. The nickel film does not have to be a continuous film. After that, the silicon film 303 was crystallized by performing heat annealing at 500 to 620 ° C., for example, 550 ° C. for 8 hours in a nitrogen atmosphere. Crystallization started from a region 305 where the nickel film and the silicon film were in contact with each other, and crystal growth proceeded in a direction parallel to the substrate as indicated by an arrow. (Fig. 3 (A))

Next, the silicon film 304 was patterned to form island-shaped active layer regions 306 and 307.
At this time, the region indicated by 300 in FIG. 3A is a region into which nickel is directly introduced, and is a region in which nickel exists in a high concentration. Further, as shown in Examples 2 and 3, nickel also exists in high concentration at the tip of crystal growth. It has been found that the nickel concentration in these regions is higher than that of the crystallized regions by almost one digit. Therefore, in this embodiment, the active layer regions 306 and 307 are patterned while avoiding the regions having high nickel concentration, and the regions having high nickel concentration are removed. And, in the region where nickel is almost absent, T
An active layer of FT was formed. The etching of the active layer was performed by the RIE method having anisotropy in the vertical direction. The nickel concentration in the active layer of this example is 10 ¹⁷ to 10 ¹⁹ cm ^−3.
It was about. Thereafter, irradiation with visible / near infrared light was performed under the same conditions as in Example 1 to obtain a silicon oxide film 308 having a thickness of 50 to 150Å on the surfaces of the active layers 306 and 307, and crystallized by the above thermal annealing. The crystallinity of the region was further improved. (Fig. 3 (B))

After that, as in the first embodiment, the gate insulating film 3 is formed.
09 (FIG. 3C), and gate electrodes 310 and 311 are formed.
And P-type and N-type impurities are introduced (see FIG.
(D)), an interlayer insulator 312 is formed, a contact hole is formed in this, and metal wirings 313, 314, 31 are formed.
5 was formed. (Fig. 3 (E))

[Embodiment 4] An outline of the steps of this embodiment is shown in FIG.
Shown in. This example is an example of a step of irradiating an island-shaped silicon film with KrF excimer laser light (wavelength 248 nm) in an oxidizing atmosphere to form a thin oxide film on the surface and promote crystallization of the silicon film. is there.
The process of forming the switching transistor of the pixel of the active matrix circuit using the silicon film thus treated will be described below with reference to FIG.

As in Example 3, a substrate 601 was used, which was first annealed at 640 ° C. for 1 hour and then gradually cooled to 580 ° C. at 0.2 ° C./min. On the substrate, a base film 602 (silicon oxide, thickness 2000Å), an amorphous silicon film 603 (thickness 50
0 Å) is formed on the surface of the amorphous silicon film 603 by thermal oxidation or treatment with an oxidizing agent such as hydrogen peroxide solution.
A silicon oxide film having a thickness of 10 to 100Å was formed. In this state, an extremely thin nickel acetate layer 604 was formed by spin coating. Water or ethanol is used as the solvent, and the concentration of nickel acetate is 10 to 5
It was set to 0 ppm. (Fig. 6 (A))

The substrate is then placed in a nitrogen atmosphere at 550 ° C. for 4 hours.
Annealed for ~ 8 hours. As a result, the amorphous silicon film 603 was crystallized by the crystallization promoting action of nickel. In this crystallization, it has been confirmed that a part of the film has a region with a size of 1 to several μm that is left as it is in an amorphous state.

Next, the silicon film was etched by a known photolithography method to obtain island-shaped silicon regions 605. The oxide film remaining on the surface of the silicon film was removed at this stage. Next, the substrate is placed in an oxygen atmosphere, where KrF
Irradiated with excimer laser light. The irradiation energy density is 250 to 450 mJ / cm ² , for example, 300
It was set to mJ / cm ^2, and 10 to 50 shots were irradiated per site. As a result, a silicon oxide film 606 having a thickness of 10 to 50Å was obtained. The energy density of the laser and the number of shots may be selected depending on the thickness of the silicon oxide film 606 to be obtained. In addition, the amorphous region remaining in the crystalline silicon film was crystallized by the laser irradiation step, and the crystallinity of the silicon film could be improved. After this step, thermal annealing may be performed again under the same conditions as above. (Fig. 6 (B))

Next, the thickness 12 is obtained by the plasma CVD method.
A 00Å silicon oxide film 607 was formed as a gate insulating film. TEOS (tetra-ethoxy-silane, Si (OC ₂ H ₅ ) ₄ ) and oxygen are used as source gases for CVD,
The substrate temperature during film formation is 300 to 550 ° C., for example 400 ° C.
And (Fig. 6 (C))

Subsequently, by the sputtering method,
A film of aluminum (containing 0.01 to 0.2% scandium) having a thickness of 3000 to 8000 Å, for example, 6000 Å was formed. Then, the aluminum film was patterned to form a gate electrode 608.

Next, by the ion doping method, using the gate electrode 608 as a mask, impurities that impart the P conductivity type are added in a self-aligning manner. Diborane (B ₂ H ₆ ) was used as a doping gas, and the acceleration voltage was 40 to 80 k.
V, for example, 65 kV. The dose amount is 1 × 10 ^{14 to} 5
It was set to x10 ¹⁵ cm ^-2 , for example, 5 x 10 ¹⁴ cm ^-2 . As a result, P-type impurity regions 609 and 610 were formed. After that, annealing was performed by irradiation with laser light. A KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) was used as the laser light.
The conditions were the same as in Example 1. (Figure 6 (D))

Then, a silicon oxide film 61 having a thickness of 6000Å is formed.
1 as an interlayer insulator by a plasma CVD method, contact holes are formed, and a metal material such as
An electrode / wiring 612 was formed in the P-type impurity region 609 by a multilayer film of titanium nitride and aluminum. further,
Thickness of 2000-5000 by plasma CVD method
Å For example, a 3000 Å silicon nitride film 613 was formed as a passivation film, and the silicon oxide film 611 was etched to form a contact hole in the impurity region 610. Finally, an indium tin oxide coating film (thickness 1000 Å) which is a transparent conductive material was formed by a sputtering method, and this was etched to form a pixel electrode 614. (Fig. 6 (E))

The pixel transistors of the active matrix circuit could be formed by the above steps. An active matrix circuit can be formed by arranging such elements in a matrix. Although the KrF excimer laser is used as the laser in this embodiment, it goes without saying that other lasers may be used.

[0045]

The island-shaped silicon film to be the active layer of the TFT is irradiated with strong light having a wavelength not absorbed by the substrate in an oxidizing atmosphere, or annealed in an oxidizing atmosphere at a temperature at which the substrate does not warp or shrink. By forming a dense thermal oxide film of uniform thickness without pinholes on the surface of the active layer, and further forming a thick insulating film by a known CVD method or PVD method, The characteristics and reliability of the gate insulating film could be significantly improved.

Although only the complementary TFT circuit is taken up in the embodiment, the T used in the active matrix is used.
It will be obvious that it can also be applied to FT. According to the present invention, the characteristics that have been conventionally obtained only by using an expensive substrate such as quartz can be obtained even by a cheaper substrate. As described above, the present invention has great industrial benefits.

[Brief description of drawings]

1A to 1C show steps of manufacturing a TFT of Example 1. FIG.

FIG. 2 shows a process of manufacturing a TFT of Example 2.

FIG. 3 shows a manufacturing process of a TFT of Example 3.

FIG. 4 shows an example of temperature setting according to the first embodiment.

FIG. 5 shows a difference between a conventional gate insulating film and a gate insulating film of the present invention.

FIG. 6 shows a manufacturing process of a TFT of Example 4.

[Explanation of symbols]

101 glass substrate 102 Base film (silicon oxide film) 103 mask 104 Thin thermal oxide film (silicon oxide) 105 Gate insulating film (silicon oxide) 106 Gate electrode (aluminum) 107 Anodized layer (aluminum oxide) 108 Gate electrode 109 Anodized layer 110 source (drain) region 111 channel formation region 112 Drain (source) region 113 source (drain) region 114 channel formation region 115 drain (source) region 116 Interlayer insulator 117 electrodes 118 electrodes 119 electrodes

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) H01L 27/092 H01L 27/08 321B 29/786 29/78 617U (72) Inventor Hiroshi Uehara Atsugi City, Kanagawa Prefecture Hase 398 Address, Semiconductor Energy Research Institute, Inc. (72) Inventor Yasuhiko Takemura Yasuhiko Takemura, Atsugi City, Kanagawa Prefecture 398 Hase Conductor Energy Research Institute, F Term (reference) 5F048 AC04 BA16 BB04 BC16 BF01 BF02 DA22 5F052 AA02 AA11 AA17 BB07 DA02 DB02 DB03 EA15 FA06 JA01 JA04 5F058 BA04 BD04 BF54 BF55 BF62 BF80 BJ04 5F110 AA01 AA06 AA14 AA17 BB02 BB04 BB10 CC02 DD02 DD13 DD25 EE03 EE06 HL03 HL04 HL34 HL04 HL34 HL34 HL34 HL34 FF30 GG34 NN23 NN24 NN27 NN35 NN72 PP01 PP02 PP03 PP10 PP13 PP23 PP29 PP31 PP34 PP35 QQ11 QQ24

Claims (8)

[Claims] 1. An underlayer film is formed on a glass substrate by a plasma CVD method, an island-shaped crystalline silicon film is formed on the underlayer film, and the glass substrate is heated at a temperature below its strain point. After thermally annealing the island-shaped crystalline silicon film in an oxidizing atmosphere, a gate insulating film is formed on the island-shaped crystalline silicon film by a plasma CVD method, and a gate electrode is formed on the gate insulating film. A method for manufacturing a semiconductor device, comprising: 2. A base film made of silicon oxide is formed on a glass substrate by a plasma CVD method, an island-shaped crystalline silicon film is formed on the base film, and the glass substrate is heated at a temperature not higher than its strain point. The island-shaped crystalline silicon film is thermally annealed in an oxidizing atmosphere in a heated state, and then a gate insulating film made of silicon oxide is formed on the island-shaped crystalline silicon film by a plasma CVD method. A method for manufacturing a semiconductor device, comprising forming a gate electrode on a film, and using TEOS and oxygen when forming the gate insulating film. 3. A base film made of silicon oxide is formed on a glass substrate by a plasma CVD method, an island-shaped crystalline silicon film is formed on the base film, and the glass substrate is heated at a temperature below its strain point. The island-shaped crystalline silicon film is thermally annealed in a heated state in oxygen, and then a gate insulating film made of silicon oxide is formed on the island-shaped crystalline silicon film by a plasma CVD method. A method of manufacturing a semiconductor device, comprising forming a gate electrode on the gate electrode, and using TEOS and oxygen when forming the gate insulating film. 4. A base film made of silicon oxide is formed on a glass substrate by a plasma CVD method, an island-shaped crystalline silicon film is formed on the base film, and the glass substrate is heated at a temperature below its strain point. The island-shaped crystalline silicon film is thermally annealed in an oxidizing atmosphere in a heated state, and then a gate insulating film made of silicon oxide is formed on the island-shaped crystalline silicon film by a plasma CVD method. A method for manufacturing a semiconductor device, comprising forming a gate electrode on a film and using TEOS and oxygen when forming the base film. 5. A base film made of silicon oxide is formed on a glass substrate by a plasma CVD method, an island-shaped crystalline silicon film is formed on the base film, and the glass substrate is heated at a temperature below its strain point. The island-shaped crystalline silicon film is thermally annealed in a heated state in oxygen, and then a gate insulating film made of silicon oxide is formed on the island-shaped crystalline silicon film by a plasma CVD method. A method of manufacturing a semiconductor device, which comprises forming a gate electrode on top and using TEOS and oxygen when forming the base film. 6. A plasma CV on an insulating substrate other than a quartz substrate.
A base film is formed by the D method, an island-shaped crystalline silicon film is formed on the base film, and the island-shaped crystalline silicon film is oxidized while the insulating substrate is heated at a temperature of 400 to 700 ° C. After thermal annealing in an atmosphere, a gate insulating film is formed on the island-shaped crystalline silicon film by a plasma CVD method, and a gate electrode is formed on the gate insulating film. . 7. Plasma CV on an insulating substrate other than a quartz substrate.
A base film is formed by the D method, an island-shaped crystalline silicon film is formed on the base film, and the island-shaped crystalline silicon film is oxidized while the insulating substrate is heated at a temperature of 400 to 700 ° C. After thermal annealing in an atmosphere, a gate insulating film made of silicon oxide or silicon oxynitride is formed on the island-shaped crystalline silicon film by a plasma CVD method, and a gate electrode is formed on the gate insulating film. A method for manufacturing a characteristic semiconductor device. 8. The thermal oxide film according to claim 1, wherein a thermal oxide film is formed on a surface of the island-shaped crystalline silicon film by the thermal annealing, and the gate insulating film is the thermal oxide film. A method for manufacturing a semiconductor device, which is formed on a film.