JPH1197243A - Electronic component and its manufacture - Google Patents

Electronic component and its manufacture

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Publication number
JPH1197243A
JPH1197243A JP9250571A JP25057197A JPH1197243A JP H1197243 A JPH1197243 A JP H1197243A JP 9250571 A JP9250571 A JP 9250571A JP 25057197 A JP25057197 A JP 25057197A JP H1197243 A JPH1197243 A JP H1197243A
Authority
JP
Japan
Prior art keywords
insulating layer
electronic component
pattern
width
conductive pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9250571A
Other languages
Japanese (ja)
Inventor
Kazuya Kimura
一弥 木村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokin Corp
Original Assignee
Tokin Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokin Corp filed Critical Tokin Corp
Priority to JP9250571A priority Critical patent/JPH1197243A/en
Publication of JPH1197243A publication Critical patent/JPH1197243A/en
Pending legal-status Critical Current

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  • Insulating Of Coils (AREA)
  • Manufacturing Cores, Coils, And Magnets (AREA)
  • Coils Or Transformers For Communication (AREA)

Abstract

PROBLEM TO BE SOLVED: To eliminate fluctuations in the overlapped area between upper and lower conductive patterns due to displacements by making the widths of a plurality of overlapping conductive patterns different from one another. SOLUTION: Laminated on a ceramic insulating substrate 1 are an insulating layer 2 made of a photosensitive benzocyclobutene, a conductive pattern 3 made of a Cu thin film, and an insulating layer 4 made of a similar resin in the order they are mentioned. Further laminated sequentially on the layer 4 are a conductive pattern 5 made of a similar metal thin film having a narrow width obtained by subtracting printing displacements due to an equipment precision from the pattern 3, an insulating layer 6 made of a similar resin, and a conductive pattern made of a similar metal having the same width as the pattern 3. Finally, a laminate is formed by covering the upper layers with an insulating layer 8. As a result, fluctuations in the overlapped area between the upper and lower conductive patterns due to the printing displacements can be eliminated.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、電子部品に関し、
詳しくは、インダクタ(L)、キヤパシタ(C)、電気
抵抗(R)素子、薄膜EMIフィルタ、コモンモードチ
ヨークコイル、カレントセンサ、信号用トランス、及び
これらを一つの部品に構成した複合電子部品等の表面実
装部品もしくは、リード部品である電子部品に関する。
TECHNICAL FIELD The present invention relates to an electronic component,
More specifically, an inductor (L), a capacitor (C), an electric resistance (R) element, a thin-film EMI filter, a common mode coil, a current sensor, a signal transformer, and a composite electronic component having these components as one component. And electronic components which are lead components.

【0002】[0002]

【従来の技術】従来、LCR素子、薄膜EMIフィル
タ、コモンモードチヨークコイル、カレントセンサ、及
び信号用トランス等の表面実装部品が知られている。特
に、チップ型電子部品は、図5に示すように、絶縁基板
上にそれぞれ、所定間隔をもって同幅の絶縁層52,5
4,56,58及び導体パターン53,55,57をフ
オトリソグラフィ、スパッタ、スピンコート等による薄
膜技術によって交互に積層し、次に絶縁基板51を個々
の積層体の大きさに応じて切断して形成されている(特
開平6−20839号参照)。
2. Description of the Related Art Conventionally, surface mount components such as an LCR element, a thin-film EMI filter, a common mode coil, a current sensor, and a signal transformer have been known. In particular, as shown in FIG. 5, chip-type electronic components are formed on insulating substrates 52, 5 having the same width at predetermined intervals.
4, 56, 58 and the conductor patterns 53, 55, 57 are alternately laminated by a thin film technique such as photolithography, sputtering, or spin coating, and then the insulating substrate 51 is cut in accordance with the size of each laminated body. (See JP-A-6-20839).

【0003】[0003]

【発明が解決しようとする課題】しかしながら、図5に
示すような積層構造体において、同一幅の導体パターン
を積層形成する際に、設備精度による印刷位置ずれは、
多少なりとも発生する。この場合、重畳の際の位置ずれ
により、上下導体パターン間での重畳面積が変動し、特
にキャパシタンス成分が変動するため、特性のバラツキ
が大きくなった。
However, when a conductor pattern having the same width is formed by lamination in the laminated structure as shown in FIG.
It occurs more or less. In this case, due to a position shift at the time of superposition, a superimposed area between the upper and lower conductor patterns fluctuates, and particularly, a capacitance component fluctuates, so that variations in characteristics are increased.

【0004】そこで、本発明の技術的課題は、積層形成
する際の設備精度による印刷位置ずれ分を考慮した幅の
広いパターン導体と、幅の狭いパターン導体とを組み合
わせて積層重畳することにより、印刷位置ずれによる上
下導体パターン間での重畳面積の変動をなくすことがで
き、キャパシタンス成分が変動しない特性精度を高めた
電子部品とその製造方法とを提供することにある。
[0004] Therefore, a technical problem of the present invention is to combine and superimpose a combination of a wide pattern conductor and a narrow pattern conductor in consideration of a printing position shift due to equipment accuracy in forming a laminate. It is an object of the present invention to provide an electronic component which can eliminate a variation in an overlapping area between upper and lower conductor patterns due to a printing position shift and has improved characteristic accuracy in which a capacitance component does not vary, and a method for manufacturing the same.

【0005】[0005]

【課題を解決するための手段】本発明によれば、基板上
に絶縁層と共に積層された複数の導体パターンを備た電
子部品において、前記複数の導体パターンにおいて重畳
される導体パターンの幅がそれぞれ異なっていることを
特徴とする電子部品が得られる。
According to the present invention, in an electronic component having a plurality of conductor patterns laminated on a substrate together with an insulating layer, the width of each of the conductor patterns superimposed on the plurality of conductor patterns is reduced. An electronic component characterized by being different is obtained.

【0006】また、本発明の一形態として、最下層の導
体パターンの幅が最も広く、しかも、上層になるに従い
一体パターンの幅が徐々に狭くなることを特徴とする電
子部品が得られる。
According to another aspect of the present invention, there is provided an electronic component characterized in that the width of the lowermost conductive pattern is the widest and that the width of the integrated pattern is gradually reduced toward the uppermost layer.

【0007】また、本発明の他の形態としては、最下層
の導体パターンの幅が最も狭く、しかも、上層になるに
従い導体パターンの幅が徐々に、広くなることを特徴と
する電子部品が得られる。
According to another aspect of the present invention, there is provided an electronic component characterized in that the width of the lowermost conductive pattern is the narrowest, and the width of the conductive pattern gradually increases as the uppermost layer is formed. Can be

【0008】さらにまた、本発明によれば、基板上に絶
縁層と共に積層された複数の導体パターンを備えた電子
部品において、前記複数の導体パターンにおいて上層の
導体パターンの幅は直下層の導体パターンに比ベて異な
っていることを特徴とする電子部品の製造方法が得られ
る。
Further, according to the present invention, in an electronic component having a plurality of conductor patterns laminated on a substrate together with an insulating layer, the width of the upper conductor pattern in the plurality of conductor patterns is set to the immediately lower conductor pattern. Thus, a method for manufacturing an electronic component, which is different from the above, can be obtained.

【0009】[0009]

【発明の実施の形態】以下、本発明の実施の形態につい
て図面を参照して説明する。
Embodiments of the present invention will be described below with reference to the drawings.

【0010】図1は本発明の第1の実施の形態による電
子部品の概略構成を示す断面図である。図1を参照し
て、厚さがおよそ0.5mmのセラミックス絶縁基板1
上に、ベンゾシクロブテン等の絶縁層2、その上にCu
薄膜からなる導体パターン3、さらに、同様な樹脂から
なる絶縁層4、その上に導体パターン3より設備精度に
よる印刷位置ずれ分を差し引いた幅の狭い同様な金属薄
膜からなる導体パターン5、さらに、同様の樹脂からな
る絶縁層6、及び導体パターン3と同じ幅の同様な金属
からなる導体パターン7を順次積層し、最後に、絶縁層
8で覆い約30μm厚の積層体を形成している。
FIG. 1 is a sectional view showing a schematic configuration of an electronic component according to a first embodiment of the present invention. Referring to FIG. 1, a ceramic insulating substrate 1 having a thickness of about 0.5 mm
On the insulating layer 2 such as benzocyclobutene,
A conductive pattern 3 made of a thin film, furthermore, an insulating layer 4 made of a similar resin, and a conductive pattern 5 made of a similar thin metal film having a narrower width than that of the conductive pattern 3 by subtracting a printing position shift due to equipment precision; An insulating layer 6 made of a similar resin and a conductive pattern 7 made of a similar metal having the same width as the conductive pattern 3 are sequentially laminated, and finally covered with an insulating layer 8 to form a laminate having a thickness of about 30 μm.

【0011】本発明の実施の形態において、導体パター
ンは、Ti及びCuスパッタ膜を下地とし、Cu薄膜を
フオトリソグラフィとメッキによって形成している。ま
た、絶縁層は、感光性のものを用いて、塗布、露光等に
よって形成されている。具体的には、次の、本発明の実
施の形態による電子部品の絶縁層と導体パターンとは、
以下のプロセスで製造されている。
In the embodiment of the present invention, the conductor pattern is formed by using a Ti and Cu sputtered film as a base and a Cu thin film by photolithography and plating. The insulating layer is formed by applying, exposing, or the like using a photosensitive material. Specifically, the following, the insulating layer and the conductor pattern of the electronic component according to the embodiment of the present invention,
It is manufactured by the following process.

【0012】まず、導体パターンを形成するプロセスに
ついて説明する。絶縁基板又は絶縁樹脂層の一面をプラ
ズマアッシング、及び逆スパッタにより洗浄し、続いて
Ti薄膜又はさらにCu薄膜をスパッタ法により下地薄
膜を形成する。次に、得られた下地薄膜上にレジストを
塗布して、マスクを介して露光して、現像して所望する
導体パターン形状の凹部を、薄膜上に形成する。次に、
電気Cuメッキを行いレジストを剥離して、導体パター
ン形状のCuメッキ膜を備えた前導体パターンをウェッ
トもしくはドライエッチングを行い、導体パターンの下
地薄膜を除去する。ここで導体パターンの上面部分も若
干除去されるが、導体パターンの電気Cuメッキ部分
は、下地簿膜よりも十分に厚いナニめ,導体パターンが失
われることはない。
First, a process for forming a conductor pattern will be described. One surface of the insulating substrate or the insulating resin layer is cleaned by plasma ashing and reverse sputtering, and then a base thin film of a Ti thin film or a Cu thin film is formed by sputtering. Next, a resist is applied on the obtained base thin film, exposed through a mask, and developed to form a concave portion having a desired conductor pattern shape on the thin film. next,
The resist is peeled off by electro-Cu plating, and the front conductor pattern provided with the Cu plating film having the conductor pattern shape is subjected to wet or dry etching to remove the underlying thin film of the conductor pattern. Here, the upper surface portion of the conductor pattern is also slightly removed, but the electric Cu-plated portion of the conductor pattern is sufficiently thicker than the base film and the conductor pattern is not lost.

【0013】次に、絶縁層を形成するプロセスについて
説明する。
Next, a process for forming an insulating layer will be described.

【0014】上記パターンを形成した絶縁樹脂上の導体
パターンをプラズマアッシングにより洗浄し、さらに、
感光性のベンゾシクロブテン樹脂を塗布した後、フォト
リソグラフィにより所望のパターンのマスクを介して、
露光し、現像する。この場合、導体上に必要に応じて貫
通穴もしくは切り欠きを形成する。次に、適切な条件に
てキュアを行い、樹脂を完全に硬化させて、導体パター
ン上に形成された絶縁層となる。
The conductor pattern on the insulating resin on which the pattern is formed is cleaned by plasma ashing, and further,
After applying the photosensitive benzocyclobutene resin, through a mask of the desired pattern by photolithography,
Expose and develop. In this case, a through hole or a notch is formed on the conductor as necessary. Next, curing is performed under appropriate conditions, and the resin is completely cured to form an insulating layer formed on the conductor pattern.

【0015】絶縁層材としてポリイミドを用いる場合、
ポリイミドの溶媒にCuが溶解し、ポリイミド中にCu
が拡散してしまうため、直接塗布することができない。
よって、Cu表面にTi等のカバーメタル層を形成する必
要があり、工程が複雑になり、しかも、下地に凹凸があ
る場合は、その上に形成されたポリイミドの絶縁層にも
凹凸が生じ、安定な積層体の形成が困難となる。
When polyimide is used as the insulating layer material,
Cu is dissolved in the polyimide solvent, and Cu
Cannot be directly applied.
Therefore, it is necessary to form a cover metal layer of Ti or the like on the Cu surface, which complicates the process, and furthermore, when there is unevenness in the base, unevenness also occurs in the polyimide insulating layer formed thereon, It becomes difficult to form a stable laminate.

【0016】本発明においては、絶縁層材として感光性
のベンゾシクロフテン樹脂を使用することで、Cu上に
直接塗布することができ、しかも、フォトリソグラフィ
によるパターン形成が可能である。さらに、下地が凹凸
状であっても、形成された絶縁層の表面は平坦化される
ため、簡素な工程で、安定した積層体を形成することが
できる。
In the present invention, by using a photosensitive benzocyclophthene resin as the insulating layer material, it can be directly applied on Cu, and a pattern can be formed by photolithography. Further, even if the underlying layer is uneven, the surface of the formed insulating layer is planarized, so that a stable stacked body can be formed by a simple process.

【0017】以上の導体パターンを形成するプロセス
と、絶縁層を形成するプロセスとを繰り返すことによっ
て、図1に示す積層体を得るものである。
By repeating the above process of forming the conductor pattern and the process of forming the insulating layer, the laminate shown in FIG. 1 is obtained.

【0018】形成された積層体を符号の二点鎖線で示す
位置で切断して、図2(a)に示す電子部品本体11を得
る。電子部品本体は、上面両端部分に外部電極と接続さ
れる電極部7a,7b,7cを備えている。
The formed laminate is cut at the position indicated by the two-dot chain line to obtain the electronic component body 11 shown in FIG. The electronic component body includes electrode portions 7a, 7b, 7c connected to external electrodes at both ends of the upper surface.

【0019】次に、図2(b)に示すように、電子部品
本体の両端を覆うように、電極12a,12b,12c
を形成して、電子部品を得る。
Next, as shown in FIG. 2B, the electrodes 12a, 12b, 12c are covered so as to cover both ends of the electronic component body.
Is formed to obtain an electronic component.

【0020】図3は、本発明の第2の実施の形態による
電子部品の概略構成を示す断面図である。図4を参照す
ると、厚さがおよそ0.5mmのセラミックス絶縁基板
1上に、ベンゾシクロブテン等の絶縁層13、その上に
Cu薄膜からなる導体パターン14、さらに、同様な樹
脂からなる絶縁層15、その上に導体パターン14より
設備精度の印刷位置ずれ分を差し引いた幅の狭い向様な
金属薄膜からなる導体パターン16、さらに、同様の樹
脂からなる絶縁層17、及び導体パターン16より設備
精度の印刷位置ずれ分を差し引いた幅の狭い同様な金属
からなる導体パターン18を順次積層し、最後に、絶縁
層19で覆い約30pm厚の積層体を形成している。
FIG. 3 is a sectional view showing a schematic configuration of an electronic component according to a second embodiment of the present invention. Referring to FIG. 4, on a ceramic insulating substrate 1 having a thickness of about 0.5 mm, an insulating layer 13 of benzocyclobutene or the like, a conductor pattern 14 of a Cu thin film thereon, and an insulating layer of a similar resin 15, a conductor pattern 16 made of a thin metal thin film having a narrower width obtained by subtracting a printing position shift of equipment precision from the conductor pattern 14, and an insulating layer 17 made of a similar resin; A conductor pattern 18 made of a similar metal having a small width, from which the printing position deviation of the precision has been subtracted, is sequentially laminated, and finally covered with an insulating layer 19 to form a laminate having a thickness of about 30 pm.

【0021】本発明の第2の実施の形態において、導体
パターン及び絶縁層は、第1の実施の形態と同様に形成
されている。
In the second embodiment of the present invention, the conductor pattern and the insulating layer are formed in the same manner as in the first embodiment.

【0022】図4は、本発明の第3の実施の形態による
電子部品の概略構成を示す断面図である。第3の実施の
形態による電子部品は、第2の実施の形態による電子部
品とは、導体パターンの幅が上方に移動するにつれて次
第に大きくなる構成を有することで異なる。
FIG. 4 is a sectional view showing a schematic configuration of an electronic component according to a third embodiment of the present invention. The electronic component according to the third embodiment is different from the electronic component according to the second embodiment in that the conductor pattern has a configuration in which the width of the conductor pattern gradually increases as it moves upward.

【0023】図4を参照して、厚さがおよそ0.5mmの
セラミックス絶縁基板1上に、ベンゾシクロブテン等の
絶縁層20、その上にCu薄膜からなる導体パターン2
1、さらに、同様な樹脂からなる絶縁層22、その上に
導体パターン21より設備精度の印刷位置ずれ分を加え
た幅の広い同様な金属薄膜からなる導体パターン23、
さらに、同様の樹脂からなる絶縁層24、及び導体パタ
ーン23より設備精度の印刷位置ずれ分を加えた幅の広
い同様な金属からなる導体パターン25を順次積層し、
最後に、絶縁層26で覆い約30μm厚の積層体を形成
している。
Referring to FIG. 4, an insulating layer 20 such as benzocyclobutene is formed on a ceramic insulating substrate 1 having a thickness of about 0.5 mm, and a conductor pattern 2 made of a Cu thin film is formed thereon.
1, furthermore, an insulating layer 22 made of a similar resin, and a conductive pattern 23 made of a similar metal thin film having a wider width obtained by adding a printing position shift of equipment accuracy than the conductive pattern 21 thereon.
Further, an insulating layer 24 made of a similar resin, and a conductor pattern 25 made of a similar metal having a wider width than the conductor pattern 23 and having a printing position shift of equipment precision added thereto are sequentially laminated,
Finally, the laminate is covered with the insulating layer 26 and has a thickness of about 30 μm.

【0024】本発明の第3の実施の形態において、導体
パターン及び絶縁層は、第1の実施の形態と同様に形成
されている。
In the third embodiment of the present invention, the conductor pattern and the insulating layer are formed in the same manner as in the first embodiment.

【0025】尚、本発明の実施の形態においては、3端
子構造の電子部品を示したが、2端子構造、及び4端子
構造も本発明の実施の形態と向様に製造することができ
る。
In the embodiment of the present invention, an electronic component having a three-terminal structure has been described. However, a two-terminal structure and a four-terminal structure can be manufactured in the same manner as the embodiment of the present invention.

【0026】さらに、本発明の実施の形態においては、
外部電極端子を備えた電子部品についてのみ述べたが、
外部電極端子にリード線を半田付けすればリード電子部
品を構成することができることはいうまでもない。
Further, in the embodiment of the present invention,
Although only electronic components with external electrode terminals have been described,
It goes without saying that a lead electronic component can be formed by soldering a lead wire to the external electrode terminal.

【0027】[0027]

【発明の効果】以上、説明したように、本発明によれ
ば、積層形成する際の設備精度による印刷位置ずれ分を
考慮した幅の広いパターン導体と、幅の狭いパターン導
体とを組み合わせて積層重畳することにより、印刷位置
ずれによる上下導体パターン間での重畳面積の変動をな
くすことができ、キャパシタンス成分が変動しない特性
精度を高めた電子部品とその製造方法とを提供すること
ができる。
As described above, according to the present invention, a pattern conductor having a large width and a pattern conductor having a small width in consideration of a printing position shift due to equipment accuracy in forming a layer are laminated. By superimposing, it is possible to eliminate the fluctuation of the superimposed area between the upper and lower conductor patterns due to the printing position shift, and to provide an electronic component with improved characteristic accuracy in which the capacitance component does not fluctuate and a method of manufacturing the same.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の第1の実施の形態による電子部品本体
の概略構成を示す断面図である。
FIG. 1 is a sectional view showing a schematic configuration of an electronic component body according to a first embodiment of the present invention.

【図2】(a)は図1の電子部品本体を示す概略図であ
る。(b)は(a)の電子部品を示す概略図である。
FIG. 2A is a schematic view showing the electronic component body of FIG. 1; (B) is a schematic diagram showing the electronic component of (a).

【図3】本発明の第2の実施の形態による電子部品本体
の概略構成を示す断面図である。
FIG. 3 is a sectional view illustrating a schematic configuration of an electronic component body according to a second embodiment of the present invention.

【図4】本発明の第3の実施の形態による電子部品本体
の概略構成を示す断面図である。
FIG. 4 is a sectional view showing a schematic configuration of an electronic component body according to a third embodiment of the present invention.

【図5】従来技術による電子部品の一例を示す断面図で
ある。
FIG. 5 is a cross-sectional view illustrating an example of an electronic component according to the related art.

【符号の説明】[Explanation of symbols]

1、 51 絶縁基板 2、 4、 6、 8、 13、 15、 17、 1
9 絶縁層 20、 22、 24、 26 絶縁層 52、 54、 56、 58 絶縁層 3、 5、 7、 14、 16、 18、 21
導体パターン 23、 25、 53、 55、 57 導体パタ
ーン 7a、 7b、 7c 電極部 11 電子部品本体 12a 、 12b、 12c 電極
1, 51 Insulated substrate 2, 4, 6, 8, 13, 13, 15, 17, 1
9 Insulating layer 20, 22, 24, 26 Insulating layer 52, 54, 56, 58 Insulating layer 3, 5, 7, 14, 16, 16, 18, 21
Conductor patterns 23, 25, 53, 55, 57 Conductor patterns 7a, 7b, 7c Electrode part 11 Electronic component main body 12a, 12b, 12c Electrode

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 FI H01F 41/04 H01F 41/12 B 41/12 15/14 ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 6 Identification code FI H01F 41/04 H01F 41/12 B 41/12 15/14

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 基板上に絶縁層と共に積層された複数の
導体パターンを備えた電子部品において、該複数の導体
パターンにおいて重畳される導体パターンの幅がそれぞ
れ異なっていることを特徴とする電子部品。
1. An electronic component having a plurality of conductor patterns laminated on a substrate together with an insulating layer, wherein the widths of the conductor patterns superimposed on the plurality of conductor patterns are different from each other. .
【請求項2】 請求項1の電子部品において、最下層の
導体パターンの幅が最も広く、しかも、上層になるに従
い導体パターンの幅が徐々に狭くなることを特徴とする
電子部品。
2. The electronic component according to claim 1, wherein the width of the lowermost conductive pattern is the widest, and the width of the conductive pattern is gradually reduced toward the uppermost layer.
【請求項3】 請求項1の電子部品において、最下層の
導体パターンの幅が最も狭く、しかも、上層になるに従
い導体パターンの幅が徐々に広くなることを特徴とする
電子部品。
3. The electronic component according to claim 1, wherein the width of the lowermost conductive pattern is narrowest, and the width of the conductive pattern gradually increases toward the uppermost layer.
【請求項4】 請求項1記載の電子部品において、前記
絶縁層は感光性べンゾシクロブテン樹脂からなることを
特徴とする電子部品。
4. The electronic component according to claim 1, wherein said insulating layer is made of a photosensitive benzocyclobutene resin.
【請求項5】 基板上に絶縁層と共に積層された複数の
導体パターンを備えた電子部品において、前記複数の導
体パターンにおいて上層の導体パターンの幅は直下層の
導体パターンと比ベて異なっていることを特徴とする電
子部品の製造方法。
5. An electronic component having a plurality of conductor patterns laminated on an insulating layer on a substrate, wherein the width of the upper conductor pattern in the plurality of conductor patterns is different from that of the immediately lower conductor pattern. A method for manufacturing an electronic component, comprising:
【請求項6】 請求項5記載の電子部品の製造方法にお
いて、前記絶縁層は感光性べンゾシクロブテン樹脂から
なることを特徴とする電子部品の製造方法。
6. The method for manufacturing an electronic component according to claim 5, wherein said insulating layer is made of a photosensitive benzocyclobutene resin.
JP9250571A 1997-09-16 1997-09-16 Electronic component and its manufacture Pending JPH1197243A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9250571A JPH1197243A (en) 1997-09-16 1997-09-16 Electronic component and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9250571A JPH1197243A (en) 1997-09-16 1997-09-16 Electronic component and its manufacture

Publications (1)

Publication Number Publication Date
JPH1197243A true JPH1197243A (en) 1999-04-09

Family

ID=17209879

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9250571A Pending JPH1197243A (en) 1997-09-16 1997-09-16 Electronic component and its manufacture

Country Status (1)

Country Link
JP (1) JPH1197243A (en)

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US20160027578A1 (en) * 2013-11-28 2016-01-28 Murata Manufacturing Co., Ltd. Method of manufacturing multilayer board, multilayer board, and electromagnet
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US10636561B2 (en) * 2015-02-19 2020-04-28 Panasonic Intellectual Property Management, Co., Ltd. Common mode noise filter
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