JPH1183935A - Semiconductor testing apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a semiconductor testing apparatus by which a device test can be executed in parallel even when a device under test(DUT) is being replaced by a method wherein a plurality of sockets on which DUT's are placed are installed, pins of the sockets are changed over sequentially so as to be connected electrically to the side of the testing apparatus. SOLUTION: A semiconductor testing apparatus is provided, e.g. with two contact sockets 191, 192 and with a changeover means 20 which changes over signals from the sockets and by which the end of an equal-length coaxial cable on one side is connected to a tester-pin output terminal Pi. The sockets 191, 192 can convey DUT's on the side of a handler so as to be attached, removed and brought into contact, and they are installed on a performance board. The changeover means 20 comprises 2:1 relays S1 to Sn for line changeover, and it changes over all (n) pins excluding a GND pin. Then, at the point when a device test has been completed on the side of the socket 191, the changeover means 20 is changed over to the side of the socket 192, the DUT's which are placed are tested continuously, and the DUT's on the side of the socket 191 are changed over to the DUT's which are not tested yet.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for testing a device under test (DUT) using a semiconductor test apparatus.
The present invention relates to a semiconductor test apparatus which realizes an improvement in a device test throughput by eliminating a test execution pause period accompanying T exchange.

[0002]

2. Description of the Related Art First, FIG.
A connection conceptual diagram with the UT will be described with reference to FIG. Since the semiconductor test apparatus is well known and well known in the art, the description is omitted. The DUT is mounted on a contact socket 190 of the performance board 150 to make electrical contact. The electrical signals connected to the DUT are
And is connected to each socket pin of the contact socket 190 on the performance board 150 through the pogo pin on the test head 100 via the pin electronics 120. The DUT to be tested is transported by a transport tray or the like inside the handler 200 and placed on the contact socket 190, and all the leads of the DUT are pressed by the contact pressing mechanism 280 to be electrically pressed to all the terminals of the contact socket 190. After that, various electrical tests are performed by supplying an electrical signal from the test head 100.

FIG. 5 shows the electrical connection diagram. The pin electronics 120 of the test head 100 has a driver pin and an I / O pin.
The Pn signal is connected to each socket pin of the contact socket 190 via the performance board 150 by an equal-length coaxial cable having the same propagation delay.

By the way, as shown in an example of a device test time chart in FIG. 3, after the DUT test is completed, the handler detaches from the contact socket 190 for mounting the DUT and conveys the untested DUT to the contact socket. Make contact. The time required for the DUT replacement step is about several seconds, depending on the system. On the other hand, the test apparatus is in a quiescent period during the DUT replacement period. Here, the test time depends on the type of DUT, but there are many types of standard general-purpose ICs for logic that are several seconds or less. In such a case, the actual operation time of the semiconductor test apparatus may be about half or less. This has practical difficulties from the viewpoint of reducing test costs.

[0005]

SUMMARY OF THE INVENTION As described above, D
During the period during which the UT is being replaced, the test apparatus main body has an unnecessary waiting time during which the test cannot be performed. This is not preferable from the viewpoint of improving the throughput of the device test, and is a practical difficulty. Therefore, an object of the present invention is to provide a semiconductor test apparatus in which a test apparatus main body can execute a device test in parallel even during a DUT replacement period.

[0006]

First, a constituent means for solving the above-mentioned problems is a semiconductor test apparatus for testing a device under test with electric contact means (for example, a contact socket). A plurality of N electrical contact means are provided, inserted between the pin terminals of the plurality of N electrical contact means and the tester pin output terminal Pi, and electrically connected to any one of the selected electrical contact means. And a switching control means for switching the connection to the next DUT test electrical contact means when the device test is completed by the switching means. According to the above invention, the DUT
A semiconductor test apparatus can be realized in which the test apparatus main body can execute device tests in parallel even during the replacement.

FIG. 1 and FIG. 2 show a solution according to the present invention. Second, in order to solve the above problem, in the configuration of the present invention, in a semiconductor test apparatus which is mounted on a socket of a handler and which tests a DUT by a test signal from a test head, the DUT is transported on the handler side and attached / detached.・
A plurality of N (N is 2 or more) contact sockets 191, 192,... To be in contact with each other, the other end of an equal length coaxial cable connected to the socket pin terminals of the plurality of contact sockets, and a tester pin output of pin electronics A switching means 20 inserted between the end Pi and a connection socket for making an electrical connection to any one of the selected contact sockets, and when a device test is completed by the switching means 20, a contact socket for the next DUT test is provided. There is a configuration unit that includes a switching control unit that switches a connection. According to the above-described invention, a semiconductor test apparatus can be realized in which the test apparatus main body can execute device tests in parallel even during the DUT replacement on the handler side.

Third, in order to solve the above-mentioned problem, in the configuration of the present invention, a worker or a robot hand inserts a DUT into a device socket of a manual performance board.
In a semiconductor test apparatus for testing a DUT by attaching / detaching a DUT, a plurality of N (N is 2 or more) device sockets are provided, and other than coaxial cables having the same length connected to socket pin terminals of the plurality of device sockets. Switching means 20 inserted between the end and the tester pin output end Pi of the pin electronics for making an electrical connection to any one of the selected device sockets. When the switching means 20 completes the device test, There is a configuration unit including a switching control unit that switches a connection to a device socket for a next DUT test. According to the above invention, a semiconductor test apparatus can be realized in which the test apparatus main body can execute device tests in parallel while the DUT on the manual performance board is being replaced by an operator or a robot hand.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below in detail with reference to the drawings together with embodiments.

An embodiment of the present invention will be described below with reference to the electrical connection diagram of the main part in FIG. 1 and the time chart of the device test in FIG. Elements corresponding to the conventional configuration are denoted by the same reference numerals. The main configuration of the present invention is, as shown in the electrical connection diagram of FIG. 1, provided with two contact sockets 191 and 192 with respect to the conventional configuration, switching both signals to connect one end of an equal-length coaxial cable. A switching means 20 connected to the tester pin output terminal Pi is provided.

The contact sockets 191 and 192 are
A socket for mounting a UT, which can be detached and contacted by transporting the DUT on the handler side, and two of them are provided on the performance board. Here, it is assumed that the test period and the pause period of the device are almost the same time.
The switching means 20 is a 2: 1 relay S1 for line switching.
ＳSm, and switches all m pins including the power supply pin excluding the GND pin. Both contact sockets 191, 19
An equal-length coaxial cable having the same propagation delay as in the prior art is connected to the second socket pin terminal. Between the other end of this coaxial cable and the tester pin output end Pi, relays S1 to Sm for line switching are connected and provided as shown in FIG.

Next, the procedure of the device test will be described with reference to the time chart of the device test shown in FIG. First, FIG. 2A
7 is a time chart of a device test period and a pause period by one contact socket 191 side. When the device test on the contact socket 191 side is completed, the idle period starts. At this point, the switching means 20 is switched to the other contact socket 192 (see FIG. 2C). As a result, this time the other contact socket 19
The test can be started continuously by the DUT mounted on the second DUT (see FIG. 2D). While the other is in the test period, one of the contact sockets 191 removes and transports the DUT that has completed the test from the contact socket, and transports and mounts the untested DUT to the contact socket and makes contact therewith (see FIG. 2B). ). Thereafter, the test apparatus can perform the test continuously by alternately switching the contact sockets 191 and 192 by performing the test in the same manner (see FIG. 2F).
As a result, unnecessary device test waiting is eliminated.

In the description of the above-described embodiment, a specific example of a test mode in which a device is connected to a handler to perform a device test has been described.
Even in the case where the device sockets are provided and the DUT is sequentially replaced by the operator or the robot hand, etc., the DUT on the device socket side for which the test has been completed can be eliminated in the same manner as described above, without waiting for the device test on the test apparatus side.

In the description of the above embodiment, a specific example in which two contact sockets are provided has been described. However, when the test period of the device shown in FIG. If necessary, three or more N contact sockets are provided, a corresponding N: 1 relay switching means, and a corresponding handler-side configuration are provided, and switching is sequentially performed in the same manner as described above, so that device tests can be continuously performed. It may be configured as follows.

[0015]

According to the present invention, the following effects can be obtained from the above description. According to the configuration of the invention described above, D
A plurality of sockets for mounting UTs are provided, and the pins of the sockets are sequentially switched so that the test apparatus is electrically connected to perform the test, so that the test apparatus can perform the test sequentially and sequentially. As a result, a great advantage that the throughput of the test apparatus is greatly improved, for example, about twice, is obtained. As a result, the effect of reducing the device test cost is great.

[Brief description of the drawings]

FIG. 1 is an example of an electrical connection diagram of the present invention.

FIG. 2 is an example of a time chart of the device test according to FIG. 1 of the present invention.

FIG. 3 is an example of a time chart of a conventional device test according to FIG. 5;

FIG. 4 is a connection conceptual diagram of a test head, a handler, and a DUT.

FIG. 5 is an example of a conventional electrical connection diagram.

[Explanation of symbols]

 P1 to Pn tester pin output terminals S1 to Sm relay 20 switching means 100 test head 120 pin electronics 150 performance board 190, 191, 192 contact socket 200 handler 300 test equipment main body

Claims (3)

[Claims] 1. A semiconductor test apparatus for testing a device under test (DUT) with electrical contact means, wherein a plurality of N electrical contact means are provided, and a plurality of N pins of the electrical contact means are provided. Switching means inserted between a terminal and a tester pin output terminal for electrically connecting to any one of the selected electrical contact means; and a next DUT test when a device test is completed by the switching means. Switching control means for switching connection to said electrical contact means for use in a semiconductor test apparatus. 2. A semiconductor test apparatus, which is mounted on a socket of a handler and tests a DUT based on a test signal from a test head, comprising: a plurality of N contact sockets for transporting the DUT on the handler side for attaching / detaching / contacting; Inserted between a socket pin of the contact socket and a tester pin output end of the pin electronics;
Switching means for electrically connecting to any one of the selected contact sockets; and switching control means for switching the connection to the next contact socket for a DUT test when a device test is completed by the switching means. A semiconductor testing device, comprising: 3. A semiconductor test apparatus for testing a DUT by attaching / detaching a DUT to / from a device socket of a manual performance board, comprising: a plurality of N device sockets; a plurality of socket pins of the device socket; and a tester pin output of pin electronics. Switching means inserted between the end and an electrical connection to any one of the selected device sockets, and when the device test is completed by the switching means, connection to the device socket for the next DUT test And a switching control means for switching between the two.