JPH1180993A - Semiconductor wafer plating device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor wafer plating device capable of uniformizing the plating film thickness in each part of the surface of a semiconductor wafer and capable of uniformly and securely applying the insides of a plurality of fine grooves and fine pores formed on the surface of the semiconductor wafer with plating. SOLUTION: The inside of a cylindrical anode case 30 is stored with an anode 40 and an ascending vortical flow generating mechanism generating an ascending vortical flow in a plating soln. in the anode case 30. In a state in which the anode case 30 is set directly above a plating forming region on a semiconductor wafer 100, the plating forming region part is subjected to electrolytic plating. The ascending vortical flow generating mechanism 50 is composed in such a manner that a rotary shaft 41 pivoted with the anode 40 is provided with a blade 51.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is suitable for making the thickness of plating on the surface of a semiconductor wafer uniform and, at the same time, performing plating treatment in a plurality of fine grooves or holes formed on the surface of the semiconductor wafer. The present invention relates to a semiconductor wafer plating apparatus suitable for performing the above.

[0002]

2. Description of the Related Art Conventionally, in forming wiring of a semiconductor device, even if etch back is used for aluminum sputtering,
Chemical mechanical polishing (CMP) with copper material buried in wiring part
However, spattering was often performed.

However, as semiconductor devices become finer and the width of the wiring becomes smaller, for example, a width of about 0.18 μm to 0.13 μm is required. As the step coverage becomes larger, the conventional sputtering method is used. It became difficult to embed metal in wiring grooves and holes, and holes were easily formed.

[0004]

Therefore, it has been considered that instead of sputtering, a semiconductor wafer is immersed in a plating solution and energized to perform electrolytic plating on the surface and in the wiring grooves and holes. However, this method also has the following problems.

[0005] In conventional electrolytic plating, since the entire surface of the semiconductor wafer is subjected to collective plating, a potential gradient occurs in the surface of the semiconductor wafer at the time of electrolytic plating, and the plating film thickness of each part of the semiconductor wafer becomes non-uniform. In particular, in the case of a large-diameter semiconductor wafer, this disadvantage becomes significant.

[0006] In order to supply substances such as metal ions to the plating reaction section, a plating solution flow is collectively applied to the entire surface of the semiconductor wafer, but the supply of the substance to each plating reaction section on the semiconductor wafer is excessive or insufficient. This also causes the plating film thickness of each part to be non-uniform.

[0007] Even if the plating solution is simply applied to the entire surface of the semiconductor wafer in a lump, the air in the miniaturized grooves or holes may remain as it is due to surface tension or the like. In such a case, plating inside the groove or hole cannot be performed. On the other hand, even if the plating solution is once filled in the miniaturized grooves or holes, if the plating solution remains in the plating solution as it is, the plating is performed after the metal ions in the retained plating solution are used for plating. Since it does not proceed, it is necessary to efficiently replace the plating solution in the groove or hole with a new one.

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and has as its object to achieve a uniform plating film thickness on each portion of a semiconductor wafer surface, and at the same time, a plurality of microgrooves and micropores provided on the semiconductor wafer surface. An object of the present invention is to provide a semiconductor wafer plating apparatus capable of uniformly and reliably plating the inside.

[0009]

SUMMARY OF THE INVENTION In order to solve the above problems, the present invention relates to a semiconductor wafer plating apparatus for electroplating microgrooves and microholes provided on the surface of a semiconductor wafer.
A state in which an anode and a rising vortex generating mechanism that generates a rising vortex in a plating solution in the anode case are housed inside a cylindrical anode case, and the anode case is installed immediately above a plating formation area on a semiconductor wafer. Then, the plating area was electrolytically plated. Here, the rising vortex generating mechanism is configured by providing a blade on a rotating shaft that rotates while supporting the anode, or by forming the anode itself into a shape that generates a rising vortex during rotation. Further, the semiconductor wafer plating apparatus is provided with driving means for moving the anode case to a plurality of plating regions in the semiconductor wafer surface.
Further, the present invention provides a method for plating a surface of a semiconductor wafer provided with fine grooves and fine holes using the semiconductor wafer plating apparatus, and then performing chemical mechanical polishing on the surface of the plated semiconductor wafer to form fine grooves and fine holes. The plating on the surface of the semiconductor wafer was removed while leaving the plating.

[0010]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is an overall schematic configuration diagram showing a semiconductor wafer plating apparatus according to one embodiment of the present invention. As shown in FIG.
Inside, a semiconductor wafer 100, a wafer fixing jig 20,
An anode case 30, an anode 40 housed in the anode case 30, and a rising vortex flow generating mechanism 50 are provided. Hereinafter, each component will be described. In this embodiment, an example is described in which a plurality of fine grooves and fine holes provided on the surface of the semiconductor wafer 100 are filled with copper plating.

The plating tank 10 is filled with a plating solution 11 for electrolytic plating. The plating solution 11 an aqueous solution containing the additives and chlorine ions, for example CuSO ₄ · 5H ₂ O and sulfuric acid.

The wafer fixing jig 20 grips the outer periphery of the disc-shaped semiconductor wafer 100 to
Is configured to expose and hold the upper surface. The wafer fixing jig 20 is provided with a wafer electrical contact 21 by an electric circuit from the cathode side. When the semiconductor wafer 100 is set on the wafer fixing jig 20, a voltage is applied to the semiconductor wafer 100 to apply a voltage to the cathode. I do.

Next, the anode case 30 is formed by forming a nonconductive material into a cylindrical shape (in this embodiment, a cylindrical shape).

The anode 40 has a substantially flat plate shape, and a rod-shaped rotating shaft 41 is attached to the center of the upper side. An electric circuit from the anode side is connected to the anode 40.
The rotating shaft 41 is driven to rotate by a driving mechanism (not shown).

A blade 51 is attached to the upper part of the rotating shaft 41. The blades 51 are formed in a screw shape so as to generate a rising vortex in the plating solution 11 in the anode case 30 when the rotating shaft 41 rotates. Here, the blades 51 and the rotating shaft 41 constitute a rising vortex generation mechanism 50.

FIG. 2A is a schematic plan view of the anode case 30 as viewed from above. As shown in the figure, an anode 40 attached to a rotating shaft 41 and a blade 51 are located at the center of a cylindrical anode case 30.

The anode case 30 is not limited to a circular shape, but may have another shape, for example, as shown in FIG.
The shape may be square as shown in FIG. 2B or rectangular as shown in FIG. Of course, other shapes may be used.

The anode case 30 accommodating the anode 40 shown in FIG. 1 is attached to an arm of driving means such as a robot (not shown) together with the rotating shaft 41 and the like.

Next, the operation procedure of the semiconductor wafer plating apparatus will be described. First, as shown in FIG.
The semiconductor wafer 100 held and fixed on the substrate 0 is immersed in the plating solution 11.

Next, one of the portions to be plated on the surface of the semiconductor wafer 100 (that is, the wiring forming region on the semiconductor wafer 100 in this embodiment, hereinafter referred to as a “plating forming region”). The anode case 30 is moved directly above the region H) in FIG. 3 by the driving means. At this time, a predetermined gap is provided between the lower end surface of the anode case 30 and the surface of the semiconductor wafer 100 as shown in FIG.

Next, when the anode 40 and the blades 51 are rotated by rotating the rotating shaft 41, the anode case 3 is rotated.
In FIG. 1, a rising eddy current of the plating solution 11 is generated as shown by a dashed line in FIG. 1, thereby causing a large amount of the plating solution 11 to flow into the anode case 30 from between the surface of the semiconductor wafer 100 and the lower end surface of the anode case 30. Forcibly flows in and circulates.

In this state, the anode 40 and the semiconductor wafer 1
An electroplating is started on the semiconductor wafer 100 by applying an electric field during 00 hours.

As described above, the following operations are produced by operating and plating each member.

The plating of the surface of the semiconductor wafer 100 is performed in a portion where the anode 40 faces the surface of the semiconductor wafer 100 in the partitioned anode case 30, so that the surface of the semiconductor wafer 100 facing the inside of the anode case 30 is plated. A uniform electric field (uniform current distribution) is formed.
That is, since a uniform electric field is formed by the tunnel effect of the current in the anode case 30, the portion where the plating is performed is limited to a narrow range facing the inside of the anode case 30 of the semiconductor wafer 100. Becomes uniform in each part.

On the other hand, a large amount of plating solution flows from the outside of the anode case 30 to form a rising eddy flow in the vicinity of the plating formation region H, so that the rising eddy flow causes the plating formation region on the surface of the semiconductor wafer 100. The air remaining in the micro-grooves and micro-holes provided in H is pulled out to fill the micro-grooves and micro-holes with a plating solution, and the plating solution entering the micro-grooves and micro-holes is also pulled out. As a result, the plating solution is replaced with a new plating solution and the supply of the plating solution is promoted.

Further, since a large amount of plating solution flows from the outside of the anode case 30 and is sprayed on the plating region H of the semiconductor wafer 100, the supply of substances such as metal ions (copper ions in this embodiment) which are depleted by plating is performed. The plating is promoted (a new plating solution is introduced directly above the microgrooves and micropores to make the metal ion concentration near the surface uniform and thin the diffusion layer of the plating solution). In addition, early release of gas generated during plating is promoted.

As described above, the inside of each fine hole or fine groove in the plating region H can be plated uniformly, reliably and promptly.

When the plating is completed, as shown in FIG. 3, the position of the anode case 30 is moved to the position of the plating area I by a driving means such as a robot, and plating is performed in the same operation procedure as described above. When the plating is completed, the position of the anode case 30 is moved to the position of the plating area J by the driving means, and the plating is repeated in the same manner.

In each of the plating regions H, I, and J, a uniform electric field is formed in each region as described above, and the optimum electrodeposition conditions can be set. Therefore, the plating film thickness is uniform in each region. The plating thickness can be made uniform over the entire surface of the semiconductor wafer 100. That is, by repeating the division plating on the surface of one semiconductor wafer 100, as a result, the plating film thickness on the entire surface of the semiconductor wafer 100 is made uniform. This effect is particularly large in the case of a large-diameter semiconductor wafer 100.

In the above operation procedure, FIG.
As shown in FIG. 4A, the lower end of the anode case 30 was set at a position slightly away from the surface of the semiconductor wafer 100, and electrolytic plating was performed. However, as shown in FIG. Electroplating may be performed while being set so as to be in close contact with the surface of the semiconductor wafer 100.

In this case, when the rotation shaft 41 is rotated, the plating solution in the anode case 30 is supplied from the upper end of the anode case 30 and supplied onto the surface of the semiconductor wafer 100 as shown in FIG. After that, it is discharged as an upward vortex from the upper end. Therefore, FIG.
The same effect as in the case shown in FIG.

The semiconductor wafer 100 is, for example, as shown in FIG.
As shown in FIG. 5A, a groove 203, a contact hole 201 and the like (corresponding to a fine groove and a fine hole) are formed on the surface thereof. As shown in the figure, copper 207 is plated by the semiconductor wafer plating apparatus. Then, the semiconductor wafer 100 on which plating has been completed is then, for example,
By removing the copper plating on the surface of the semiconductor wafer 100 except for the plating embedded in the contact hole 201 and the contact hole 201 by chemical mechanical polishing, the wiring 211 and the plug 213 are formed as shown in FIG. 202 is S
iO ₂ insulating layer, 205 is a barrier layer, 221 is a conductive layer.

Although one embodiment of the present invention has been described in detail above, the present invention is not limited to the above-described embodiment, and for example, the following various modifications are possible. In the above-described embodiment, the rising vortex generation mechanism is configured by the rotating shaft 41 and the blades 51 attached to the rotating shaft 41.
Instead of providing the blade 51, the anode 40 itself may be used as the blade. That is, if the anode 40 itself is formed into a shape that generates a rising vortex during rotation, this anode 4
0 and the rotating shaft 41 can also serve as a rising vortex generation mechanism. Note that the anode 40 and the blades 51 do not necessarily need to be formed in a screw shape, and may be, for example, a flat plate shape. In other words, any shape may be used as long as it generates a rising vortex.

In the above embodiment, the anode case 30 is moved by a driving means such as a robot, but the position of the anode case 30 is fixed and the wafer fixing jig 20 for holding the semiconductor wafer 100 is used instead. It may be driven by rotation or the like. Further, both the anode case 30 and the wafer fixing jig 20 may be driven.

As described above, the shape of the anode case may be various such as a circle, a square, and a rectangle. However, it is considered that it is desirable that the shape of the anode case is similar to the shape of the fine grooves and the fine holes from the viewpoint of the electric field.

It is desirable that the voltage applied at the time of electrolytic plating is not a simple DC voltage but a pulse voltage. The reason why the thickness of the diffusion layer on the surface of the semiconductor wafer 100 can be reduced by the flow of the plating solution as described above is, however, it is more difficult to reduce the thickness of the diffusion layer in the fine grooves and the fine holes. Therefore, it is preferable that the return of the concentration of the metal ions is promoted by a pulse. That is, the diffusion layer is electrochemically thinned.

In the above embodiment, the surface of the semiconductor wafer 100 to be plated is directed upward, but the direction of the surface of the semiconductor wafer 100 to be plated is not limited to this, and may be, for example, downward, sideways, oblique, etc. And various other orientations. In these cases anode case 3
The direction of 0 needs to be changed accordingly. However, in consideration of removing a gas such as hydrogen generated at the time of plating, it is considered that upward is desirable.

Needless to say, the structure of each member such as the wafer fixing jig 20, the anode 40, and the rising eddy current generating mechanism 50 can be variously modified as long as the function is achieved.

In the above embodiment, an example in which copper plating is performed on a semiconductor wafer has been described. However, the present invention is not limited to copper plating.
It can also be used for plating with other various materials. Further, it goes without saying that the present invention can also be used for plating a semiconductor wafer for purposes other than forming wirings and plugs on the semiconductor wafer.

[0040]

As described in detail above, the present invention has the following excellent effects. Since a uniform electric field can be formed and electroplated only in the plating area facing the anode case of the semiconductor wafer,
The plating film thickness can be formed uniformly in the plating formation region.

By performing the same plating operation on a plurality of plating regions on the semiconductor wafer surface, the plating film thickness can be made uniform in each of the regions. Can be uniform. This effect is particularly significant in the case of a large-diameter semiconductor wafer.

Since a rising eddy current is formed on the surface of the plating region of the semiconductor wafer after a large amount of plating solution flows from outside the anode case, the fine eddies or fine holes formed on the surface of the semiconductor wafer due to the rising eddy flow. The air remaining inside is pulled out, so that the plating solution can be filled in the fine grooves and fine holes, and the plating solution that has entered the fine grooves and fine holes is replaced by a new plating solution by being pulled out. As a result, the supply of the plating solution is promoted, and by these actions, the inside of each fine hole or fine groove can be plated uniformly, reliably, and quickly.

Since a large amount of plating solution flows from the outside of the anode case and is sprayed on the surface of the plating area of the semiconductor wafer, the supply of substances such as metal ions, which are lacking by plating, is promoted, and plating is promoted. In addition, early release of gas generated during plating is promoted.

From the above effects, a high throughput can be realized.

[Brief description of the drawings]

FIG. 1 is an overall schematic configuration diagram showing a semiconductor wafer plating apparatus according to one embodiment of the present invention.

FIGS. 2A, 2B and 2C are schematic plan views of various anode cases 30, 30-2 and 30-3 as viewed from above.

FIG. 3 is a plan view showing plating formation regions H, I, and J (ie, a moving position of the anode case 30) on the semiconductor wafer 100.

FIGS. 4 (a) and 4 (b) are diagrams showing a state of a flow of a plating solution in accordance with a position where an anode case 30 is installed.

FIG. 5 is a view showing a method of forming wirings 211 and plugs 213 on the surface of the semiconductor wafer 100 by a combination of filling of an insulating layer and chemical mechanical polishing.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Plating processing tank 20 Wafer fixing jig 30 Anode case 40 Anode 41 Rotation axis 50 Ascending vortex generation mechanism 51 Blade 100 Semiconductor wafer 201 Contact hole (micro hole) 203 Groove (micro groove) H, I, J Plating area

Claims (4)

[Claims] 1. A semiconductor wafer plating apparatus for electroplating microgrooves and microholes provided on a surface of a semiconductor wafer, wherein an anode and a plating vortex flowing into a plating solution in the anode case are formed inside a cylindrical anode case. A plating apparatus for a semiconductor wafer, wherein the apparatus includes a rising vortex generating mechanism to be generated and electrolytic plating is performed on a portion of the plating region in a state where the anode case is installed immediately above the plating region on the semiconductor wafer. 2. The rising vortex flow generating mechanism is configured by providing a blade on a rotating shaft that supports and rotates the anode, or by forming the anode itself into a shape that generates a rising vortex flow during rotation. 2. The semiconductor wafer plating apparatus according to claim 1, wherein 3. The semiconductor wafer plating apparatus according to claim 1, wherein the semiconductor wafer plating apparatus is provided with a driving unit for moving the anode case to a plurality of plating regions in a semiconductor wafer surface. apparatus. 4. A semiconductor wafer plating apparatus according to claim 1, 2 or 3, wherein the surface of the semiconductor wafer provided with the fine grooves and the fine holes is plated, and then the surface of the plated semiconductor wafer is subjected to chemical mechanical polishing. A plating method for a fine groove or a fine hole, wherein the plating on the surface of the semiconductor wafer is removed while leaving the plating in the fine groove or the fine hole.