JPH1145907A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device and a manufacture thereof which can conveniently realize at a high productivity the mounting of semiconductor elements on a lead wiring layer formed on a multilayer wiring board having an insulation board made of an insulation material contg. an org. resin, and which is applicable to MCMs. SOLUTION: The semiconductor device having TAB-connected semiconductor elements is manufactured by TAB-connecting semiconductor elements 6 to a lead wiring layer 4 of a TAB tape 5 which is composed of a metal foil 3 formed on a transfer film 1, transferring the lead wiring layer 4 having the TAB-connected semiconductor elements 6 to the surface of an unhardened multilayer board 7 having a wiring circuit layer 10 and via-hole conductors 11 for electrically interconnecting the wiring layers on an insulation board 9 having laminated insulation layers contg. thermosetting resins, and heating it to perfectly harden the wiring board.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to, for example, a semiconductor device having a semiconductor element mounted on a multilayer wiring board and a method of manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, in a package for housing a semiconductor element, a cavity for housing a semiconductor element such as a silicon chip is formed in a part of an insulating substrate, and a wiring circuit layer is formed on the surface of the insulating substrate in the cavity. The semiconductor element is mounted on the wiring circuit layer.

[0003] Wire bonding is the most common method of mounting a semiconductor element. However, in the case of wire bonding, a connection pad needs to have a pitch of about 200 µm. It was not able to respond to. Further, since it is necessary to connect the individual terminals, there is a problem that the time required for the connection is lengthened and the productivity is reduced.

Therefore, recently, TAB (tape automat)
A method called ed bonding) has also been put to practical use. In this TAB connection method, a metal foil is adhered to the entire surface of a film of a polyimide resin or the like in which a hole for accommodating a semiconductor element is provided at a predetermined position, and then the metal foil is subjected to an inner lead for connecting the semiconductor element by photoetching. So-called TA on which a lead wiring layer composed of
This is a method of connecting bumps and inner leads of a semiconductor element to a B tape. In this method, since the semiconductor element and the lead can be connected in a single connection process, the connection can be made in a short time, so that mass production is excellent, and since the gold-plated terminal is crimped, contamination of impurities is small, and reliability is improved. Excellent in point. In addition, since it does not contain a lead alloy such as solder, it is also excellent in that the load on the environment is small. Furthermore, TAB (tape automated bonding) is 60 μm
It is also excellent in that connection can be made even at a small pitch and connection can be made collectively in a short time.

[0005]

However, the conventional TAB connection is a connection method that can be realized only by using a polyimide resin film having a copper foil adhered to one side, which is called a TAB tape. When the connection terminal is provided, the area for providing the connection terminal is small,
If it exceeds 0, there is a problem that the package itself becomes too large.

In recent years, in order to reduce the size and increase the number of wiring boards on which semiconductor elements are mounted, a wiring board called an MCM (multi-chip module) in which a large number of semiconductor elements are mounted on one board has been required. But TA
In the case of a polyimide resin film having a copper foil adhered to only one side, such as a B tape, the conductor and the polyimide resin serving as a support consist of only one layer each. Was difficult. For this reason, with the increase in the number of pins of the semiconductor element and the spread of the MCM, it is estimated that the TAB connection will decline despite its excellent characteristics. For this reason, recently, as a connection method compatible with MCM, a method of connecting a semiconductor element and a substrate by solder bumps by solder, a method of connecting a semiconductor element by using a conductive adhesive, a stud bump bonding, Various flip-chip connections using an anisotropic conductive sheet mixed with conductive particles are being developed. However, all of these can be realized through complicated steps, and workability is extremely deteriorated. In addition, these implementations require new capital investment, which is disadvantageous from the viewpoint of cost reduction.

Accordingly, the present invention can easily and with high productivity mount a semiconductor element on a lead wiring layer for a multilayer wiring board which is an insulating substrate made of an insulating material containing an organic resin. , An MCM, and a method of manufacturing the same.

[0008]

The inventor of the present invention has intensively studied a method of mounting a semiconductor element on a lead wiring layer, and has found that a TAB tape having a lead wiring layer formed by etching a metal foil on the surface of a transfer film. The inventors have found that a simple and highly productive semiconductor device can be manufactured by transferring the element to the surface of the multilayer wiring board and forming it after TAB connection of the element, and have reached the present invention.

That is, a semiconductor device according to the present invention comprises an insulating substrate having a plurality of insulating layers containing a thermosetting resin laminated thereon, a lead wiring layer formed on the surface of the insulating substrate, and the surface of the insulating substrate and / or A multilayer wiring board including a wiring circuit layer formed therein and a via hole conductor for electrically connecting the wiring circuit layers;
A semiconductor element connected to the semiconductor substrate and an AB connection, wherein the lead wiring layer and the semiconductor element on the surface of the insulating substrate are connected by a TAB connection between the semiconductor element and the lead wiring layer on the surface of the transfer film. And then transferred to the surface of the insulating substrate, the via-hole conductor is formed by filling a conductive paste containing metal powder, and the wiring circuit layer is formed of metal foil. I do.

Further, the method of manufacturing a semiconductor device according to the present invention comprises:
A step of producing a TAB tape in which a lead wiring layer made of a metal foil is formed on the surface of the transfer film, a step of TAB connecting a semiconductor element to the lead wiring layer of the TAB tape, and a plurality of steps containing a thermosetting resin. Forming an uncured multilayer wiring board in which a wiring circuit layer and a via-hole conductor for electrically connecting the wiring circuit layers are formed on an insulating substrate having an insulating layer laminated thereon; and T
After laminating the AB-connected TAB tape on the surface of the multilayer wiring board, peeling off the transfer film to transfer the lead wiring layer and the semiconductor element TAB-connected thereto to the surface of the multilayer wiring board; Heating and completely curing the multilayer wiring board.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. FIG. 1 is a view for explaining steps for manufacturing a semiconductor device according to the present invention.

According to the present invention, first, a TAB tape is prepared. In this TAB tape, for example, as shown in FIG. 1A, first, a hole 2 is formed at a position where a semiconductor element is mounted on a resin film 1, and a metal foil is 3 is adhered. Thereafter, as shown in FIG. 1B, the metal foil can be connected to the semiconductor element by photo-etching (a method of forming a circuit by etching a copper foil using a photoresist such as a dry film). A suitable lead wiring layer 4 is formed. The lead wiring layer 4 generally includes an inner lead 4a on which a semiconductor element is mounted and an outer lead 4b for connecting to an external electric circuit. Will be extended. As a result, FIG.
A TAB tape 5 as shown in FIG.

The resin film 1 for forming the lead wiring layer 4 may be a known one such as polyester, polyethylene terephthalate, polyimide, polyphenylene sulfide, vinyl chloride, and polypropylene. The thickness of the resin film is suitably from 10 to 500 μm, and preferably from 20 to 300 μm. This is because when the thickness of the resin film is less than 10 μm, the lead wiring layer formed by deformation or bending of the film is liable to cause disconnection, and when the thickness is more than 500 μm, the flexibility of the film is lost, so that peeling of the film at the time of transfer is difficult. Because it becomes difficult.

For bonding the metal foil 3 on the surface of the resin film 1, a known adhesive such as an acrylic, rubber, silicon, epoxy or the like can be used. Although the thickness of the adhesive layer is related to the adhesive strength, it is preferably 1 to 20 μm. Alternatively, copper may be directly formed on the resin film by a method such as PVD or plating.

Next, as shown in FIG.
The semiconductor element 6 is mounted on the B tape 5. For mounting, after forming a gold-plated bump on the semiconductor element 6, T
It is placed in the hole 2 of the AB tape 5 and is firmly connected to the inner lead 4a, which is also plated with gold, by pressure and pressure bonding. Semiconductor element 6 after TAB connection if desired
May be protected by a sealing material such as an epoxy resin.

On the other hand, a multilayer wiring board as shown in FIG. The multilayer wiring board 7 includes a plurality of wiring circuit layers 10 on the surface and inside of an insulating substrate 9 on which a plurality of insulating layers 8 containing a thermosetting resin are laminated.
And a via-hole conductor 11 for electrically connecting between them, and the surface thereof needs to be a thermosetting resin or a semi-cured or uncured state.

For such a multilayer wiring board 7, for example, as shown in FIG. 2A, first, a soft (B-stage) insulating layer 21 containing a thermosetting resin is prepared. Further, a via hole penetrating in the thickness direction is formed in the insulating layer 21 as required, and the via hole conductor 11 is formed by filling the via hole with a conductive paste containing a metal powder while performing screen printing or suction processing. A well-known method such as drilling, punching, sandblasting, or processing by irradiation with a carbon dioxide gas laser, a YAG laser, an excimer laser, or the like is used for forming the via hole.

Next, as shown in FIG.
1 is a single-layer wiring board 2 having a wiring circuit layer 10 formed on the surface thereof.
2 is produced. The wiring circuit layer 10 is formed by: 1) a method of forming a circuit pattern by attaching a metal foil to the surface of the insulating layer 21 and then performing an etching process; 2) forming a resist on the surface of the insulating layer 21 and plating. Method 3) A method of attaching a metal foil to the surface of the transfer film, etching the metal foil to form a circuit pattern, and then transferring the circuit pattern made of the metal foil to the surface of the insulating layer 21. Thereafter, as shown in FIG.
Wiring boards 23 and 24 on which via-hole conductors or wiring circuit layers are formed are produced in the same manner as in (b), and these are laminated together with the wiring board 22.

In the multilayer wiring board 7 manufactured by the method shown in FIG. 2, a plurality of via-hole conductors can be formed at arbitrary locations while using an insulating substrate containing a thermosetting resin. Since it has a structure sealed by a metal layer made of foil, it has advantages such as excellent long-term stability of the via-hole conductor. In addition, productivity is higher than conventional plating, and no harmful chemicals are used.

In the manufacturing method shown in FIG. 2, the insulating layer containing the thermosetting resin to be used is made of a thermosetting resin or a composition such as a thermosetting resin and a filler.
The mixture is sufficiently mixed by means such as a main roll and formed into a sheet by a rolling method, an extrusion method, an injection method, a doctor blade method, or the like. Then, the thermosetting resin is semi-cured by heat treatment if desired. For semi-curing, the resin is heated to a temperature slightly lower than a temperature sufficient to completely cure the resin.

The thermosetting resin forming the insulating layer is not particularly limited as long as the thermosetting resin has electrical properties, heat resistance and mechanical strength as an insulating material. , Aramid resin, phenolic resin,
Epoxy resins, imide resins, fluororesins, phenylene ether resins, bismaleide triazine resins, urea resins, melamine resins, silicone resins, urethane resins, unsaturated polyester resins, allyl resins and the like can be used alone or in combination.

In the above-mentioned insulating layer, a filler can be compounded with an organic resin in order to increase the strength of the entire insulating substrate or wiring substrate. SiO ₂ , Al
₂ O ₃ , ZrO ₂ , TiO ₂ , AlN, SiC, BaT
Inorganic fillers such as iO ₃ , SrTiO ₃ , zeolite, CaTiO ₃ and aluminum borate are preferably used. Further, a nonwoven fabric or a woven fabric made of glass or aramid resin may be used by impregnating the above resin. The organic resin and the filler are in a volume ratio of 15:85 to 50: 5.
Suitably, the compound is formed in a ratio of 0.

On the other hand, the metal paste forming via-hole conductor 11 includes metal powder having an average particle size of 0.5 to 50 μm, such as copper powder, silver powder, silver-coated copper powder, and copper-silver alloy. When the average particle size of the metal powder is smaller than 0.5 μm,
The contact resistance between the metal powders tends to increase and the resistance of the through-hole conductor tends to increase. If it exceeds 50 μm, it tends to be difficult to reduce the resistance of the through-hole conductor.

The conductive paste is prepared by adding an organic resin for binding and a solvent to the metal powder as described above. The solvent to be added to the paste may be any solvent that can dissolve the binding organic resin to be used. For example, isopropyl alcohol, terpineol, 2-
Octanol, butyl carbitol acetate and the like are used.

As the organic resin for bonding in the conductor paste, cellulose and the like are used in addition to the above-mentioned organic resins constituting the various insulating layers. This organic resin is bonded while the metal powders are in contact with each other,
It functions to adhere the metal powder to the insulating sheet.
This organic resin is desirably contained in the metal paste at a ratio of 0.1 to 40% by volume, particularly 0.3 to 30% by volume. If the amount of the resin is less than 0.1% by volume, it is difficult to firmly bond the metal powders to each other, and it is difficult to firmly bond the low-resistance metal to the insulating layer. If it exceeds, the resin is interposed between the metal powders, making it difficult to bring the powders into sufficient contact with each other and increasing the resistance of the via-hole conductor.

Next, as shown in FIG.
TAB in which the semiconductor element 6 is TAB-connected by (c)
After the tape 5 is laminated and pressed on the surface of the multilayer wiring board 7,
By peeling off the resin film 1 of the AB tape 5, the semiconductor element 6 is transferred onto the surface of the multilayer wiring board 7 together with the lead wiring layer 4 including the inner leads 4a and the outer leads 4b.

Then, the multilayer wiring board 7 after the transfer is heated at a temperature sufficient to completely cure the thermosetting resin, and the multilayer wiring board is completely cured, so that the semiconductor element 6 of FIG. A semiconductor device mounted on the wiring board 7 can be manufactured.

In the semiconductor device of the present invention, the metal layer forming the lead wiring layer 4 and the wiring circuit layer 10 of the multilayer wiring board 7 is at least one selected from the group consisting of copper, aluminum, gold and silver. Or, it is desirable to be composed of two or more alloys, and particularly, copper or an alloy containing copper is most desirable. In some cases, a high-resistance metal such as a Ni—Cr alloy may be mixed or alloyed as the conductor composition for adjusting the resistance of the circuit. Further, in order to reduce the resistance of the wiring layer, a metal having a lower melting point than the low-resistance metal, for example, a low-melting metal such as solder or tin is used in an amount of 2 to 20% by weight in the metal component in the conductor composition. May be included.

The thickness of the wiring layer 4 is preferably 1 to 100 μm, and more preferably 5 to 50 μm. When the thickness of these metal layers is less than 1 μm, the resistivity as a lead increases, and when the thickness is more than 100 μm, the deformation of the insulating substrate during lamination increases or the amount of the metal layer embedded in the insulating substrate increases. In addition, there is a problem that the distortion of the insulating substrate is increased and the substrate is easily deformed when the metal layer is embedded. In addition, there is a problem that a fine circuit with high accuracy cannot be obtained because etching becomes difficult. Preferably 5
An electrolytic copper foil of １８18 μm is preferably used.

In order to increase the adhesion strength between the multilayer wiring board 7 and the lead wiring layer 4, the transfer position of the lead wiring layer 4 of the insulating layer on the insulating layer surface of the multilayer wiring board 7 and / or the lead wiring layer 4 The surface roughness is 0.1 μm or more, especially 0.1 μm.
It is desirable to roughen the surface to a thickness of 3 μm to 3 μm, optimally 0.3 to 1.5 μm.

As described above, according to the semiconductor device of the present invention, mounting of the semiconductor element on the lead wiring layer is performed by TAB connection which can be automated, and at the same time, the TAB connection structure is transferred so that the semiconductor device is mounted on the lead wiring layer. A semiconductor device can be manufactured by applying a mounting method excellent in mass productivity to a multilayer wiring board. At the same time, since a semiconductor element connected by TAB can be mounted at an arbitrary position on one substrate, a multi-chip module (MCM) on which many semiconductor elements are mounted can be easily manufactured. . Further, there is an advantage that a load on the environment is small because a lead alloy is not required for mounting.

[0032]

As described in detail above, the semiconductor device of the present invention can be used with respect to a lead wiring layer formed on the surface of a multilayer wiring board formed by laminating a plurality of insulating layers containing a thermosetting resin. Since a TAB-connected semiconductor element can be mounted at an arbitrary position, the multi-chip module has a TA chip.
As a result of applying the B connection structure, a semiconductor device with excellent mass productivity can be provided.

[Brief description of the drawings]

FIG. 1 is a process chart for explaining a method of manufacturing a semiconductor device according to the present invention.

FIG. 2 is a view for explaining a method for manufacturing the multilayer wiring board 7 in FIG. 1 of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Resin film 2 Hole 3 Metal foil 4 Lead wiring layer 5 TAB tape 6 Semiconductor element 7 Multilayer wiring board 8 Insulating layer 9 Insulating substrate 10 Wiring circuit layer 11 Via hole conductor

Claims (4)

[Claims] An insulating substrate having a plurality of insulating layers containing a thermosetting resin laminated thereon, a lead wiring layer formed on the surface of the insulating substrate, and a wiring circuit formed on the surface and / or inside the insulating substrate. A semiconductor device, comprising: a multi-layer wiring board including a layer and a via-hole conductor for electrically connecting the wiring layers; and a semiconductor element TAB-connected to the lead wiring layer. 2. The semiconductor device according to claim 1, wherein the lead wiring layer and the semiconductor element on the surface of the insulating substrate are transferred to the surface of the insulating substrate after the semiconductor element and the lead wiring layer are TAB-connected on the surface of the transfer film. Item 2. The semiconductor device according to item 1. 3. The method according to claim 1, wherein the via-hole conductor is formed by filling a conductor paste containing metal powder, and the wiring circuit layer is formed of metal foil.
13. The semiconductor device according to claim 1. 4. A step of producing a TAB tape in which a lead wiring layer made of a metal foil is formed on the surface of a transfer film;
Connecting, and an uncured state in which a wiring circuit layer and a via-hole conductor for electrically connecting the wiring circuit layer are formed on an insulating substrate on which a plurality of insulating layers containing a thermosetting resin are laminated. A step of manufacturing a multilayer wiring board, and after laminating a TAB tape in which the semiconductor element is TAB-connected to the surface of the multilayer wiring board, peeling off the transfer film, thereby forming the lead wiring layer and the semiconductor element TAB-connected thereto. A step of transferring the substrate to the surface of the multilayer wiring board, and a step of heating and completely curing the multilayer wiring board.