JPH1136027A - Lead frame for semiconductor device - Google Patents

Lead frame for semiconductor device

Info

Publication number
JPH1136027A
JPH1136027A JP13518198A JP13518198A JPH1136027A JP H1136027 A JPH1136027 A JP H1136027A JP 13518198 A JP13518198 A JP 13518198A JP 13518198 A JP13518198 A JP 13518198A JP H1136027 A JPH1136027 A JP H1136027A
Authority
JP
Japan
Prior art keywords
lead frame
semiconductor device
layer
copper alloy
group
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13518198A
Other languages
Japanese (ja)
Other versions
JP3014672B2 (en
Inventor
Masaaki Kurihara
正明 栗原
Tatsuhiko Eguchi
立彦 江口
Takao Hirai
崇夫 平井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Furukawa Electric Co Ltd
Shinko Electric Industries Co Ltd
Original Assignee
Furukawa Electric Co Ltd
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Furukawa Electric Co Ltd, Shinko Electric Industries Co Ltd filed Critical Furukawa Electric Co Ltd
Priority to JP13518198A priority Critical patent/JP3014672B2/en
Publication of JPH1136027A publication Critical patent/JPH1136027A/en
Application granted granted Critical
Publication of JP3014672B2 publication Critical patent/JP3014672B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

PROBLEM TO BE SOLVED: To provide a lead frame for semiconductor device, excellent in blankability, corrosion resistance, stress corrosion cracking resistance, strength, electric conductivity, manufacturability, etc. SOLUTION: Pd is formed into lamellar state on a copper alloy member having a composition consisting of, by weight, 5-35% Zn, 0.1-3% Sn, and the balance Cu with inevitable impurities. This copper alloy can further contain 0.001-0.5 wt.%, in total, of one or >=2 elements selected from the group consisting of Pb, Bi, Se, Te, Ca, Sr, and rare earth elements and can further contain 0.001-1 wt.%, in total, of one or >=2 elements selected from the group consisting of Ni, Si, Cr, Zr, Fe, Co, Mn, Al, Ag, Mg, and P.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、打抜加工性、耐食
性などに優れるIC等の半導体装置用リードフレームに
関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame for a semiconductor device such as an IC having excellent punching workability and corrosion resistance.

【0002】[0002]

【従来の技術】従来より、半導体機器のリードフレーム
材、端子材などには、鉄系材料の他、電気伝導性および
熱伝導性に優れるCu−Sn系合金、Cu−Fe系合金
などの銅系材料が広く用いられている。
2. Description of the Related Art Conventionally, lead frame materials and terminal materials of semiconductor devices have been made of iron-based materials and copper-based alloys such as Cu-Sn-based alloys and Cu-Fe-based alloys having excellent electrical and thermal conductivity. System materials are widely used.

【0003】ところで、前記リードフレーム材などに
は、強度、耐熱性、電気伝導性、および熱伝導性の他、
貴金属(Agなど)めっきや半田めっきが施されるた
め、めっき性、半田接合性、表面平滑性等の特性が重視
される。また、条および板からリードフレームを成型す
る際の寸法精度を確保するために、エッチング加工性ま
たは打抜加工性が良好なことも要求される。さらに、価
格が実用的なことも重要であるそして、これらの特性
は、半導体機器が、高集積化、小型化、高機能化、低コ
スト化するに伴って、益々強く要求されるようになり、
それに応じて、リードフレームは多ピン化、小型化、薄
肉化などが進み、その中でファインピッチのリードフレ
ーム、ピン数は少ないが多列に加工するマトリックス状
のリードフレームなどが開発されるようになっている。
これらのリードフレームは、高精度、低コストの打抜加
工法により製造されるため、リードフレーム材には打抜
加工性の向上が強く求められている。
[0003] By the way, in addition to the strength, heat resistance, electric conductivity, and heat conductivity, the lead frame material and the like include
Since noble metal (Ag or the like) plating or solder plating is applied, characteristics such as plating properties, solder bonding properties, and surface smoothness are emphasized. In addition, in order to ensure dimensional accuracy when molding a lead frame from a strip and a plate, it is required that etching workability or punching workability be good. Furthermore, it is important that price is practical, and these characteristics are increasingly required as semiconductor devices become more integrated, smaller, more functional, and less costly. ,
Correspondingly, lead frames are becoming more multi-pin, smaller, thinner, etc., and among them, fine-pitch lead frames and matrix-type lead frames with fewer pins but processed in multiple rows will be developed. It has become.
Since these lead frames are manufactured by a high-precision, low-cost punching method, it is strongly required that lead frame materials have improved punching workability.

【0004】[0004]

【発明が解決しようとする課題】前述のCu−Sn系合
金およびCu−Fe系合金は、打抜加工性に劣るため、
その代替としてCu−Zn系合金が提案されている(特
開平1−162737号公報)が、この合金は、打抜加
工性には優れているものの、耐応力腐食割れ性に劣ると
いう問題があった。
The above-mentioned Cu-Sn-based alloy and Cu-Fe-based alloy are inferior in punching workability.
As an alternative, a Cu-Zn-based alloy has been proposed (Japanese Patent Laid-Open No. 1-162737). However, this alloy is excellent in punching workability but has a problem that it is inferior in stress corrosion cracking resistance. Was.

【0005】そこで、Cu−Zn系合金上にNiとPd
を順にめっきして、耐応力腐食割れ性を改善した材料が
提案された(特開平5−36878号公報)。しかし、
この材料は、Pd層が高価なため、その厚さを0.01
μm程度に薄くしようとすると、十分な耐食性が得られ
なくなり、またリードを曲げ加工すると、めっき層に亀
裂が入って、合金素地が露出した部分や、タイバーカッ
トされて合金素地が露出した部分に、応力腐食割れが生
じるといった問題があった。また、100ピン以上の多
ピンリードフレームに対しては、打抜加工性が不十分で
あった。
Therefore, Ni and Pd are deposited on a Cu—Zn alloy.
Have been proposed in order to improve the stress corrosion cracking resistance (JP-A-5-36878). But,
This material has a thickness of 0.01 because the Pd layer is expensive.
If the thickness is reduced to about μm, sufficient corrosion resistance will not be obtained, and if the lead is bent, the plating layer will crack, exposing the alloy base or the area where the tie bar cut exposes the alloy base. And stress corrosion cracking. Also, punching workability was insufficient for a multi-pin lead frame having 100 pins or more.

【0006】本発明は、このような事情の下になされ、
打抜加工性、耐食性、耐応力腐食割れ性、強度、導電
性、製造加工性などに優れた半導体装置用リードフレー
ムを提供することを目的とする。
[0006] The present invention has been made under such circumstances,
An object of the present invention is to provide a lead frame for a semiconductor device which is excellent in punching workability, corrosion resistance, stress corrosion cracking resistance, strength, conductivity, manufacturing workability, and the like.

【0007】[0007]

【課題を解決するための手段】上記課題を解決するた
め、本発明(請求項1)は、Znを5〜35wt%、S
nを0.1〜3wt%含み、残部Cuと不可避的不純物
からなる銅合金部材上にPdが層状に形成されているこ
とを特徴とする半導体装置用リードフレームを提供す
る。
In order to solve the above-mentioned problems, the present invention (claim 1) has a feature that Zn is 5-35 wt%,
A lead frame for a semiconductor device, characterized in that Pd is formed in a layer on a copper alloy member containing 0.1 to 3 wt% of n and the balance of Cu and unavoidable impurities.

【0008】また、本発明(請求項2)は、Znを5〜
35wt%、Snを0.1〜3wt%、Pb、Bi、S
e、Te、Ca、Srおよび希土類元素からなる群より
選ばれた1種又は2種以上を総計で0.001〜0.5
wt%含み、残部がCuと不可避的不純物からなる銅合
金部材上に、Pdが層状に形成されていることを特徴と
する半導体装置用リードフレームを提供する。
In the present invention (claim 2), the Zn content is 5 to 5.
35 wt%, Sn is 0.1-3 wt%, Pb, Bi, S
e, Te, Ca, Sr and one or more selected from the group consisting of rare earth elements in total of 0.001 to 0.5
Provided is a lead frame for a semiconductor device, characterized in that Pd is formed in a layered form on a copper alloy member containing wt% and the balance consisting of Cu and unavoidable impurities.

【0009】更に、本発明(請求項3)は、Znを5〜
35wt%、Snを0.1〜3wt%、Pb、Bi、S
e、Te、Ca、Srおよび希土類元素からなる群より
選ばれた1種又は2種以上を総計で0.001〜0.5
wt%含み、更にNi、Si、Cr、Zr、Fe、C
o、Mn、Al、Ag、MaおよびPからなる群より選
ばれた1種又は2種以上を総計で0.001〜1wt%
含み、残部がCuと不可避的不純物からなる銅合金部材
上に、Pdが層状に形成されていることを特徴とする半
導体装置用リードフレームを提供する。
Further, according to the present invention (claim 3), Zn
35 wt%, Sn is 0.1-3 wt%, Pb, Bi, S
e, Te, Ca, Sr and one or more selected from the group consisting of rare earth elements in total of 0.001 to 0.5
wt%, Ni, Si, Cr, Zr, Fe, C
o, Mn, Al, Ag, Ma and P, one or more selected from the group consisting of a total of 0.001 to 1 wt%
Provided is a lead frame for a semiconductor device, characterized in that Pd is formed in a layer on a copper alloy member that contains Cu and the unavoidable impurities.

【0010】また、本発明(請求項4)は、上述の半導
体装置用リードフレーム(請求項1〜3)において、前
記Pd層の厚さが0.01μm以上であることを特徴と
する。
The present invention (claim 4) is characterized in that in the above-mentioned lead frame for a semiconductor device (claims 1 to 3), the thickness of the Pd layer is 0.01 μm or more.

【0011】また、本発明(請求項5)は、上述の半導
体装置用リードフレーム(請求項1〜4)において、前
記銅合金とPd層の間に、Ni、Co、Ni−Co合
金、およびNi−Pd合金からなる群から選ばれた1種
または2種以上が層状に形成されていることを特徴とす
る。
The present invention (Claim 5) provides the above-mentioned lead frame for a semiconductor device (Claims 1 to 4), wherein Ni, Co, Ni-Co alloy and Ni-Co alloy are provided between the copper alloy and the Pd layer. One or more selected from the group consisting of Ni-Pd alloys are formed in layers.

【0012】第1の発明に係る半導体装置用リードフレ
ームは、Cu−Zn−Sn系の銅合金上にPd層を形成
したことを特徴とする。かかる半導体装置用リードフレ
ームにおいて、前記銅合金に含まれるZnは、打抜加工
でのバリの発生やリードの捩じれを抑制する作用を有す
る。その含有量を5〜35wt%に規定する理由は、5
wt%未満では、本発明の効果が十分に得られず、35
wt%を超えると、β相が出現して、冷間加工性が悪化
するためである。
The lead frame for a semiconductor device according to the first invention is characterized in that a Pd layer is formed on a Cu-Zn-Sn-based copper alloy. In such a semiconductor device lead frame, Zn contained in the copper alloy has an effect of suppressing the generation of burrs and the twisting of the leads during the punching process. The reason for defining the content to be 5 to 35 wt% is as follows.
If it is less than 35 wt%, the effect of the present invention cannot be sufficiently obtained, and
If the content exceeds wt%, a β phase appears and the cold workability deteriorates.

【0013】Snは、強度向上、耐応力腐食割れ性改
善、およびPdめっき後の耐食性の改善に寄与する。そ
の含有量を0.1〜3wt%に規定する理由は、0.1
wt%未満では、本発明の効果が十分に得られず、3w
t%を超えると、導電率および熱間加工性が低下するた
めである。なお、Snの好ましい含有量は、0.1〜2
wt%である。
Sn contributes to improvement in strength, improvement in stress corrosion cracking resistance, and improvement in corrosion resistance after Pd plating. The reason for defining the content to be 0.1 to 3% by weight is as follows.
If it is less than 3 wt%, the effect of the present invention cannot be sufficiently obtained, and 3 w
If the content exceeds t%, the conductivity and the hot workability decrease. The preferred content of Sn is 0.1 to 2
wt%.

【0014】前記銅合金部材上に形成するPd層は、耐
応力腐食割れ性、ワイヤボンディング性、半田濡れ性を
改善する作用を有する。このPd層は、その厚さが0.
01μm以上においてその効果が十分発現される。Pd
層の厚さの上限は特に規定しないが、1μm以上に厚く
してもその効果は飽和し、加工費や材料費が嵩むだけで
不経済である。
The Pd layer formed on the copper alloy member has an effect of improving stress corrosion cracking resistance, wire bonding properties, and solder wettability. This Pd layer has a thickness of 0.
The effect is sufficiently exhibited when the thickness is 01 μm or more. Pd
The upper limit of the thickness of the layer is not particularly specified, but if the thickness is increased to 1 μm or more, the effect is saturated and processing cost and material cost are increased, which is uneconomical.

【0015】第2の発明に係る半導体装置用リードフレ
ームでは、第1の発明における銅合金に、さらにPb、
Bi、Se、Te、Ca、Srおよび希土類元素からな
る群より選ばれた1種または2種以上を含有させて、打
抜加工性を向上させたものである。その含有量を総計で
0.001〜0.5wt%に規定する理由は、0.00
1wt%未満では、本発明の効果が十分に得られず、
0.5wt%を超えると、熱間加工性が低下するためで
ある。
In the lead frame for a semiconductor device according to the second invention, the copper alloy according to the first invention further includes Pb,
Punching workability is improved by containing one or more selected from the group consisting of Bi, Se, Te, Ca, Sr and rare earth elements. The reason for specifying the content in total 0.001 to 0.5 wt% is 0.00
If it is less than 1 wt%, the effect of the present invention cannot be sufficiently obtained,
If the content exceeds 0.5% by weight, the hot workability decreases.

【0016】第3の発明に係る半導体装置用リードフレ
ームでは、第2の発明における銅合金に、さらにNi、
Si、Cr、Zr、Fe、Co、Mn、Al、Ag、M
gおよびPからなる群より選ばれた1種または2種以上
を含有させて、合金強度を高め、それにより打抜加工性
を向上させたものである。その含有量を総計で0.00
1〜1wt%に規定する理由は、0.001wt%未満
では、本発明の効果が十分に得られず、1wt%を超え
ると、導電率および熱間加工性が低下するためである。
In the lead frame for a semiconductor device according to the third invention, the copper alloy according to the second invention further includes Ni,
Si, Cr, Zr, Fe, Co, Mn, Al, Ag, M
One or two or more selected from the group consisting of g and P are contained to increase the alloy strength and thereby improve the punching workability. The total content is 0.00
The reason for defining the content to be 1 to 1 wt% is that if the content is less than 0.001 wt%, the effect of the present invention cannot be sufficiently obtained, and if the content exceeds 1 wt%, the conductivity and the hot workability are reduced.

【0017】第1〜第3の発明における銅合金の強度お
よび耐熱性の向上に有効な添加元素として、Ti、I
n、Ba、Sb、Hf、Be、Nb、Pd、B、Cなど
が挙げられる。その添加量は、導電率を大幅に低下させ
ない範囲が望ましい。また、溶解鋳造時に混入するOお
よびSの含有量を50ppm以下にすると、めっき性、
半田接合性、半田濡れ性などの表面特性が良好に保持さ
れる。
As the additional elements effective for improving the strength and heat resistance of the copper alloy in the first to third inventions, Ti, I
n, Ba, Sb, Hf, Be, Nb, Pd, B, C and the like. The addition amount is desirably in a range that does not significantly lower the conductivity. Further, when the content of O and S mixed at the time of melting and casting is set to 50 ppm or less, the plating property,
Good surface properties such as solder jointability and solder wettability are maintained.

【0018】本発明に係る半導体装置用リードフレーム
では、銅合金とPd層の間に、Ni、Co、Ni−Co
系合金、およびNi−Pd系合金からなる群から選ばれ
た1種または2種以上を層状に形成することにより、耐
応力腐食割れ性が改善される。また、半導体装置の組立
てが高温で行われても、銅合金のCuやZnがPd層に
熱拡散するのが抑制され、ワイヤボンディング性や半田
濡れ性が良好に保持される。このような中間層を形成す
ることで、Pd層を信頼性を損なわずに薄くでき、コス
ト低減が図れる。前記中間層は、0.1μm以上の厚さ
でその効果を十分に発現する。
In the lead frame for a semiconductor device according to the present invention, Ni, Co, Ni-Co is provided between the copper alloy and the Pd layer.
By forming one or more selected from the group consisting of a base alloy and a Ni-Pd base alloy in a layered form, the resistance to stress corrosion cracking is improved. Further, even when the semiconductor device is assembled at a high temperature, the diffusion of Cu or Zn of the copper alloy into the Pd layer is suppressed, and the wire bonding property and the solder wettability are well maintained. By forming such an intermediate layer, the Pd layer can be thinned without deteriorating the reliability, and the cost can be reduced. The effect of the intermediate layer is sufficiently exhibited when the thickness is 0.1 μm or more.

【0019】[0019]

【発明の実施の形態】以下、本発明の種々の実施例によ
り、本発明の実施の形態について、詳細に説明する。 (実施例1)下記表1に示す組成の銅合金を高周波溶解
炉により溶解し、これを6℃/秒の冷却速度で鋳造し
て、厚さ30mm、幅200mm、長さ300mmの鋳
塊を得た。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The embodiments of the present invention will be described below in detail with reference to various embodiments of the present invention. (Example 1) A copper alloy having the composition shown in Table 1 below was melted in a high-frequency melting furnace and cast at a cooling rate of 6 ° C / second to form an ingot having a thickness of 30 mm, a width of 200 mm, and a length of 300 mm. Obtained.

【0020】次に、この鋳塊を850℃で熱間圧延し
て、厚さ12mmの熱間圧延板とし、これを厚さ9mm
に両面面削して、酸化皮膜を除去し、次いで、厚さ1.
2mmに冷間圧延したのち、不活性ガス雰囲気中で53
0℃で1時間焼鈍し、更に、厚さ0.21mmに冷間圧
延したのち、不活性ガス中で530℃で1時間焼鈍し、
その後、厚さ0.15mmの板材に仕上圧延した。
Next, the ingot was hot-rolled at 850 ° C. to obtain a hot-rolled plate having a thickness of 12 mm, which was then 9 mm thick.
To remove the oxide film, and then to a thickness of 1.
After cold rolling to 2 mm, 53
After annealing at 0 ° C. for 1 hour and further cold rolling to a thickness of 0.21 mm, annealing at 530 ° C. for 1 hour in an inert gas,
Then, it was finish-rolled into a 0.15 mm thick plate.

【0021】このようにして得られた各々の板材につい
て、(1)引張強さ(TS)、(2)導電率(EC)、
(3)打抜加工性を調べた。また、前記板材から28p
inDIPのリードフレームを打抜き、このリードフレ
ーム上にNiを0.5μmの厚さにめっきし、更にその
上にPdを0.01μmの厚さに電気めっきした。この
ようにして得たリードフレームサンプルについて、
(4)耐応力腐食割れ性、(5)耐食性を調べた。それ
らの結果を下記表2および表3に示す。
For each of the thus obtained sheet materials, (1) tensile strength (TS), (2) electric conductivity (EC),
(3) The punching workability was examined. In addition, 28p from the plate material
An inDIP lead frame was punched out, Ni was plated on this lead frame to a thickness of 0.5 μm, and Pd was further electroplated thereon to a thickness of 0.01 μm. About the lead frame sample obtained in this way,
(4) Stress corrosion cracking resistance and (5) corrosion resistance were examined. The results are shown in Tables 2 and 3 below.

【0022】なお、下記表1では、Pb、Bi、Se、
Te、Ca、Srおよび希土類元素からなる群を第一群
添加元素、Ni、Si、Cr、Zr、Fe、Co、M
n、Al、Ag、MgおよびPからなる群を第二群添加
元素と記した。
In Table 1 below, Pb, Bi, Se,
The group consisting of Te, Ca, Sr and the rare earth element is referred to as a first group additive element, Ni, Si, Cr, Zr, Fe, Co, M
The group consisting of n, Al, Ag, Mg and P was described as a second group additional element.

【0023】前記(1)〜(5)の試験方法を以下に示
す。 (1)引張強さ(TS):JIS−Z2241に準じて
測定した。 (2)導電率(EC):JIS−H0505に準じて測
定した。
The test methods (1) to (5) are described below. (1) Tensile strength (TS): Measured according to JIS-Z2241. (2) Conductivity (EC): Measured according to JIS-H0505.

【0024】(3)打ち抜き性:SKD11製金型で1
mm×5mmの角穴を開け、5001回目から1000
0回目までの打抜き分から20個のサンプルを無作為に
抽出し、各々のバリの高さを測定した。また、打抜き面
における破断部の厚さaを計測し、試験片の厚さbに対
する破断部割合(a/b)×100%を求めた。この割
合が大きい程、打抜加工性は良好で、打抜加工での歩留
まりが高く、かつ加工が精密に行えると評価される。
(3) Punching property: 1 with SKD11 mold
Open a square hole of 5 mm x 5 mm
Twenty samples were extracted at random from the punching up to the 0th time, and the height of each burr was measured. Further, the thickness a of the fractured portion on the punched surface was measured, and the ratio of the fractured portion to the thickness b of the test piece (a / b) × 100% was determined. It is evaluated that the larger this ratio is, the better the punching processability is, the higher the yield in the punching process is, and the more precise the process can be.

【0025】(4)耐応力腐食割れ性(耐SCC性):
前記のリードフレームサンプルのアウターリードを曲げ
半径0.1mmで曲げ加工したのち、JIS−C830
6に準拠するアンモニア雰囲気中で最長500時間曝露
試験し、試験中定期的にサンプルを取出して、曲げ加工
部の応力腐食割れ状況を電子顕微鏡により観察した。耐
SCC性は、割れ発生までの時間で評価した。
(4) Stress corrosion cracking resistance (SCC resistance):
After bending the outer lead of the above lead frame sample with a bending radius of 0.1 mm, JIS-C830
Exposure test was performed for a maximum of 500 hours in an ammonia atmosphere in accordance with No. 6, and samples were taken out periodically during the test, and the state of stress corrosion cracking in the bent portion was observed with an electron microscope. The SCC resistance was evaluated by the time until crack generation.

【0026】(5)耐食性:(4)で用いたのと同じサ
ンプルをJIS−Z2371に準じて塩水噴霧試験(塩
水:5%NaCl、35℃)を24時間行ったのち、腐
食状況を目視観察した。腐食しなかったものを○、若干
腐食したものを△、腐食の激しかったものを×で示し
た。
(5) Corrosion resistance: The same sample used in (4) was subjected to a salt spray test (salt water: 5% NaCl, 35 ° C.) for 24 hours in accordance with JIS-Z2371, and the corrosion state was visually observed. did. Those that did not corrode were marked with ○, those that corroded slightly were marked with Δ, and those that were severely corroded were marked X.

【0027】[0027]

【表1】 [Table 1]

【0028】[0028]

【表2】 [Table 2]

【0029】[0029]

【表3】 [Table 3]

【0030】上記表2および表3から明らかなように、
本発明例のNo.1〜22は、いずれも、打抜加工性
(バリ高さ、破断部割合)、耐食性などの種々の特性に
優れるものであった。
As is clear from Tables 2 and 3,
No. of the present invention example. All of Nos. 1 to 22 were excellent in various properties such as punching workability (burr height, fracture portion ratio) and corrosion resistance.

【0031】これに対し、比較例のNo.23は、Zn
が少ないため、引張強さが低く、また打抜加工性に劣っ
ていた。No.24は、Znが多いため、腐食性に劣
り、冷間圧延で割れが発生した。No.25は、Snが
少ないため、耐応力腐食割れと耐食性が著しく劣った。
On the other hand, the comparative example No. 23 is Zn
, The tensile strength was low and the punching workability was poor. No. Sample No. 24 was inferior in corrosiveness due to a large amount of Zn, and cracked by cold rolling. No. In No. 25, since there was little Sn, stress corrosion cracking resistance and corrosion resistance were remarkably inferior.

【0032】また、No.26は、Snが多いため、導
電率が低く、また熱間圧延で割れが生じた。No.27
は、第一添加元素が多いため、熱間圧延割れがひどく、
製造ができなかった。No.28は、第二添加元素が多
いため、導電率が低下し、また熱間圧延で割れが生じ
た。No.29は、従来のCu−Zn合金であり、引張
強さ、打抜加工性、耐応力腐食割れ性、耐食性に劣って
いた。
In addition, No. Sample No. 26 had a low conductivity due to a large amount of Sn, and a crack was generated by hot rolling. No. 27
Has a lot of first additive elements, so hot rolling cracks are severe,
Could not be manufactured. No. In No. 28, since the amount of the second additive element was large, the electrical conductivity was lowered, and cracks were generated by hot rolling. No. 29 is a conventional Cu-Zn alloy, which was inferior in tensile strength, punching workability, stress corrosion cracking resistance, and corrosion resistance.

【0033】(実施例2)実施例1で用いたNo.5の
板材上に、種々の金属層を電気めっき法により形成して
サンプルとし、これらサンプルについて、(6)ワイヤ
ボンディング性と(7)半田濡れ性を調べた。それらの
結果を下記表4に示す。
(Example 2) No. 2 used in Example 1 Various metal layers were formed on the plate material of No. 5 by electroplating to obtain samples. The samples were examined for (6) wire bonding property and (7) solder wettability. The results are shown in Table 4 below.

【0034】前記(6)、(7)の試験方法を以下に示
す。 (6)ワイヤボンディング性:前記サンプルに30μm
φの金線を100本ボンディングし、100本全てのワ
イヤについてプルテストを行い、ワイヤー部で破断した
本数の割合をワイヤ破断率として評価した。ワイヤ破断
率が大きい程、ボンディング性に優れる。ボンディング
は、フルオートワイヤーボンダーを用いて、荷重50
g、超音波出力0.1W、超音波印加時間30mse
c、ステージ温度240℃の条件で行なった。
The test methods (6) and (7) are described below. (6) Wire bonding property: 30 μm for the sample
One hundred (100) φ gold wires were bonded and a pull test was performed on all 100 wires, and the ratio of the number of wires broken at the wire portion was evaluated as the wire breakage rate. The larger the wire breaking ratio, the better the bonding property. Bonding was performed using a fully automatic wire bonder with a load of 50
g, ultrasonic output 0.1W, ultrasonic application time 30ms
c, The test was performed under the conditions of a stage temperature of 240 ° C.

【0035】(7)半田濡れ性:前記サンプルを250
℃に加熱したホットプレート上に3分間保持したのち、
メニスコグラフ法により、半田濡れ時間を下記条件で測
定した。
(7) Solder wettability: The sample was subjected to 250
After holding on a hot plate heated to ℃ for 3 minutes,
The solder wetting time was measured by the meniscograph method under the following conditions.

【0036】 使用半田:Sn−40%Pb、 温度:230℃、 浸漬速度:25mm/秒、 浸漬時間:10秒、 フラックス:RΜAタイプのフラックス。Solder used: Sn-40% Pb, Temperature: 230 ° C., Immersion speed: 25 mm / sec, Immersion time: 10 seconds, Flux: RΜA type flux.

【0037】[0037]

【表4】 [Table 4]

【0038】上記表4より明らかなように、No.30
〜36は、いずれもPd層が0.01μm以上の厚さに
形成されており、ワイヤボンディング性と半田濡れ性が
ともに優れている。それらの中でも、No.33〜36
は、中間層が設けられ、銅合金成分のPd層への拡散が
抑制されたため、半田濡れ性が一段と向上した。
As is evident from Table 4 above, no. 30
In each of Nos. To 36, the Pd layer is formed to a thickness of 0.01 μm or more, and both the wire bonding property and the solder wettability are excellent. Among them, No. 33-36
Since the intermediate layer was provided and the diffusion of the copper alloy component into the Pd layer was suppressed, the solder wettability was further improved.

【0039】No.37,38は、他に比べて特性が若
干劣っているが、これはPd層が薄かったためである。
No.38は、中間層が設けられた分、No.37より
特性が優れている。
No. 37 and 38 have slightly inferior characteristics to the others, but this is because the Pd layer was thin.
No. No. 38 corresponds to No. 38 provided with the intermediate layer. The characteristics are better than 37.

【0040】[0040]

【発明の効果】以上、詳細に説明したように、本発明の
リードフレームは、打抜加工性、耐食性、耐応力腐食割
れ性、強度、導電性、製造加工性などに優れ、工業上顕
著な効果を奏する。
As described in detail above, the lead frame of the present invention has excellent punching workability, corrosion resistance, stress corrosion cracking resistance, strength, conductivity, manufacturing workability, etc., and is industrially remarkable. It works.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 平井 崇夫 東京都千代田区丸の内2丁目6番1号 古 河電気工業株式会社内 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Takao Hirai 2-6-1 Marunouchi, Chiyoda-ku, Tokyo Inside Furukawa Electric Co., Ltd.

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】Znを5〜35wt%、Snを0.1〜3
wt%含み、残部Cuと不可避的不純物からなる銅合金
部材上にPdが層状に形成されていることを特徴とする
半導体装置用リードフレーム。
1. A Zn content of 5 to 35 wt% and a Sn content of 0.1 to 3 wt.
A lead frame for a semiconductor device, characterized in that Pd is formed in a layer on a copper alloy member containing wt%, the balance being Cu and unavoidable impurities.
【請求項2】Znを5〜35wt%、Snを0.1〜3
wt%、Pb、Bi、Se、Te、Ca、Srおよび希
土類元素からなる群より選ばれた1種又は2種以上を総
計で0.001〜0.5wt%含み、残部がCuと不可
避的不純物からなる銅合金部材上に、Pdが層状に形成
されていることを特徴とする半導体装置用リードフレー
ム。
2. The Zn content is 5 to 35 wt%, and the Sn content is 0.1 to 3%.
wt%, contains one or more selected from the group consisting of Pb, Bi, Se, Te, Ca, Sr and rare earth elements in a total amount of 0.001 to 0.5 wt%, with the balance being Cu and inevitable impurities. A lead frame for a semiconductor device, wherein Pd is formed in a layer on a copper alloy member made of:
【請求項3】Znを5〜35wt%、Snを0.1〜3
wt%、Pb、Bi、Se、Te、Ca、Srおよび希
土類元素からなる群より選ばれた1種又は2種以上を総
計で0.001〜0.5wt%含み、更にNi、Si、
Cr、Zr、Fe、Co、Mn、Al、Ag、Maおよ
びPからなる群より選ばれた1種又は2種以上を総計で
0.001〜1wt%含み、残部がCuと不可避的不純
物からなる銅合金部材上に、Pdが層状に形成されてい
ることを特徴とする半導体装置用リードフレーム。
3. A Zn content of 5 to 35 wt% and a Sn content of 0.1 to 3 wt.
wt%, one or two or more selected from the group consisting of Pb, Bi, Se, Te, Ca, Sr and rare earth elements in a total amount of 0.001 to 0.5 wt%.
One or more selected from the group consisting of Cr, Zr, Fe, Co, Mn, Al, Ag, Ma and P are contained in a total of 0.001 to 1% by weight, and the balance is composed of Cu and inevitable impurities. A lead frame for a semiconductor device, wherein Pd is formed in a layer on a copper alloy member.
【請求項4】前記Pd層の厚さが0.01μm以上であ
ることを特徴とする請求項1ないし3のいずれかの項に
記載の半導体装置用リードフレーム。
4. The lead frame for a semiconductor device according to claim 1, wherein said Pd layer has a thickness of 0.01 μm or more.
【請求項5】前記銅合金とPd層の間に、Ni、Co、
Ni−Co合金、およびNi−Pd合金からなる群から
選ばれた1種または2種以上が層状に形成されているこ
とを特徴とする請求項1ないし4のいずれかの項に記載
の半導体装置用リードフレーム。
5. A method according to claim 1, wherein Ni, Co, and Pd are provided between the copper alloy and the Pd layer.
The semiconductor device according to any one of claims 1 to 4, wherein at least one selected from the group consisting of a Ni-Co alloy and a Ni-Pd alloy is formed in a layer. For lead frame.
JP13518198A 1997-05-16 1998-05-18 Lead frame for semiconductor device Expired - Fee Related JP3014672B2 (en)

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JP12653797 1997-05-16
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