JPH11305725A - Gas electric discharge panel - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the luminance although an address period performed for a color display is very long and a panel light emission time is shortened and to provide a panel structure and a driving method for dummy outline reduction. SOLUTION: As two-dimensional control electrodes for limiting a light emission place at least for display on a display-side substrate, two-dimensional switching elements 1 (or two-dimensional storage elements or the both of them) are arranged on front panel glass 2 corresponding to respective panel pixels or respective color components in the respective pixels. Those respective elements 1 are covered with a dielectric film 6 and electrically insulated against 1st polarity electrodes 4 and 2nd polarity electrodes 5 of discharge maintaining electrodes pairs. Then, driving independent of the discharging maintaining electrodes pairs is performed to make a matrix display and the gas electric discharge panel which has almost no an address period is realized.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a gas discharge panel having a short address period and a driving method thereof.

[0002]

2. Description of the Related Art The electrode structure of a conventional surface discharge type gas discharge panel will be described with reference to the schematic diagram of FIG. The conventional gas discharge panel includes a plurality of pairs of display electrodes 62 and display electrodes 63 formed on a front panel glass 61 and display electrodes 62 and 63 formed on a back panel glass 64.
Are composed of a plurality of address electrodes 65 orthogonal to.

Each of the display electrodes 62 and 63 includes a pair of display electrodes 63 and a discharge gap therebetween.
The discharge space divided by 6 corresponds to one cell, and the gap between the display electrodes in the cell is sufficiently smaller than the gap between the adjacent electrodes between the adjacent cells.

[0004] These display electrodes are covered with a dielectric film 67 and further covered with a protective film 68. The address electrodes 65 are also covered with the dielectric film 69. When color display is performed by ordinary RGB, three types of phosphors 70, 71, and 72 are applied to the surface of the back panel in three cells continuous in a direction parallel to the display electrode, and each cell emits RGB light. The three cells form one pixel. The surface discharge that mainly contributes to display is performed in the gap between the display electrodes, and one of them can be driven independently by the discharge with the address electrode to select lighting and extinguishing, while the other is capable of driving independently. Has a configuration in which all lines are driven simultaneously.

[0005]

In the conventional electrode configuration,
A display frame is temporally decomposed into sub-frames, and a period called an address period is provided for distinguishing cells that are turned on and cells that are not lit for each sub-frame, and matrix display is performed. The address period is a period during which light emission for display is not actively performed. However, if an attempt is made to increase the number of display gradations, the number of subframes increases, and as a result, the total time in one frame of each address period increases. It has been pointed out that the time during which light can be emitted is reduced and the light emission luminance is reduced.

SUMMARY OF THE INVENTION The present invention solves the above-mentioned problem, and has a panel structure including a switching element which can be driven independently of a discharge sustaining electrode pair and can two-dimensionally input a signal to a specific position at a specific time. And a driving method thereof.

[0007]

In order to achieve the above object, the present invention provides a gas discharge panel for performing a matrix display, which is a two-dimensional gas discharge panel for limiting at least a light emitting place for display on a display side substrate. Two-dimensional switching elements and / or two-dimensional storage elements are arranged as control electrodes on the display surface side substrate corresponding to each panel pixel or each color component in each pixel, and these elements are formed by a dielectric layer. The cover is electrically insulated from the pair of sustain electrodes, and discharges by inputting a signal only to a required cell at a time when the pair of sustain electrodes is independently driven, and discharges and emits light for a predetermined time. After that, the driving of all the sustain electrode pairs is stopped to create an erasing state over the entire period until the next subframe or frame, and these are repeated to display a matrix. , To achieve a little gas discharge panel of the address period.

In the present invention, according to the above configuration, the address period can be made very short, and a significant improvement in luminance can be expected.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A gas discharge panel according to the present invention is characterized in that two-dimensional switching elements are arranged corresponding to each panel pixel or each color component in each pixel.

In addition, the driving is performed by giving a potential difference to the discharge sustaining electrode pair independently of the two-dimensional control electrode.

A gas discharge panel for performing a matrix display, wherein a two-dimensional switching element or a two-dimensional switching element is provided as a two-dimensional control electrode for limiting at least a light emitting place for display on a display-side substrate. The storage elements or both of them are arranged on the display surface side substrate corresponding to each panel pixel or each color component in each pixel, and these elements are covered with a dielectric layer to be electrically insulated from the discharge sustaining electrode pair. It is characterized by the following.

In a gas discharge panel for performing a matrix display, a two-dimensional switching element or a two-dimensional switching element is provided as a two-dimensional control electrode for limiting at least a light emitting place for display on a substrate opposite to a display surface. Storage elements or both of them are arranged on the display surface side substrate corresponding to each panel pixel or each color component in each pixel, and these elements are covered with a dielectric layer to be electrically insulated from the discharge sustaining electrode pair. It is characterized by doing.

Further, the plasma display device of the present invention has a data line in units of 1 bit, a vertical scanning line, a flip-flop for taking in the data of the data line at the timing of the vertical scanning line, and a time for outputting the flip-flop. It is characterized by comprising a latch for taking in time data of subfield signal lines having different intervals, and arranging pixels for performing gradation display by changing plasma emission intervals in a matrix.

The method of driving a plasma display according to the present invention is a method of driving a plasma display device capable of simultaneously performing addressing and light emission and performing gradation display by changing a subfield interval. It is characterized by performing.

A method of driving a plasma display device which can simultaneously perform addressing and light emission and perform gradation display by changing a subfield interval, wherein the address interval is a period in which the entire field period is equally divided by gradation bits. There is a feature.

A method of driving a plasma display device capable of simultaneously performing addressing and light emission and performing gradation display by changing a subfield interval, wherein the address interval is shorter than a period in which the entire field period is equally divided by gradation bits. Is also shorter and longer than the LSB light emission interval.

Further, the plasma display device of the present invention has a data line in a unit of a plurality of bits, a vertical scanning line, a flip-flop for taking in the data of the data line at the timing of the vertical scanning line, and an output of the flip-flop. It is characterized by having a decoder for decoding to time data of subfield signal lines having different time intervals, and arranging pixels for performing gradation display by changing plasma emission intervals in a matrix.

The method of driving a plasma display according to the present invention is a method of driving a plasma display device capable of simultaneously performing addressing and light emission and performing gradation display by changing a subfield interval. It is characterized in that addresses are divided into groups.

The grouping of the plurality of bits is M
It is characterized by two groups of SB and LSB groups and a medium-order bit group.

Further, the image display device of the present invention has a 1 bit
A unit data line, a vertical scanning line, a flip-flop that captures data of the data line at the timing of the vertical scanning line, and a latch that captures time data of a subfield signal line having a different time interval at an output of the flip-flop. And a plurality of pixels which perform gradation display at different display intervals are arranged in a matrix.

Further, the image display device of the present invention is an image display device capable of simultaneously performing an address and a display and performing a gradation display by changing a subfield interval, wherein address is performed in units of LSB display period. I do.

Further, the image display device of the present invention is an image display device capable of simultaneously performing an address and a display and performing a gradation display by changing a subfield interval. It is characterized by a divided period.

Further, the image display apparatus of the present invention is an image display apparatus capable of simultaneously performing an address and a display and performing a gradation display by changing a sub-field interval. It is characterized in that it is shorter than the divided period and longer than the LSB display interval.

Further, the image display device of the present invention may include a plurality of bi
a data line in t units, a vertical scanning line, a flip-flop for taking in the data of the data line at the timing of the vertical scanning line, and decoding to time data of a subfield signal line having a different time interval at the output of the flip-flop. A pixel is provided, which is provided with a decoder and performs gradation display by changing display intervals, in a matrix.

(First Embodiment) A first embodiment of the present invention will be described below with reference to FIG. First, in a gas discharge panel, a two-dimensional switching element 1 represented by a TFT or the like or a two-dimensional storage element or both of them are placed on a front panel glass 2 of a display panel on a transparent substrate such as a display panel glass. The first polar electrode 4 and the second polar electrode, which are conductor electrodes made of a metal electrode, a transparent electrode, or a combination thereof, are covered with a transparent non-conductor 3 such as a dielectric material except for a peripheral electrode extraction portion. A polar electrode 5 is provided,
It is further covered with a dielectric film 6.

Further, a protective film 7 such as an MgO film may be provided on the dielectric film 6. On the back panel glass 8 of the substrate on the display side and on the opposite side, a dielectric film 10 which is a non-conductive layer such as a dielectric is provided on a lower electrode 9 on which conductor electrodes are formed on one surface or partially, and a first polarity is further provided. Electrode 4, second polar electrode 5
The partition 11 is provided to extend in the direction perpendicular to the extension direction.

Reference numerals 12, 13, and 14 denote red, green, and blue phosphors sequentially formed between the partition walls.

Here, the minimum unit of the matrix display surrounded by one set of partition walls 11 and including at least one set of the first and second polar electrode pairs is a cell. Here, in this one cell, at least one two-dimensional switching element or two-dimensional storage element or both of them are arranged.

Here, a potential is applied to a two-dimensional switching element arranged in a cell to be turned on at a certain time, and a potential such as a ground potential which is lower than the potential applied by the two-dimensional switching element is applied to a lower surface electrode. A weak discharge is caused, and at the same time, immediately before or immediately after the first and second electrodes, a periodically changing potential difference such as a rectangular wave is given. This potential difference alone does not cause self-discharge, but a two-dimensional switching element. The discharge is started by the applied potential. At this time, the partition may be provided so as to two-dimensionally shield each cell.

Second Embodiment Next, a second embodiment of the present invention will be described with reference to FIG. First, in a gas discharge panel, TF is placed on a front panel glass 21 which is a transparent substrate such as a display surface side glass constituting the front panel 20.
A two-dimensional switching element 22 represented by T or the like or a two-dimensional storage element or both are disposed, and covered with a dielectric film 23 which is a transparent non-conductive material such as a dielectric except for an electrode lead-out portion in a peripheral portion. I do. 24 is a protective film.

On a back panel glass 25 which is a substrate on the side opposite to the display side, a first polarity electrode 26 and a second polarity electrode 27 which are conductor electrodes made of a metal electrode, a transparent electrode, or a combination thereof are provided. And is further covered with a dielectric film 28. Further, on the dielectric film 28, M
A protective layer such as a gO film may be provided. Further, a partition wall 29 extending in a direction perpendicular or parallel to the extension direction of the first and second polar electrodes is provided. A red phosphor 3 is provided between the partition walls.
0, a green phosphor 31 and a blue phosphor 32 are sequentially formed.

Here, a minimum unit of a matrix display surrounded by one set of partition walls and including at least one set of first and second polar electrode pairs is a cell. Here, in this one cell, at least one two-dimensional switching element or two-dimensional storage element or both of them are arranged.

Here, a potential is applied to a two-dimensional switching element arranged in a cell to be turned on at a certain time, and a two-dimensional switching element such as a ground potential is applied to the first or second polar electrode or both electrodes. A weak discharge is caused by giving a potential lower than the potential applied by the above, and at the same time, immediately before or immediately after, a periodically varying potential difference such as a rectangular wave between the first and second electrodes is given, and this potential difference is divided by this potential difference only. Does not self-discharge, but discharge is started by the potential applied by the two-dimensional switching element. At this time, the partition may be provided so as to two-dimensionally shield each cell. Further, the first and second polar electrodes may be attached to the partition. In this case, the phosphor may be attached to the display substrate.

Third Embodiment Next, a third embodiment of the present invention will be described with reference to FIG. First, in a gas discharge panel, a two-dimensional switching element 42 represented by a TFT or the like or a two-dimensional storage element or both of them are arranged on a back panel glass 41 which is a transparent substrate such as a glass opposite to a display surface, Except for the peripheral electrode take-out part, it is covered with a dielectric film 43 which is a non-conductor such as a dielectric. Further, a partition wall 47 extending in a direction perpendicular to and perpendicular to the extension direction of the first polarity electrode 45 and the second polarity electrode 46 of the front panel 44 constituting the display-side substrate is provided.

On the front panel glass 48 of the display-side substrate, there are provided a first polar electrode 45 and a second polar electrode 46, which are conductor electrodes made of metal electrodes, transparent electrodes, or a combination thereof. For further coating. Further, a protective layer 50 such as an MgO film may be provided on the dielectric film 49. A red phosphor 51, a green phosphor 52, and a blue phosphor 53 are sequentially formed between the partition walls.

Here, the minimum unit of the matrix display surrounded by one set of partition walls and including at least one set of the first and second polar electrode pairs is a cell. Here, in this one cell, at least one two-dimensional switching element or two-dimensional storage element or both of them are arranged.

Here, a potential is applied to the two-dimensional switching element 42 arranged in the cell to be turned on at a certain time,
The first polarity electrode 45 or the second polarity electrode 46 or both electrodes are applied with a potential lower than the potential applied by a two-dimensional switching element such as a ground potential to cause a weak discharge, and at the same time, immediately before or immediately after, A periodically varying potential difference such as a rectangular wave is provided between the first and second electrodes, and the potential difference is not self-discharged by the potential difference alone, but the discharge is started by the potential applied by the two-dimensional switching element. At this time, the partition may be provided so as to two-dimensionally shield each cell. Further, the first and second polar electrodes may be attached to the partition.

Next, the operation of the present invention will be described with reference to FIG.
FIG. 5 is a circuit configuration diagram of a two-dimensional switching element per pixel when gradation display is performed with a time width of a subfield.

In FIG. 5, 101 is a data line to which image information is input, 102 is a vertical scanning line to which a signal for controlling writing of one line is added, and 103 is a subfield to which a pulse signal for determining a time interval of gradation control is added. Signal line, 1
Reference numeral 04 denotes a D-type flip-flop that receives a signal on the data line 101 at the timing of the vertical scanning line 102 and holds the data. 105 is a flip-flop 10
4 according to the retained data of the subfield signal line 1
This is a latch for controlling the output at the timing from 03.
The above circuit is, for example, a thin film transistor (Thin Film Transistor).
or) etc. These thin film TFTs have already been put to practical use in liquid crystal active matrix panels and the like, and individual circuits inside are not shown.

Next, an example of the operation timing is shown in FIG.
It will be described with reference to the drawings. FIG. 6 is a diagram showing a method for enabling light emission in the entire period by adjusting a data write address period (hereinafter abbreviated as an address period) to LSB which is a minimum unit of subfield light emission.

For convenience of illustration, the case of 4 bits and 16 gradations will be described. Basically, the time for writing data to each pixel is constant, so that the address period for writing one screen is constant, and the data can be output after the writing is completed. Therefore, the writing and the light emission are shifted by the address period. This method emits light for the entire period and thus has a high luminous efficiency, but has a drawback that the address period is shortened.

As a specific example, a panel of 480 lines in a vertical direction is divided into 16 fields in a general field period of 16.6 ms.
When displaying a gradation image, the address is about 2 μs per line. In this case, it can be said that an amorphous silicon thin film TFT that has been put into practical use can be operated. However, when 256 gradations, which are general natural images, are reached, the time is 0.13 μs, which is difficult with an amorphous silicon thin film TFT. A polycrystalline silicon TFT having good characteristics in practical use is required.

The next operation example is shown in FIG. In this example, one field period is entirely applied to the address period, and the address time is extended. Thereby, about 8.5 at 16 gradations
μs is a practical value of about 4.3 μs at 256 gradations. However, the ratio of the light emission period is about 47% for 16 gradations, 2
A shortcoming of about 25% at 56 gradations causes a disadvantage that the luminous efficiency is deteriorated. However, this is still more efficient than the current three-electrode AC-PDP.

FIG. 8 shows an example of a method in which the ratio of the light emitting period is improved without significantly increasing the address speed. In FIG. 8, at the time of 16 gradations, the address period is set to 10 compared to FIG.
Instead of decreasing the address slightly from 0% to 80%, that is, keeping the address at a high speed of 1.25 times, the ratio of the light emitting period can be improved from about 47% to 75%, that is, 60%. Various operations can be considered even with 256 gradations,
As an example, the efficiency can be increased by about 6.6 times and the light emission period is increased by 2.6 times with the address being increased by 1.25 times, and the effect is increased as the gradation becomes higher, which is extremely useful in practical use.

Another configuration example of the present invention is shown in FIG. 9 and will be described with reference to the drawings. In FIG. 9, instead of addressing one bit at a time, data over a plurality of bits is transferred to a circuit for controlling a pixel at a time, and the data is displayed in gradation in a subfield.

In FIG. 9, reference numeral 201 denotes a plurality of data lines, four in this example, and information of 16 gradations can be written at a time. Reference numeral 202 denotes a vertical scanning line having the same configuration as the vertical scanning line 102 in FIG.
The subfield signal line 204 has the same configuration as that of the D-type flip-flop 104, but is different from the D-type flip-flop 104 in FIG. Reference numeral 205 denotes a decoder which determines which pulse width of the subfield signal line 203 based on the output of the flip-flop 204. As described above, the number of transistors to be configured is larger than that in the configuration example of FIG.

FIG. 10 shows an example of such an operation. Addressing is performed using the entire one field period, and light emission can be performed for the entire period. Therefore, the address period is 480 regardless of the number of gradations.
Panel of lines, about 34 in 16.6 ms field period
μs, which is an extremely long time, and can be used even if the characteristics of the thin film TFT are somewhat poor.

FIG. 11 shows another operation example. This is because, for example, in the case of 256-gradation, 8-bit data lines, the wiring width and the configurations of the flip-flops and decoders become complicated,
In this example, the address is divided into two times, and the number of data lines and the circuit configuration are halved by that amount. This is LSB
However, FIG. 11 proposes to divide into the group of MSB and LSB, and other middle bits. As a result, each address period is averaged and the minimum address period is lengthened, so that there is an advantage that the operation of each circuit may be slow.

In the present embodiment, a plasma display using subfields for gradation display is described as an example. However, the present invention can be applied to an image display device using a light emission principle other than plasma. is there. For example, by turning on / off the reflection of a reflecting mirror, a D for displaying a gradation is displayed.
The present invention can also be applied to an image display device having a configuration such as MA, and an image display device that performs gradation display by digitally controlling a light emission interval and a transmission interval using a shutter structure or the like.

[0050]

As described above, the present invention has an advantage that it can be operated with a simple circuit configuration in units of 1 bit by the configuration for performing the gradation display at the time interval of the subfield. In this case, by adjusting the address period to the LSB period, high-efficiency light emission of all periods can be achieved. In addition, there is an advantage that a low-speed device can be configured by equally dividing the address period into the field period. Further, by making the address period slightly shorter than the field period, the luminous efficiency can be greatly improved.

In another configuration example of the present invention, by processing multi-bit data at a time, it is possible to simultaneously realize a low-speed address and an increase in the light emission period. Further, the circuit can be simplified by using the address by a plurality of times. At this time, by dividing into the configuration of the MSB, the LSB group, and the middle bit, it is possible to average the address period and prevent the address from being speeded up.

[Brief description of the drawings]

FIG. 1 is a schematic view showing a structure of a gas discharge display according to a first embodiment of the present invention.

FIG. 2 is a schematic view showing the structure of a gas discharge display according to a second embodiment of the present invention.

FIG. 3 is a schematic diagram showing a structure of a gas discharge display according to a third embodiment of the present invention.

FIG. 4 is a schematic view showing the structure of a conventional gas discharge display.

FIG. 5 is a diagram illustrating an example of a circuit configuration of a two-dimensional switching element according to the embodiment;

FIG. 6 is a diagram showing a first example of the operation in FIG. 5;

FIG. 7 is a diagram showing a second example of the operation in FIG. 5;

FIG. 8 is a diagram showing a third example of the operation in FIG. 5;

FIG. 9 is a diagram illustrating another example of the circuit configuration of the two-dimensional switching element according to the embodiment;

FIG. 10 is a diagram showing a first example of the operation in FIG. 9;

FIG. 11 is a diagram showing a second example of the operation in FIG. 9;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Two-dimensional switching element 2 Front panel glass 3 Transparent non-conductor 4 First polar electrode 5 Second polar electrode 6 Dielectric film 7 Protective film 8 Back panel glass 9 Bottom electrode 10 Dielectric film 11 Partition wall 12 Phosphor (R) 13 phosphor (G) 14 phosphor (B)

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Keisuke Koga 1006 Kazuma Kadoma, Kadoma City, Osaka Matsushita Electric Industrial Co., Ltd.

Claims (22)

[Claims] 1. A gas discharge panel for performing matrix display, wherein a control electrode for limiting at least a light emitting place for display is arranged on a display surface side substrate. 2. A gas discharge panel for performing a matrix display, wherein a two-dimensional control electrode for limiting at least a light emitting place for display is arranged on a display surface side substrate. 3. A gas discharge panel for performing matrix display, wherein a two-dimensional control electrode for limiting at least a light emitting place for display is arranged only on a display surface and an opposite substrate. panel. 4. A two-dimensional switching element or a two-dimensional switching element comprising only a display surface and an opposite substrate as a two-dimensional control electrode for limiting at least a light emitting place for display in a gas discharge panel performing a matrix display. A gas discharge panel, comprising a general storage element or both of them. 5. A gas discharge panel for performing a matrix display, wherein a two-dimensional switching element and / or a two-dimensional storage element are used as a two-dimensional control electrode for limiting at least a light emitting place for display. A gas discharge panel provided on a display surface side substrate. 6. The gas discharge panel according to claim 1, wherein a two-dimensional switching element is arranged corresponding to each panel pixel or each color component in each pixel. 7. The gas discharge panel according to claim 1, wherein the gas discharge panel is driven by giving a potential difference to a pair of discharge sustaining electrodes independently of a two-dimensional control electrode. Gas discharge panel. 8. A gas discharge panel for performing a matrix display, wherein a two-dimensional switching element or a two-dimensional switching element is used as a two-dimensional control electrode for limiting at least a light emitting place for display on a display side substrate. The storage elements or both of them are arranged on the display surface side substrate corresponding to each panel pixel or each color component in each pixel, and these elements are covered with a dielectric layer to be electrically insulated from the discharge sustaining electrode pair. A gas discharge panel, characterized in that: 9. A gas discharge panel for performing a matrix display, wherein a two-dimensional switching element or a two-dimensional switching element is provided as a two-dimensional control electrode for defining at least a light emitting place for display on a substrate on a side opposite to a display surface. Storage elements or both of them are arranged on the display surface side substrate corresponding to each panel pixel or each color component in each pixel, and these elements are covered with a dielectric layer to be electrically insulated from the discharge sustaining electrode pair. A gas discharge panel. 10. A 1-bit unit data line, a vertical scanning line, a flip-flop for taking in the data of the data line at the timing of the vertical scanning line, and a sub-field signal line having a different time interval at an output of the flip-flop. A plasma display device comprising: a latch for capturing time data; and pixels in which a gradation display is performed by changing a plasma emission interval, are arranged in a matrix. 11. A method of driving a plasma display device capable of simultaneously performing addressing and light emission and performing gradation display by changing a subfield interval, wherein addressing is performed in LSB light emission period units. Method. 12. A method of driving a plasma display device which can simultaneously perform addressing and light emission and perform gradation display by changing a subfield interval, wherein the address interval is a period in which the entire field period is equally divided by gradation bits. A method for driving a plasma display, the method comprising: 13. A method of driving a plasma display device which can simultaneously perform addressing and light emission and perform gradation display by changing a subfield interval, wherein the address interval is shorter than a period in which the entire field period is equally divided by gradation bits. A plasma display driving method, wherein the distance is shorter than the LSB light emission interval. 14. A data line in a unit of a plurality of bits, a vertical scanning line, a flip-flop for taking in the data of the data line at the timing of the vertical scanning line, and a sub-field signal line having a different time interval between outputs of the flip-flop. A plasma display device, comprising: a decoder for decoding to time data; and pixels in which gradation display is performed by changing a plasma emission interval, are arranged in a matrix. 15. A method for driving a plasma display device capable of simultaneously performing addressing and light emission and performing gradation display by changing a subfield interval, wherein a plurality of bits are divided into two or more groups and addressed. And a plasma display driving method. 16. Grouping of a plurality of bits is performed with MSB and L
16. The plasma display driving method according to claim 15, wherein the group includes two groups: an SB group and a medium-order bit group. 17. A 1-bit data line, a vertical scanning line, a flip-flop for taking in the data of the data line at the timing of the vertical scanning line, and a sub-field signal line having a different time interval at the output of the flip-flop. An image display device comprising: a latch for capturing time data; and pixels in which gradation display is performed by changing a display interval, are arranged in a matrix. 18. An image display device capable of simultaneously performing an address and a display and performing a gradation display by changing a subfield interval, wherein the address is performed in units of LSB display periods. 19. An image display device capable of performing address and display simultaneously and performing gradation display by changing a subfield interval, wherein the address interval is a period obtained by equally dividing the entire field period by gradation bits. Image display device. 20. An image display device capable of simultaneously performing an address and a display and performing gradation display by changing a subfield interval, wherein an address interval is shorter than a period in which the entire field period is equally divided by a gradation bit, and an LSB is provided. An image display device characterized by being longer than a display interval. 21. A data line in a unit of a plurality of bits, a vertical scanning line, a flip-flop for taking in the data of the data line at the timing of the vertical scanning line, and a sub-field signal line having a different time interval between outputs of the flip-flop. An image display device comprising a decoder for decoding to time data, wherein pixels for performing gradation display at different display intervals are arranged in a matrix. 22. An image display device capable of performing address and display simultaneously and performing gradation display by changing a subfield interval, wherein a plurality of bits are divided into two or more groups and addressed. apparatus.