JPH11297929A - Pressurized contract semiconductor device and converter using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for ensuring an uniform contact state between a semiconductor element and a package electrode, and for reducing a thermal resistance and an electric resistance in a pressurized contact semiconductor device. SOLUTION: A porous metallic board is arranged between a pressurized contact semiconductor element 1 in which at least one or more semiconductor elements 1 having at least the first main electrode on the first main face and the second main electrode on the second main face are integrated and common electrode boards 4 and 5, or between intermediate electrode boards 2 and 3 arranged on each main face of the semiconductor element 1 and the common electrode boards 4 and 5 in a plane package. Thus, the variation of the height of a contact face can be sufficiently absorbed so that a thermal resistance and an electric resistance on a contact boundary face can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pressure contact type semiconductor device, and more particularly to a pressure contact type semiconductor device which can ensure a uniform contact state between a semiconductor element and a package electrode and can reduce heat resistance and electric resistance. The present invention relates to a device and a converter using the same.

[0002]

2. Description of the Related Art The technology of power electronics, which controls the main circuit current by making full use of the technology of semiconductor electronics, has been applied in a wide range of fields, and its application is being expanded. Thyristors, optical thyristors, gate turn-off thyristors (GT)
O), an insulated gate bipolar transistor (hereinafter abbreviated as IGBT) or a MOS field effect transistor (hereinafter abbreviated as MOSFET) which is a MOS control device. In these devices, a main electrode (cathode, emitter) is formed mainly on a first main surface of a semiconductor chip, and another main electrode (anode, collector) is formed on a second main surface side.

In a high-power semiconductor device such as a GTO or an optical thyristor, elements are packaged for each wafer. Both main electrodes of the above-mentioned element are structured to be brought into pressure contact with a pair of external main electrodes of the package via a heat buffering electrode plate (intermediate electrode plate) made of Mo or W. In order to improve the uniformity of the switching operation and the breaking characteristics of large currents, it is necessary to make the contact state between the above-mentioned element electrode, thermal buffer plate and external main electrode as uniform as possible and to reduce the contact thermal resistance and electric resistance. is important. For this reason, the processing accuracy of package components (flatness, flatness)
Measures have been taken to reduce warpage and swell by raising the pressure.

On the other hand, in IGBTs and the like, a plurality of chips have been mounted so far mainly in a package form of an electrode connection system using wires, which is called a module type structure. In the case of such a modular package, heat generated inside the element is transferred to one side of the package (the side not connected to wires),
That is, since the heat is released only from the side of the electrode directly mounted on the base substrate, the thermal resistance is generally large, and the number of chips (heat generation, current capacity, or mounting density) that can be mounted on one package is limited.

Recently, in order to cope with such a problem and to meet a demand for a larger capacity, a large number of IGBT chips are incorporated in a press-contact type package, and an emitter electrode and a collector electrode formed on the main surface thereof are respectively provided. Attention has been paid to a semiconductor device having a multi-chip parallel type pressure contact structure in which a pair of external electrode plates provided on the package side are brought into surface contact with each other and pulled out. According to this press-fit type package structure, 1) the semiconductor chip can be cooled from both sides, so that the cooling efficiency can be increased, and 2) the inductance and resistance of the connection conductor can be reduced as compared with the above-mentioned module type package. 3) Connection reliability of the main electrode is improved because the connection of the main electrode is no longer a wire bond. However, in this multi-chip parallel type pressure contact type semiconductor device, variations in height at each chip position due to variations in member dimensions and variations in locations due to warpage or undulation of the electrode plate are inevitable. There is a great problem that uniform contact cannot be obtained due to different pressures, that is, thermal resistance and electric resistance vary greatly from chip position to chip position, and element characteristics as a whole are not stable. In the simplest case, it is possible to cope with the problem by using members having strictly uniform dimensions. However, it is unavoidable to increase the cost of parts and the cost of sorting. To solve this problem, JP-A-8-88240 discloses that
A method of interposing a ductile soft metal sheet such as g as a thickness correction plate is disclosed.

[0006]

In the package of the above-mentioned GTO and the like, the element size (wafer size) is increased in order to further increase the capacity in the future. Warpage, undulation, and the like also tend to increase. There is a limit in the processing for reducing the warpage and undulation by increasing the processing accuracy (flatness, flatness) of the package component as described above, and there is a large problem in the processing cost. Therefore, it has become increasingly difficult to ensure uniform contact between the wafer and package components (electrodes) over the entire element size (wafer size), and to reduce thermal resistance and electrical resistance.

On the other hand, the method of sandwiching a soft metal sheet disclosed above as a method for coping with the problem of uniform contact between chips in a multi-chip parallel type pressure contact type semiconductor device is based on studies by the present inventors. And at least in the practical pressure range where the semiconductor chip is not destroyed, the amount of deformation is negligible (only deformation due to elastic deformation), and the height at each chip position (and the height including the intermediate electrode members sandwiching the chip) It was found that when the variation in the size was large, the amount of deformation was insufficient and uniform contact could not be ensured.
This is because the electrode members 44 and 45 sandwiching the soft metal sheet 43 also cause the plastic deformation in the horizontal direction by applying pressure in the thickness direction to the soft metal sheet surface as shown in the schematic diagram of FIG. (Frictional resistance) 46 generated at the interface with
Therefore, it is considered that the deformation resistance in the lateral direction becomes extremely large even with a soft metal material. Even if the pressing force is increased for deformation, the plastic deformation does not easily occur because the frictional force also increases in proportion to the pressure. Especially when the thickness is very small compared to the area receiving the resistance like the sheet shape, the influence of the frictional force generated on this surface becomes dominant, so it exceeds the yield stress of commonly known materials Even if pressure is applied, practically no substantial plastic deformation (flow) occurs, and the thickness of the soft metal sheet hardly changes before and after pressing. To lower this frictional resistance,
A method of reducing the roughness of the electrode member surface is considered,
Realistic processing roughness range (R
(max1 to 0.5 μm, Ra 0.05 to 0.03 μm), no large deformation occurs.

According to the present invention, the uniformity in a large area area becomes more and more difficult with the increase in the size of the package due to the increase in the diameter of the wafer as described above and the parallelization of the elements corresponding to the increase in the capacity. To provide a method of ensuring a stable pressurized contact state, that is, a method capable of absorbing variations in the height of the contact surface (due to warpage, undulation, variations in member dimensions, etc.) and reducing thermal resistance and electrical resistance at the contact interface. Things. A second object is to provide a converter particularly suitable for a large-capacity system by using the semiconductor device obtained as described above.

[0009]

The object of the present invention is to provide a pressure contact device in which a semiconductor element having at least a first main electrode on a first main surface and a second main electrode on a second main surface is incorporated between a pair of electrode plates. The problem can be solved by disposing a porous metal plate between the semiconductor element and the electrode plate in the semiconductor device. More preferably, a dense metal layer is formed on the surface of the porous metal plate, which is the same or softer than the porous metal, or has good oxidation resistance, or a soft metal is formed on the electrode surface facing the porous metal plate. Form a film.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A typical embodiment of the present invention will be described with reference to the drawings.

FIG. 1 shows a basic application form of the present invention.
At least a first main electrode on a first main surface of the semiconductor element 1;
A second main electrode is formed on the second main surface. Intermediate electrode plates 2 and 3 made of Mo, W, or the like are arranged on both main electrode surfaces, and a pair of common electrode plates (main electrode plates) 4 and 5 made of Cu or the like are provided on outer portions of the intermediate electrode plates. Be placed. A porous metal plate 6 is sandwiched between the intermediate electrode plate 3 and the main electrode plate 5, and the whole is pressurized at once and the members are in contact with each other. FIG. 1 shows a case where the sum of the thicknesses of the components 1, 2, and 3 increases in order at the positions (a), (b), and (c). Corresponding to the difference between these heights, the thickness of the porous metal plate 6 having a constant thickness before the pressure contact is increased, and the thickness of the porous metal plate 6 after the pressure contact is changed to (a), (b), ( It becomes thinner in the order of c). That is, the total height including the height of the porous metal (the sum of the thicknesses of the components 1, 2, 3, and 6) is the same at the positions (a), (b), and (c). The thickness of the porous metal plate has changed. Thereby, the members 1,
2 and 3 have thickness variations, and the main electrode plates 4 and 5
Even when there is warpage or undulation, a semiconductor element can be mounted while maintaining a good pressure contact state between a plurality of chip positions (a), (b), and (c), and therefore, variations in thermal resistance and electric resistance can be reduced. A small number of semiconductor devices can be realized. FIG. 1 shows an example in which the porous metal plate 6 is interposed between the surfaces of the main electrode plate 5 and the intermediate electrode plate 3 which are pressed against each other. It may be between the intermediate electrode plates 2 or between the element 1 and the intermediate electrode plates 2 and 3, or may be applied to a plurality of interfaces at the same time. Further, a porous metal plate of a different material may be arranged for each electrode.

The term "porous metal" as used in the present invention generally refers to a substantially dense metal plate, metal foil, or metal sheet, whereas it refers to a metal material containing many pores. And has a fine structure in which a three-dimensional random mesh-like metal continuous portion is formed. What is variously called foam metal, sponge metal, porous metal, foam metal, etc. also belongs to this. For the purpose of the present invention, soft metals having low electric resistance and thermal resistance such as copper, aluminum, silver, and gold, and inexpensive materials having excellent oxidation resistance such as nickel and SUS are particularly preferable. The material with the most suitable properties can be selected.

FIG. 2 shows, as a representative example, a deformation amount (a change amount of the plate thickness) and an electric resistance with respect to a pressing force in a thickness direction measured using a porous Cu plate (foamed metal copper plate) as a porous metal plate. Shows the relationship. As a comparative example, an example in which a normal dense Cu thin plate is used is also shown. This foamed metal copper plate is formed by forming a copper powder film on the void surface of urethane foam by a dry bonding method, heat-treating to eliminate the urethane portion, and sintering the copper powder in a reducing atmosphere. It is a porous metal copper plate having an original mesh-like copper skeleton.
Similarly, there is a method of forming a Cu film on the foamed resin surface by a wet plating method. In this porous Cu plate, the plate thickness decreases with an increase in pressure, and the plate is largely deformed in a specific region (around 0.5 to ² kg / mm ² ), and thereafter, the deformation amount decreases as the density increases. The electric resistance decreases as the pressure increases, and changes greatly in a region where the deformation of the porous plate is large. On the other hand, in the case of a Cu thin plate, as described above (FIG. 13), even if a pressure exceeding the yield stress is applied, large deformation due to plastic deformation does not occur, but only small deformation corresponding to elastic deformation occurs. The electric resistance gradually decreases because the contact resistance with the measurement electrode decreases as the pressure increases. The thermal resistance also showed the same behavior as the above electrical resistance.

In the case of such a porous metal, unlike the case of the above-described dense metal foil (thin plate) (FIG. 13), there is a void inside itself, and microscopically, the force deforming to this portion Because the material subjected to the movement can be easily moved, a large deformation can be obtained with a relatively small pressure. In addition, due to the presence of a void inside the material to absorb the deformation of the material and the deformation resistance due to the frictional force in the lateral direction at the contact surface, the deformation is substantially in the thickness direction (the direction in which the material is pressed). Only happens). As a result, the porous metal after the deformation has a reduced porosity compared to the initial stage and is denser, and the shape of the voids becomes a shape that is crushed in the thickness direction. As described above, this material has the characteristic that the metal channel portion increases in the thickness direction compared to the horizontal direction due to the pressure deformation, so it effectively secures large deformability in the thickness direction. It is possible to reduce electric resistance and thermal resistance. In addition, when a normal dense material is greatly deformed (reduced in plate thickness), a phenomenon in which the material whose volume has changed plastically flows in the lateral direction and the side surface bulges greatly is observed. Since a high quality metal has enough voids in itself to absorb the deformation of the material, even if it is greatly deformed (reduced thickness), the sides hardly bulge. It does not cause a problem such as contact with the device and is suitable for high-density mounting.

Since these materials have elasto-plastic deformability, when the load is removed after the deformation, the elastic deformation returns, but the plastic deformation corresponding to the height variation between the mounted components is maintained. . When pressurizing again, sufficient contact can be ensured at the same pressure by utilizing this elastic deformation. Further, since the apparent elastic coefficient is lower due to the presence of the pores as compared with a normal dense material, the amount of elastic deformation is large, which is suitable for maintaining reliable contact. The pressure at which this deformation occurs and the elasto-plastic deformation behavior are
It can be controlled by the thickness, density (porosity), or material of the continuous portion of the metal formed three-dimensionally, and can be selected so that deformation occurs at an optimal pressure according to the use situation.

When it is desired to secure a large amount of deformation, it is preferable that the porosity of the porous metal plate before deformation is large.
%, More preferably 60-80%. However, if you do not want to increase the amount of deformation excessively from the viewpoint of workability, etc., depending on the application, press molding to a predetermined pressure in advance to reduce the porosity (densification),
It is preferable to adjust the porous plate to have the optimal deformation, heat resistance and electric resistance according to the application.

As shown in the example of FIG. 2, the contact resistance (electricity, heat) at the interface with the electrode sandwiching the porous metal plate is also an important factor under the actual use conditions. In order to further reduce the contact resistance, it is also important to reduce the contact resistance at the interface between the porous metal plate and the electrode. The microstructure of the outermost surface of the porous metal plate for this purpose is shown in FIG.
As shown in (a), the end near the parallel to the contact surface,
Alternatively, a structure having a large number of ends 8 having the largest possible inclination angle (FIG. 3B) is more preferable.

Another form of the porous metal plate for reducing the contact resistance between the porous metal plate and the electrode material sandwiching the porous metal plate is as follows. It is effective to increase the contact area. Examples are shown in FIGS. FIG. 4 shows a structure in which a metal layer 9 which is softer or has better oxidation resistance than the porous metal material is formed on the surface of the porous metal plate 6 by printing, plating or the like.
For example, a material in which a soft film of Ag or Au is formed on a porous plate of Ni, or a material in which a surface oxidation preventing film of Ag or Au is formed on a porous plate of Cu or Al are used. FIG. 5A shows a structure in which a dense metal foil 10 is arranged on the surface of a porous metal plate 6 and is integrally formed. As the metal foil, the same material as the porous metal material is used, and a material using a softer or better oxidation-resistant metal foil is more effective. For example, Cu, Al, Ag,
What formed foil, such as Au, is used. FIG. 5 (b)
Shows a cross section of a plate obtained by further punching the material of (a) by pressing. Since the end face is crushed at the time of pressing, the side face is covered with foil on the surface, and this is a simple method when the side face of the porous plate is desired to be protected with a dense film. As still another method, a method in which the density of only the surface portion is increased by exposing the porous plate to a high temperature for a short time can be used.

FIG. 6 shows an example in which the present invention is applied to a reverse conduction type switching device incorporating a flywheel diode (FWD) 12 connected in anti-parallel with a switching device using an IGBT 11. The figure shows a partial cross section from the outermost part of the press-contact type semiconductor device at the right end to the middle part toward the center. The IGBT chip 11 has an emitter electrode formed on almost the entire first main surface on the upper surface side and a collector electrode on the second main surface on the lower surface side, and further has a control electrode (gate electrode) on the first main surface. Are formed.
In the FWD 12, an anode electrode is formed on the upper surface side of the silicon substrate, and a cathode electrode is formed on the lower surface side. Each of these semiconductor chips is composed of Mo which has both heat dissipation and electrical connection.
Are arranged on an integral type intermediate electrode plate 14 made of, and are arranged in contact with each main electrode on the chip by an individual intermediate electrode plate 13 for each chip. These are the first
Common main electrode plate (Cu) 4 and second common main electrode plate (C
u) 5 Further, a porous copper plate 17 is sandwiched between the intermediate electrode plate 13 and the common main electrode plate 4. Au plating film 15 is 3 to 5 μm on the surface of the intermediate electrode.
m, and a Ni plating film 16 is formed on the surface of the common electrode plate at 1 to 3 μm. The semiconductor chip and the intermediate electrode are fixed to each other by a frame 24 made of Teflon. Further, a wire is drawn out from a gate electrode 18 of the IGBT chip 11 by a wire bond 19, and further connected to a gate electrode wiring board 20 formed on the intermediate electrode plate 14. The space between the pair of common main electrode plates 4 and 5 is externally insulated by an insulating outer cylinder 21 made of ceramic or the like. It has a stopped hermetic structure. The gate electrode wiring is drawn out of the package by a sealed wiring 23 penetrating the outer cylinder 21.

The above-mentioned porous copper plate is formed by sheeting a slurry of Cu powder by a doctor blade method, burning it to burn out the organic binder component, and further reducing the Cu powder at high temperature so that pores remain. It is temporarily sintered. The initial porosity was 60%, the average hole diameter was 30 μm, and the thickness was 150 μm. Although the variation in the thickness of the intermediate electrode plate mounted in this example was 50 μm at the maximum,
As a result of measuring the pressure distribution with pressure-sensitive paper sandwiched between No. 4 and the chips 11 and 12, it was found that the pressure difference was small and the pressure was almost uniformly applied.

FIG. 7 shows an example in which the present invention is applied to a reverse conduction type switching device incorporating a MOS control type switching device 11 and a flywheel diode 12. The lower main electrode (collector, cathode) of each of these semiconductor chips is made of Au, and is heated and pressed and bonded to the intermediate electrode plate 14 on which an Ag plating film 15 is formed in a thickness of 2 to 3 μm in advance. On the other hand, the upper main electrode of each semiconductor chip
(Emitter, anode) is made of Al, and is joined to the intermediate electrode plate 13 on which the Au plating film 15 is formed in advance by 2 to 3 μm. In the present embodiment, the intermediate electrode and the semiconductor are interposed between the first common main electrode plate (Cu) 4 and the second common main electrode plate (Cu) 5 each having the Ag plating film 16 formed on the surface at 2 to 4 μm. The integrated chips are arranged in parallel. At this time, the entire body was pressurized by the two common main electrode plates 4 and 5 with the integrated porous Ni plate 17 interposed between the intermediate electrode plate 14 and the common main electrode plate 5.

The porous Ni plate used above is obtained by subjecting a foamed resin to a conductive treatment, then to an electric Ni plating, and then burning off the resin component by heat treatment. This was further molded under pressure to a pore diameter of about 0.2 mm, the number of cells was 60 cells / inch, and the metal channel thickness was 40 to 80 μm.
m, a thickness of 0.6 mm, and a porosity of about 80%. In this embodiment, the contact resistance between the Ni porous plate and the above-mentioned electrode is greatly reduced because both surfaces of the electrode plates 14 and 5 sandwiching the Ni porous plate are subjected to Ag plating.
Although the thickness variation at each chip position mounted in the present example was 100 μm at the maximum, the pressure distribution was measured with the pressure-sensitive paper sandwiched between the intermediate electrode plate 13 and the common main electrode plate 4, and as a result, the pressure difference was small. It was found that the pressure was almost uniformly applied.

In order to optimally realize the height correction and the reduction of electric resistance and thermal resistance, not only a porous metal plate but also a soft metal foil may be arranged between the electrodes. For example, an Au foil is inserted between the upper main electrode plate and the intermediate electrode plate, a Ni porous plate is inserted between the lower main electrode plate and the intermediate electrode plate, and the same load is applied even when the contact area is different. It is also effective to secure a substantially equal deformation amount.

FIG. 8 shows an example of a mounting form in which a pin 25 for taking out a gate control electrode from a chip is formed at the center of the chip. An example in which the present invention is applied to a reverse conducting switching device incorporating a flywheel diode (FWD) 12 connected in anti-parallel with a switching device using an IGBT 11 as in FIG. 6 is shown. The main electrodes (collector, cathode) on the lower side of each of these semiconductor chips are A
A u-electrode is bonded to the intermediate electrode plate 14 on which an Ag plating film is formed in advance by 2 to 3 μm by heating and pressing. On the other hand, the Au plating film 15 is
It is formed in a thickness of 3 μm and is in pressure contact with each semiconductor chip. These are further sandwiched between a first common main electrode plate (Cu) 4 and a second common main electrode plate (Cu) 5 each having an Ag plating film formed on the surface at 2 to 4 μm. A porous copper plate 17 for absorbing height variations is machined into a shape with a hole in the center, and the pin 25 and the pin insulating member 26 between the intermediate electrode plate 13 and the common electrode plate 4 are formed. Placed around. In this method, the position of the individual porous metal plate 17 can be prevented by the insulating member 26 of the center pin, so that the assembling workability and the like are good. The gate wiring 27
It is housed in a groove 28 provided in the first common main electrode plate (Cu) 4 and drawn out to the outer peripheral portion of the package, and further drawn out of the package by wirings 29 and 23.
In order to further reduce the contact resistance, in this embodiment, a composite porous copper plate in which a dense copper foil was integrated on the surface of the porous plate as shown in FIG. 5 was used as the porous copper plate. As a result, the contact resistance between the porous metal, the intermediate electrode plate, and the common electrode plate could be significantly reduced. This effect was particularly remarkable in the region where the pressing force was small, and the contact resistance could be reduced from 1/5 to 1/10. Although the thickness variation at each chip position mounted in the present embodiment was set to a maximum of 200 μm, as a result of measuring the pressure distribution with the pressure-sensitive paper sandwiched between the intermediate electrode plate 14 and the common main electrode plate 5, the pressure difference was small and almost It was found that the pressure was uniformly applied.

In the case where different types of semiconductor chips are mounted in parallel in one package as described above, and if the thickness of each type is greatly different, the average thickness of the intermediate electrode plate is changed according to the type of chip. It is also effective to prepare a changed one, adjust a large difference in chip thickness, and use the deformation caused by the porous metal plate of the present invention mainly for absorbing thickness variations of the intermediate electrode plate and the semiconductor chip.

FIG. 9 shows an example in which a porous copper plate 30 integrally formed with a dense thin film layer 33 of Ag is disposed between the cathode electrode side of a wafer-sized semiconductor element 31 and an intermediate electrode plate 32. I have. Ag plated between the anode electrode side of the semiconductor element 31 and the common electrode plate 5
o, a metal foil 34 and an intermediate electrode plate 35 were arranged. The pore diameter is about 0.1 mm, the number of cells is 40 / mm ² , the metal channel part thickness is 30 to 50 μm, the thickness is 0.8 mm, and the porosity is about 75%.
Plate material. The porous copper plate 30 absorbs height variations and compensates for a decrease in contact area due to pores on the surface of the porous metal, thereby reducing contact resistance.

FIG. 10 shows an example in which there is no intermediate electrode between the collector electrode of the semiconductor chip 1 and the common electrode plate. When the porous electrode plate is sandwiched between the common electrode plate 5 and the semiconductor device 1 without the intermediate electrode plate on the collector side in order to prevent the destruction of the semiconductor device due to pressurization, the pressed portion on the emitter side, That is, it is important to arrange the porous metal plate 36 in a region that is the same as or smaller than the shape of the intermediate electrode plate 2 having the soft metal film 38 formed on the surface. In this embodiment, a soft metal foil 3 is provided between the chip main electrode and the porous metal plate to further reduce contact resistance and protect the chip.
7 is inserted.

Conventionally, the surface of the common electrode plate and the surface of the intermediate electrode plate are generally provided with a surface roughness (Rma) to reduce contact resistance.
x) had to be finished to 1 μm or less, but the surface of the above-mentioned porous metal plate, common electrode plate sandwiching the soft metal foil, etc., and the intermediate electrode plate had rough irregularities exceeding the maximum surface roughness (Rmax) of 1 μm. But the material is deformed according to the surface irregularities,
Since the contact area can be microscopically increased and the contact resistance can be reduced, the processing cost can be reduced.

As the material of the porous metal plate, it is preferable to use mainly metals such as Cu, Al, Ag, Au or Ni, or alloys thereof. It is preferable to select the most suitable material and surface treatment depending on whether heat resistance, electric resistance reduction, or improvement in deformability is prioritized, depending on the usage mode of the semiconductor device.

As a material for the intermediate electrode, a material having a thermal expansion coefficient between Si and the external main electrode material and having good thermal conductivity and electric conductivity is used. Specifically, tungsten
Metal such as (W) and molybdenum (Mo), or Cu-W, Ag-W, Cu-M using them as main constituent materials
o, Ag-Mo, Cu-FeNi or other composite materials or alloys, and further, composite materials of metals and ceramics or carbon, such as Cu / SiC, Cu / C, Al / SiC,
Al / AlN and the like are preferable. On the other hand, for the main electrode, it is preferable to use copper or aluminum having good electrical conductivity and thermal conductivity, or the above-mentioned alloy or composite material containing them.

The mounting method of the present invention can of course be used for a pressure contact type semiconductor device comprising only a switching semiconductor such as an IGBT which does not include a diode. For example, a large number of diode chips alone can be used in a pressure contact type package by the above method. Implementation is of course also effective. Further, in the above embodiment, the description has been made mainly using the IGBT.
The present invention is directed to a general semiconductor device having at least a first main electrode on a first main surface and a second main electrode on a second main surface, and uses an insulated gate transistor (MOS) other than an IGBT.
Transistor), IGCT (Insulated Gate Controll)
ed Thyristor) and other insulated gate thyristors (M
An OS control thyristor), a GTO, a thyristor, a diode, and the like can be similarly implemented. In addition, Si
The present invention is similarly effective for compound semiconductor devices such as SiC and GaN other than the device.

In the press-contact type semiconductor device of the present invention, a stable contact state between the electrodes can be obtained even when the size (capacity) is increased, so that a semiconductor device having a small electric resistance and a small thermal resistance can be obtained. Therefore, by using this press-contact type semiconductor device, it becomes possible to realize a large-capacity converter in which the volume and cost of the converter are greatly reduced. FIG. 11 shows an IG according to the present invention.
FIG. 3 is a circuit diagram of a configuration for one bridge when a pressure contact type semiconductor device of BT is applied to a power converter as a main conversion element. IGBT element 40 and diode element 41 serving as main conversion elements
Are arranged in antiparallel, and n pieces are connected in series. These IGBTs and diodes represent a press-contact type semiconductor device in which a number of semiconductor chips according to the present invention are mounted in parallel. In the case of the reverse conducting IGBT pressure contact type semiconductor device of the embodiment of FIGS.
The chip and the diode chip are put together in one package. This is provided with a snubber circuit 42 and a current limiting circuit. FIG. 12 shows a configuration of a self-excited converter in which the three-phase bridge of FIG. 11 is multiplexed by four.
The press-contact type semiconductor device of the present invention is mounted in a so-called stack structure in which a plurality of the press-contact semiconductor devices are connected in series with a water-cooled electrode interposed therebetween so as to make surface contact with the outside of the main electrode plate, and pressurize the entire stack at once. According to the present invention, uniform contact can be obtained even with a lower pressing force than in the past, so that the stack structure and the like can be simplified.

The press-contact type semiconductor device of the present invention is not particularly limited to the above example, and is particularly suitable for a self-excited large-capacity converter used in a power system or a large-capacity converter used as a mill converter.
Variable speed pumped storage power generation, substation facilities in buildings, substation facilities for railways,
It can also be used in converters for sodium-sulfur (NaS) battery systems and vehicles.

[0034]

According to the present invention, uniformity over a large area becomes increasingly difficult with the increase in the size of the package due to the increase in the diameter of the wafer and the parallelization of elements corresponding to the increase in the capacity. Pressure welding can be easily realized with relatively low pressure, that is, it absorbs variations in the height of the contact surface sufficiently,
In addition, the thermal resistance and electric resistance at the contact interface can be reduced.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a basic configuration of the present invention.

FIG. 2 is a diagram showing a relationship between a pressing force, a thickness change amount of a porous metal plate, and electric resistance.

FIG. 3 is an enlarged view showing a surface microstructure of a porous metal material.

FIG. 4 is a diagram showing a cross-sectional structure of a porous metal material having a dense metal layer formed on the surface.

FIG. 5 is a diagram showing a cross-sectional structure of a porous metal material having a dense metal layer formed on the surface.

FIG. 6 is a diagram showing an embodiment of the present invention applied to an IGBT.

FIG. 7 is a diagram showing an embodiment of the present invention applied to an IGBT.

FIG. 8 is a diagram showing an embodiment of the present invention applied to an IGBT.

FIG. 9 is a diagram showing an embodiment of the present invention applied to a wafer size semiconductor device.

FIG. 10 is a diagram showing an embodiment of the present invention.

FIG. 11 is a configuration circuit diagram of one bridge using the semiconductor device of the present invention.

12 is a configuration diagram of a self-excited converter in which the three-phase bridge of FIG. 11 is multiplexed by four.

FIG. 13 is a diagram illustrating the deformation behavior of a soft metal when pressurized by a conventional method.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Semiconductor element, 2, 3 ... Intermediate electrode plate, 4, 5 ... Common electrode plate, 6, 17, 30, 36 ... Porous metal plate, 7 ... Columnar metal protrusion, 8 ... Columnar metal terminal, 9 ... Metal layer Reference numeral 10: dense metal foil, 11: IGBT, 12: flywheel diode, 13, 14: intermediate electrode plate, 15, 16: metal plating film, 18: gate electrode, 19: wire bond, 20 ...
Gate electrode wiring board, 21: insulating outer cylinder, 22: metal plate,
23 ... airtight through wiring, 24 ... frame, 25 ... pin, 26 ... insulating member, 27 ... gate wiring, 28 ... groove, 29 ... wiring,
31: Wafer size semiconductor element, 32, 35: Intermediate electrode plate, 33: Dense thin film layer, 34: Metal foil, 37: Soft metal foil, 38: Soft metal film, 40: IGBT element, 41:
Diode element, 42 snubber circuit, 43 soft metal sheet, 44, 45 electrode member, 46 frictional force (frictional resistance).

Claims (11)

[Claims] 1. A flat package in which a pair of electrode plates exposed on both sides is externally insulated by an insulating outer cylinder, at least a first main electrode on a first main surface and a second main surface on a second main surface. A pressure contact type semiconductor device, comprising a semiconductor device incorporating at least one semiconductor element having a main electrode, wherein a porous metal plate is arranged between the semiconductor element and an electrode plate. 2. A flat package in which a pair of electrode plates exposed on both sides are externally insulated by an insulating outer cylinder, at least a first main electrode on a first main surface and a second main electrode on a second main surface. A semiconductor device incorporating at least one or more semiconductor elements having a main electrode, wherein an intermediate electrode plate having both conductivity and heat radiation is interposed between a main electrode of each semiconductor element and an electrode plate opposed thereto. And a porous metal plate disposed between at least one of the intermediate electrode plates and an electrode plate facing the intermediate electrode plate. 3. The method according to claim 1, wherein the porous metal plate is mainly made of Cu, Al,
3. A pressure contact type semiconductor device according to claim 1, wherein said semiconductor device is made of Ag, Au or Ni. 4. A dense metal layer, which is the same as or more soft than the porous metal material or has good oxidation resistance, is formed on at least one surface of the porous metal plate. 4. The pressure contact type semiconductor device according to any one of items 3 to 3. 5. A main electrode, an intermediate electrode plate of each of said semiconductor elements,
5. The pressure contact type semiconductor device according to claim 1, further comprising a soft metal foil interposed between at least one contact surface of the electrode plate and the electrode plate facing each other. 6. A pressure contact type semiconductor device according to claim 1, wherein a soft metal film is formed on at least one surface of said intermediate electrode or said electrode plate. 7. The pressure contact type according to claim 1, wherein at least one surface of said electrode plate and said intermediate electrode plate is roughened to have a maximum surface roughness (Rmax) exceeding 1 μm. Semiconductor device. 8. The semiconductor device is an insulated gate device having a first main electrode and a control electrode on a first main surface and a second main electrode on a second main surface. A flywheel diode having a first main electrode on one main surface and a second main electrode on a second main surface, a plurality of flywheel diodes each being incorporated in parallel in anti-parallel with the insulated gate element. A pressure contact type semiconductor device according to any one of claims 1 to 7. 9. The semiconductor device according to claim 1, wherein said semiconductor element comprises at least one PN.
8. The pressure contact type semiconductor device according to claim 1, wherein the semiconductor device is a single semiconductor element substrate having a junction. 10. A flat package in which a pair of electrode plates exposed on both sides are externally insulated by an insulating outer cylinder, at least a first main electrode on a first main surface and a second main surface on a second main surface. A power converter, wherein at least one semiconductor element having a main electrode is incorporated, and a pressure contact type semiconductor device in which a porous metal plate is arranged between the semiconductor element and an electrode plate is used as a main conversion element. . 11. A flat package in which a pair of electrode plates exposed on both surfaces are externally insulated by an insulating outer cylinder, at least a first main electrode on a first main surface and a second main surface on a second main surface. At least one or more semiconductor elements having a main electrode are incorporated, and between the main electrode of each semiconductor element and an electrode plate facing the same, an intermediate electrode plate serving as both heat and heat radiation is interposed,
A power converter characterized in that a pressure contact type semiconductor device in which a porous metal plate is disposed on at least one of the intermediate electrode plate and an electrode plate facing the intermediate electrode plate is used as a main conversion element.