JPH11295388A - Method of inspecting semiconductor integrated circuit device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To inspect the interior of a semiconductor integrated circuit at a high efficiency and high accuracy. SOLUTION: On the occasion of inspecting a semiconductor integrated circuit 10 having rewritable memory elements 11, a microcomputer 12 and function blocks 15, 16, inspecting programs are written in the memory elements 11, executed by the microcomputer 12 contained in the semiconductor integrated circuit to send inspection dated to the function blocks 15, 16 and the outputs of the function blocks are discriminated to inspect.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit having a function for facilitating inspection of a semiconductor integrated circuit and a method of inspecting the same.

[0002]

2. Description of the Related Art In recent years, semiconductor integrated circuits have become larger and more complex, and the time required for testing the semiconductor integrated circuits has been increasing at an accelerating rate. In particular, ASICs (integrated circuits for specific applications) incorporating a microcomputer have a large problem. As a result, there is an increasing demand for suppressing an increase in the time required for inspection.

When testing a semiconductor integrated circuit, the test is performed by inputting test data to an input external terminal of the semiconductor integrated circuit and observing a state of an output terminal of the semiconductor integrated circuit which is generated thereby.

FIG. 6 shows a conventional inspection method. The semiconductor integrated circuit 10 to be inspected includes a storage element 11, a microcomputer 12, and circuit blocks 15, 16, and 17.

[0005] Reference numerals 20, 21, 22 denote input external terminals of the semiconductor integrated circuit, and 30, 31, 32 denote output external terminals of the semiconductor integrated circuit. Reference numerals 40, 41, and 42 denote wirings for inputting inspection data, and reference numerals 50, 51, and 52 denote output wirings for output observation. 60,61,6
Reference numeral 2 denotes a standard signal wiring for inputting a standard signal to the comparison circuit 13.

The comparison circuit 13 includes output wirings 50, 51,
Each of the sample signals input through the reference signal line 52 is compared with the standard signal input through the standard signal lines 60, 61, and 62, and it is determined whether or not they all match.
Output to The conventional inspection methods include 11, 12, 1
5, 16, and 17 are not particularly essential.

More specifically, in the conventional inspection method,
Considering the inside of the semiconductor integrated circuit 10 as a black box,
The test data is sequentially applied to the input external terminals 20, 21, 22. As a result, the data output to the output external terminals 30, 31, 32 is a data sequence expected when the semiconductor integrated circuit 10 operates normally. A certain standard signal wiring 60,
The comparison circuit 13 compares the data 61 and 62 with each other to determine whether the test passes or fails.

[0008]

In such a conventional inspection method, even when the pattern of the inspection data sequence is repeated several times, the inspection data sequence for the repetition and the expected output data value are required. In addition, the inspection data string tends to be large, and the inspection becomes inefficient due to the limitation of the inspection apparatus. If the limit of the inspection device is exceeded, there is a problem that the inspection at the actual operating frequency of the semiconductor integrated circuit cannot be performed.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a method of inspecting a semiconductor integrated circuit, which can perform efficient actual operation verification.

[0010]

According to the present invention, there is provided a method for testing a semiconductor integrated circuit, wherein a program for a microcomputer for performing a test is written into a storage device mounted on the semiconductor integrated circuit to be tested, and the program is executed. Is executed by a microcomputer mounted on the semiconductor integrated circuit to be inspected, to inspect the inside of the semiconductor integrated circuit.

According to the method for testing a semiconductor integrated circuit of the present invention, it is possible to efficiently perform verification in actual operation.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method for testing a semiconductor integrated circuit device according to the present invention, when testing a semiconductor integrated circuit having a rewritable storage element, a microcomputer, and a functional block, includes the steps of: A test program is written from outside the circuit device, the microcomputer executes the test program recorded in the storage element, sends test data to the input terminal of the functional block, and outputs normally from the output terminal of the functional block. Is determined.

Hereinafter, a method for testing a semiconductor integrated circuit according to the present invention will be described with reference to specific embodiments. FIG. 1 shows a semiconductor integrated circuit 10 capable of realizing the inspection method of the present invention,
The semiconductor integrated circuit 10 itself is also a test target. The semiconductor integrated circuit 10 to be inspected includes a storage element 11, a microcomputer 12, and circuit blocks 15, 16, and 17.

Reference numeral 200 denotes a plurality of input external terminals of the semiconductor integrated circuit 10, and 201 denotes a plurality of output external terminals of the semiconductor integrated circuit 10. Reference numeral 80 denotes a write line for writing a test execution program from the input external terminal 200 to the storage element 11.

Reference numeral 81 denotes a data transfer line between the storage element 11 and the microcomputer 12. Reference numeral 82 denotes a data transfer line for the microcomputer 12 to execute a test program and transmit a test data sequence to and from the test target circuit blocks 15, 16 and 17 and to fetch the test results.

Reference numeral 83 denotes a microcomputer 12 at the time of inspection.
This is an inspection result output line that outputs the inspection result determined by the above to the output external terminal 201. The following inspection method is performed using the semiconductor integrated circuit having this configuration.

First, an inspection program executable by the microcomputer 12 is written from the input external terminal 200 to the storage element 11 through the write line 80. Next, the microcomputer 12 executes the written program using the data transfer line 81.

The microcomputer 12 executing this program sends inspection data to the data transfer line 82.
Is sent to the inspection blocks 15, 16, 17 using The output results of the circuit blocks 15, 16 and 17 appearing by the microcomputer 12 are fetched by the microcomputer 12 using the data transfer line 82, compared with expected values, and the results are output to the external output terminal 201 using the inspection result output line 83. Output to

Finally, by checking the contents output to the external output terminal 201 by the program, it is possible to determine whether the inspection is successful or not. (Embodiment) Referring to FIG. 2, a semiconductor integrated circuit 10 includes a storage element 11, a circuit block 19, and a microcomputer 18.
Built-in. 500 indicates an address bus, and 501 indicates a data bus.

Reference numeral 204 denotes an operation mode designating terminal for switching between a test state and a normal operation state. 205 denotes a state in which the microcomputer 18 is stopped when the operation mode designation terminal 204 is set to the test mode or recorded in the storage element 11. This is an input external terminal for performing control for switching whether to execute a test by executing a program.

Reference numeral 202 denotes an input external terminal for specifying an address for writing a program to the storage element 11 through the address bus 500 with the operation mode specifying terminal 204 set to the inspection mode.

Reference numeral 203 denotes an external input terminal for data for writing a program to the storage element 11 through the data bus 501 with the operation mode designation terminal 204 set to the inspection mode.

The input external terminals 202 and 203 are structured so that data can be exchanged with the address bus 500 and the data bus 501 only when the operation mode designating terminal 204 is in the inspection state by the inspection circuit 400.

When the operation mode designating terminal 204 is in the inspection state and the input external terminal 205 is set in the stop state, the microcomputer 18 stops execution and outputs data to the address bus 500 and the data bus 501. do not do. If the operation mode designating terminal 204 is set to the inspection state and the input external terminal 205 is set to the inspection execution state, the program is executed from the address allocated to the storage element 11 in advance.

The inspection circuit 401 assigns a valid address to all terminals of the circuit block 19 to be inspected in advance only when the terminal is in the inspection state, and inputs data from the microcomputer 18 to the input of the circuit block 19 via the address. The inspection data can be sent to the terminal, and the result can be read from the output terminal of the circuit block 19.

The inspection circuit 402 includes an input external terminal 203
A valid address can be assigned only when is in the inspection state, and the result of the inspection executed by the microcomputer 18 can be output.

The output external terminal 301 is for outputting inspection result data output from the inspection circuit 402. In such a circuit configuration, the inspection method of the present invention will be described by setting more specific conditions.

The conditions set for the explanation are as follows. (First condition) In the storage element 11, addresses 70 (hexadecimal) to 7F (hexadecimal) are continuously allocated.

(Second Condition) The address bus has 8 bits, and the data bus has 8 bits. (Third condition) Operation mode designating terminal 20 shown in FIG.
4 is “0” in the inspection state and “0” in the normal operation state.
1 ".

(Fourth Condition) The input external terminal 205 shown in FIG. 2 is set to “0” in the stop state and “1” in the test execution state.

(Fifth Condition) The circuit block 19 shown in FIG. 2 is a multiplier. As shown in FIG. 3, the input terminals A0, A1, A2 and A3 are 4-bit binary numbers with A0 being the least significant bit and A3 being the most significant bit (hereinafter referred to as A). , B1, B2, and B3 are 4-bit binary numbers (hereinafter referred to as B) with B0 being the least significant bit and B3 being the most significant bit.

Output terminals Y0, Y1, Y2, Y3, Y4
Y5, Y6, and Y7 are 8-bit binary numbers (hereinafter, referred to as Y) with Y0 being the least significant bit and Y7 being the most significant bit. The result of multiplying A and B by a binary number is output to Y.

(Sixth condition) Microcomputer 1
The result of the inspection performed in step 2 is output to the output external terminals 301 (eight pieces) shown in FIG. The eight output external terminals 301 are connected to E0, E1, E2, E3, E
4, E5, E6, and E7, where E0 is an 8-bit binary number with the least significant bit and the most significant bit. If the result of the inspection passes, “0” (8 digits in binary) is output to this terminal.

(Seventh Condition) When the operation mode designating terminal 204 shown in FIG. 2 is in the inspection state, each terminal of the circuit block 19 and the output external terminal 301 are assigned the addresses shown in FIG.

A procedure for inspecting the circuit block 19 shown in FIG. 2 under the above conditions will be described below. (First) Operation mode designation terminal 20 shown in FIG.
4 is set to "0" to enter the inspection state.

(Second) When the input external terminal 205 shown in FIG.
Is stopped, and the address bus 500 and the data bus 50
Step 1 prevents the microcomputer from outputting data.

(Third) A program for the microcomputer 18 for performing the operation of the flowchart shown in FIG. 5 is supplied from the input external terminals 202 and 203 shown in FIG. 2 and an address 70 (hexadecimal number) allocated to the storage element 11 is provided. Write in order from

(Fourth) The microcomputer 18 sets the input external terminal 205 shown in FIG.
Are set to the inspection execution state, and are sequentially executed from the address 70 (hexadecimal number).

(Fifth) The inspection result is confirmed from the output external terminal 301 shown in FIG. By inspecting the semiconductor integrated circuit device as described above, the following effects can be obtained.

Although a very simple example has been described for the sake of explanation, 8 × 8 = 64 kinds of test data strings are required even in the case of checking a circuit block of a 4-bit multiplier in this example. . When the conventional method is used, the information to be given to the input terminal for one inspection is 8 bits, which is 64 bits.
Therefore, it is necessary to send inspection data for 8 × 64 = 512 bits to the semiconductor integrated circuit.

On the other hand, in the above embodiment, since the inspection data is generated by the program of the microcomputer, the repeated inspection data can be collected, so that the amount of data to be sent to the semiconductor integrated circuit can be extremely small.

In addition, since the microcomputer can calculate the value of the correct result or compare the correct result with the actual result to judge the pass or fail of the test, a huge number of data strings of the correct result as in the conventional method can be obtained. There is no need to prepare in advance.

In addition, since the pass / fail of the test result is determined inside the semiconductor integrated circuit, it is not necessary to observe the output of the signal outside the semiconductor integrated circuit to determine the pass / fail of the test result. Since the maximum frequency that can be supported by the inspection apparatus is not limited, an inspection close to the actual operation of the semiconductor integrated circuit can be performed.

Regarding an increase in the number of circuits required for implementation, the inspection circuit 400 passes the input external terminals 202 and 203 through the data bus and the address bus, respectively, when the signal of the input external terminal 203 is in the inspection state. In the normal operation state, it can be realized only with a three-state buffer because it does not pass through, and the inspection circuits 401 and 402 can also be realized with a small-scale circuit of an address decoder and a flip-flop. In a semiconductor integrated circuit including a microcomputer and a storage element, the circuit block is controlled by the microcomputer in most cases.
Since there are many terminals of the circuit block that do not need to be connected via a circuit, a smaller circuit can be used.

[0045]

As described above, according to the method for testing a semiconductor integrated circuit device of the present invention, when testing a semiconductor integrated circuit having a rewritable storage element, a microcomputer and functional blocks, Writes a test program from outside the semiconductor integrated circuit device, the microcomputer executes the test program recorded in the storage element, sends test data to the input terminal of the functional block, and outputs from the output terminal of the functional block. It is characterized by judging whether it is normal or not, and by repeatedly utilizing the storage element and the microcomputer of the semiconductor integrated circuit to be inspected and inspecting the functional blocks, it is possible to collect repeated inspection data. Therefore, the amount of data sent to the semiconductor integrated circuit is very small compared to the conventional inspection method. Is Dressings.

In addition, since the semiconductor integrated circuit microcomputer can calculate the value of the correct result and compare the correct result with the actual result to judge whether or not the inspection is successful, a huge number of correct results can be obtained as in the conventional method. It is not necessary to prepare the data string in advance.

In addition, since the semiconductor integrated circuit testing apparatus is not limited by the maximum frequency that can be supported, it is possible to perform an inspection close to the actual operation of the semiconductor integrated circuit.

[Brief description of the drawings]

FIG. 1 is an inspection circuit diagram showing an inspection method of the present invention.

FIG. 2 is a test circuit diagram of an embodiment of the present invention.

FIG. 3 is an explanatory diagram of external specifications of a test circuit block in the embodiment.

FIG. 4 is an explanatory diagram of address assignment in a test state in the embodiment.

FIG. 5 is a flowchart of an inspection execution program of the microcomputer in the inspection state in the embodiment.

FIG. 6 is an explanatory view of a conventional inspection method.

[Explanation of symbols]

Reference Signs List 10 semiconductor integrated circuit to be inspected 11 storage element built in semiconductor integrated circuit 12, 18 microcomputer built in semiconductor integrated circuit 13 comparison circuit 15, 16, 17, 19 circuit block in semiconductor integrated circuit 200, 202, 203, 204, 205 Input external terminals 201, 301 Output external terminals 400, 401, 402 Test circuit 500 Address bus 501 Data bus

Claims (1)

[Claims] When inspecting a semiconductor integrated circuit having a rewritable storage element, a microcomputer, and a functional block, an inspection program is written into the rewritable storage element from outside a semiconductor integrated circuit device. A test method for a semiconductor integrated circuit device, wherein a test program recorded in the storage element is executed, test data is sent to an input terminal of a functional block, and it is determined whether an output from an output terminal of the functional block is normal.