JPH1126475A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce gate resistance and improve Schottky characteristic in a field effect transistor, fabricated according to a gate-forming process in a lift-off method. SOLUTION: A resist pattern is formed on a semiconductor substrate and a coating glass film is coated on it, and after baking, the resist pattern is removed by lifting-off, and a reverse taper opening pattern is formed. Then, after a Schottky metal film 6, a barrier metal film 7, and a low-resistance metal film 8 are successively formed on the baked coating glass film, a coating glass film 4 is removed by means of a HF aqueous solution to form a gate electrode.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to the formation of an electrode for a field effect transistor.

[0002]

2. Description of the Related Art Conventionally, in a process of forming a gate electrode of a GaAs FET, a vapor deposition lift-off method using a resist opening pattern has been used. For example, a conventional forming process described in JP-A-5-29213 will be described with reference to the drawings.

FIG. 5 is a process chart showing an example of a method for manufacturing a gate electrode in a conventional semiconductor device. First, FIG.
As shown in (a), an operation layer 52 is provided on a semi-insulating substrate 51.
To form Thereafter, a resist film 53 is applied, exposed by UV light or an electron beam, and developed to obtain an opening pattern having an inversely tapered side wall.

Next, as shown in FIG. 5B, the operation layer 52 is etched with a phosphoric acid-based etchant using the resist film 53 as a mask to adjust the operation layer to an appropriate thickness. Next, a Schottky metal film 54 of Al or the like is deposited on the entire surface of the substrate from above the resist film 53. Next, the unnecessary gate metal film 54 on the resist film 53 is removed by a lift-off method of dissolving the resist film 53 in an organic solvent, and a gate electrode 56 as shown in FIG. 5C is obtained.

[0005]

In the above-mentioned conventional method, when the gate electrode is formed by lifting off the A1 gate metal using the resist pattern as a mask, the Schottky interface is contaminated by outgassing from the resist film. There is a problem that characteristics are deteriorated.

In addition, since the opening of the resist pattern is increased due to the rise in the substrate temperature when the metal film is formed, when a plurality of metal films are sequentially laminated, the upper metal film spills from the side surface and directly adheres to the substrate. There is a problem.

Further, when a high melting point metal film is formed, the resist film is burned due to an excessive rise in temperature and cannot be removed at the time of lift-off. Therefore, the kind of metal that can be used for the electrode is limited.

The present invention solves the above-mentioned problems of the prior art and further (a) miniaturizes the gate electrode in order to improve the performance of the gate electrode, that is, to increase the operation speed of the FET. (B) Improving the reliability of the gate electrode, that is, improving the reliability of the FET by using a metal having a high melting point for the gate electrode. (C) Productivity improvement, that is, by using a metal having a high melting point for a gate electrode to enable introduction of a high-temperature process in subsequent steps, thereby increasing the degree of freedom in process selection and improving productivity. Was considered as an issue.

[0009]

Means for Solving the Problems The inventors of the present application have made intensive studies for the purpose of the above-mentioned improvement and have arrived at the present invention. That is, according to the present invention, in order to increase the operation speed of the FET, the gate electrode is miniaturized to reduce the gate cross-sectional area, increase the gate resistance, and degrade the FET characteristics. It is possible to prevent by the laminated structure including. In addition, a metal having a high melting point can be used for the gate electrode, thereby improving the reliability of the FET. Further, the laminated low-resistance metal is prevented from diffusing from the GaAs interface and deteriorating the Schottky characteristics, thereby improving the reliability of the FET.
In addition, by using a metal having a high melting point for the gate electrode, it is possible to introduce a high-temperature process into the subsequent steps, thereby increasing the degree of freedom of process selection and improving productivity.

The present invention includes the following inventions and embodiments.

In the method for manufacturing a semiconductor device,
(1) forming an operation layer on a semi-insulating substrate;
(2) a step of forming a pattern with a photoresist, (3) a step of applying a coating glass with a thickness smaller than that of the photoresist pattern and baking, and (4) removing the photoresist by lift-off and reverse taper. (5) a step of baking the coated glass, (6) a step of forming a plurality of metal films,
(7) a step of removing the coated glass film and all films on the coated glass film by lift-off.

[0012] In the method of manufacturing a semiconductor device according to the above, (3) after applying the coated glass to a thickness smaller than the photoresist pattern and baking,
(3 ′) A method for manufacturing a semiconductor device, characterized by adding a step of etching the applied glass and performing the steps (4) and subsequent steps in a similar manner.

The method for manufacturing a semiconductor device according to the above or the above, wherein the semiconductor device is a field effect transistor.

[0014]

According to the present invention, an opening pattern having a reverse tapered cross-sectional shape can be formed by forming a resist pattern having a forward tapered cross-sectional shape, then applying a coating glass and removing the resist. Since the coated glass film with this opening pattern is used, the photoresist film has already been removed when the gate electrode metal is formed, so there is no outgassing due to decomposition of the organic resin due to temperature rise, and the pattern is not deformed. Does not occur.

Therefore, deterioration of FET characteristics due to contamination of the Schottky interface can be prevented. Further, the upper limit of the temperature at the time of forming the gate electrode metal is increased, and a high melting point metal such as W, MO, and Pt can be used as the gate electrode. As a result, the reliability of the FET is improved. Also,
Since the upper limit of the temperature in the step after the formation of the gout is increased, the degree of freedom of the usable steps is increased, and the productivity is improved.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS In a first embodiment of the present invention, as shown in FIG. 1A, an active layer 2 is formed on a semi-insulating substrate 1 and a positive photoresist film is formed. Apply 3 and
Exposure is performed with UV light and development is performed to form a line-shaped resist pattern. Further, a negative type photoresist film 3 may be used. In this case, an electron beam or the like is used for exposure. Here, the cross-sectional shape of the resist pattern needs to have a forward tapered side wall. The taper angle is 45
When the line width is about 0.2 μm at the bottom,
The thickness of the photoresist film 3 is desirably about 300 nm or more, but is limited by the aspect ratio and the taper angle.

Next, after coating the coated glass film 4 (SOG), baking is performed. The thickness of the coating glass film 4 is set so that the photoresist film can be removed later.
It is necessary that the thickness of the coating glass film 4 be 280 nm or less, for example, when the thickness of the photoresist film 3 is 300 nm.

The baking is performed at a temperature of about 90 ° C. to 180 ° C. to evaporate the solvent in the coated glass film 4. The upper limit of the bake temperature is limited by the heat-resistant temperature represented by the glass transition temperature of the photoresist film 3 or the temperature at which mass loss due to gas release starts.

Next, as shown in FIG. 1B, the upper corner portion of the photoresist film 3 is extremely thin due to the flattening effect of the coating glass film 4, and is immersed in an organic solvent or the like. Thus, only the photoresist film 3 is selectively dissolved from this portion, and the photoresist film 3 and the coated glass film 4 on the photoresist film 3 can be easily lifted off. As a result, an inverted tapered opening pattern on the coated glass film 3 as shown in FIG. 1C is obtained.

Thereafter, the coated glass film 3 is fired at a temperature of about 300 ° C. to 600 ° C. This firing temperature needs to be higher than the substrate temperature at the time of forming a metal film described later.

Next, wet etching is performed with a phosphoric acid-based etchant using the coated glass film 4 as a mask.
A recess 5 having an appropriate depth is formed. The depth of the recess 5 is, for example, 200 nm in thickness of the operating layer 2.
It is about 100 nm. Thereafter, a Schottky metal film 6, a barrier metal film 7, and a low resistance metal film 8 are sequentially deposited.
For the formation of these metal films, a vapor deposition method is used, or
A sputtering method in which the straightness is improved by a collimator or the like is used.

Here, the total thickness of the metal film does not exceed the thickness of the coating glass film 4 so that the metal film deposited on the photoresist film 3 does not come into contact with the metal film deposited in the opening pattern. You need to do that. Also, each metal film is
It must be insoluble in an aqueous HF solution used to remove the glass film. For example, a metal such as MO or W or a silicide thereof is used for the Schottky metal film 6, and Pt is used for the barrier metal film 7. For the low resistance metal film 8, it is preferable to use Λu or the like.

Next, the coated glass film 4 is selectively wet-etched, and the Schottky metal film 6, the barrier metal film 7, and the low-resistance metal film 8 on the coated glass film 4 are removed by lift-off. As shown in (e), a gate electrode 9 is obtained.

Next, a second embodiment of the present invention will be described with reference to FIG.
As shown in (a), an operation layer 32 is provided on a semi-insulating substrate 31.
Is formed, a positive photoresist film 33 is applied, exposed by UV light, and developed to form a line-shaped resist pattern. Further, a negative photoresist film 33 may be used. In this case, an electron beam or the like is used for exposure. Here, the cross-sectional shape of the resist pattern needs to have a forward tapered side wall. The taper angle is preferably 45 ° to 80 °, and when the line width is about 0.2 μm at the bottom, the thickness of the photoresist film 33 is preferably about 300 nm or more, but is limited by the aspect ratio and the taper angle.

Next, after applying the coated glass film 34 (SOG), baking is performed. The thickness of the coating glass film 34 needs to be larger than the thickness of the photoresist film 33. For example, when the thickness of the photoresist film 33 is 300 nm,
The thickness of the coating glass film 34 is preferably set to 320 nm or more. The baking is performed at a temperature of about 90 ° C. to 180 ° C. to volatilize the solvent in the coated glass film 34. The upper limit of the bake temperature is limited by the heat-resistant temperature represented by the glass transition temperature of the photoresist film 33 or the temperature at which mass loss due to gas release starts.

Next, the coated glass film 34 is etched back by a dry etching method, and the coated glass 34 on the photoresist film 33 is removed. The photoresist film 33 is dissolved by immersion in an organic solvent or the like, and the photoresist film 33 is removed. As a result, an inversely tapered opening pattern on the coating glass film 33 as shown in FIG. 3C is obtained. Thereafter, the applied glass film 33 is fired at a temperature of about 300 ° C. to 600 ° C. This firing temperature needs to be higher than the substrate temperature at the time of forming a metal film described later. Next, using the coating glass film 34 as a mask, wet etching is performed with a phosphoric acid-based etchant to form a recess 35 having an appropriate depth. The depth of the recess 35 is, for example, about 100 nm with respect to the thickness of the operation layer 32 of 200 nm. Thereafter, a Schottky metal film 36, a barrier metal film 37, and a low resistance metal film 38 are sequentially deposited. For forming these metal films, a vapor deposition method or a sputtering method in which the straightness is improved by a collimator or the like is used. here,
It is necessary that the total thickness of the metal film does not exceed the thickness of the photoresist film 33 so that the metal film deposited on the coating glass film 34 does not contact the metal film deposited in the opening pattern. . Further, each metal film needs to be insoluble in an HF aqueous solution. For example, a metal such as MO or W or a silicide thereof is used for the Schottky metal film 36, and a Pt or the like is used for the barrier metal film 37. Au or the like is preferably used for the low-resistance metal film 38.

Next, the coated glass film 34 is selectively wet-etched, and the Schottky metal film 36, the barrier metal film 37, and the low-resistance metal film 38 on the coated glass film 34 are removed by lift-off. As shown in (c), a gate electrode 39 is obtained.

[0028]

Embodiments of the present invention will be described in detail with reference to the drawings.

Embodiment 1 In a first embodiment of the present invention, as shown in FIG.
An active layer 2 is formed on a semi-insulating substrate 1 of aAs by an epitaxial growth method or an ion implantation method, a positive photoresist film 3 is applied, and UV light using a light source such as a KrF laser is used. To form a linear resist pattern. Alternatively, a negative photoresist film 3 may be used, in which case an electron beam or the like is used. Here, the cross-sectional shape of the resist pattern needs to have a forward tapered side wall. The taper angle is 45
{80} is good, and the line width is O.D. Desirably, the thickness of the photoresist film 3 is about 300 nm or more, but is limited by the aspect ratio and the taper angle.

Next, as shown in FIG. 1 (b), after coating the coated glass film 4 (SOG), baking is performed. The thickness of the coating glass film 4 is, for example, about 280 nm while the thickness of the photoresist film 3 is about 300 nm. The baking is performed at a temperature of about 90 ° C. to 180 ° C. using an oven or the like.

Next, the photoresist film 3 is dissolved by dipping in MEK (methyl ethyl ketone) or the like, and the coated glass film 4 on the photoresist film 3 is lifted off. As a result, an inversely tapered opening pattern on the coated glass film 4 as shown in FIG. 1C is obtained. afterwards,
The firing is performed at a temperature of about 300 ° C. to 600 ° C.

Next, as shown in FIG. 1D, a recess step 5 is formed by wet etching with a phosphoric acid-based etchant using the coated glass film 3 as a mask. The depth of the recess step 5 is, for example, about 100 nm with respect to the thickness of the operation layer 2 of 200 nm. Thereafter, a Schottky metal film 6, a barrier metal film 7, and a low resistance metal film 8 are sequentially deposited. For forming these metal films, a vapor deposition method or a sputtering method in which the straightness is improved by a collimator or the like is used. The film thickness of the Schottky metal film 6 is 100
nm, the barrier metal film 7 is 50 nm, and the low resistance metal film 8 is 2 nm.
It is about 50 nm. Here, the total thickness of the metal film is set so that the metal film deposited on the resist film 3 does not contact the metal film deposited in the opening pattern.
It is necessary not to exceed the film thickness. Each metal film must be insoluble in an HF-based aqueous solution. For example, MO is used for the Schottky metal film 6, Pt is used for the barrier metal film 7, and Au is used for the low-resistance metal film 8. Is used.

Next, by dissolving the coated glass film 3 with an HF-based aqueous solution and removing the Schottky metal film 6, barrier metal film 7, and low-resistance metal film 8 on the coated glass film 4, FIG. e) and the gate electrode 9 is obtained as shown in FIG.

In this embodiment, a high-temperature process such as alloying of an ohmic electrode can be performed after the above gate electrode forming step.

Embodiment 2 In a second embodiment of the present invention, as shown in FIG.
An active layer 32 is formed on the semi-insulating substrate 31 of aAs by an epitaxial growth method or an ion implantation method, and then a positive photoresist film 33 is applied, and is exposed by UV light using a light source such as a KrF laser, Develop to form a linear resist pattern. Alternatively, a negative photoresist film 33 may be used, in which case an electron beam or the like is used. Here, the cross-sectional shape of the resist pattern is
It is necessary to have a forward tapered side wall. The taper opening angle is preferably 45 ° to 80 °, the line width at the bottom is about 0.2 μm, and the thickness of the photoresist film 33 is preferably about 300 nm or more, but is limited by the aspect ratio and the taper angle.

Next, as shown in FIG. 3 (b), after applying a coating glass film 34 (SOG), baking is performed. The thickness of the coating glass film 34 is, for example, the photoresist film 33.
Is about 320 nm, whereas the film thickness is about 300 nm. Baking is performed at 90 ° C. to 18 using an oven or the like.
This is performed at a temperature of about 0 ° C.

Next, the applied glass film 34 is etched back by a dry etching method, and the applied glass 34 on the photoresist film 33 is removed. Then, the photoresist film 3 is immersed in MEK (methyl ethyl ketone) or the like.
3 is dissolved, and the photoresist film 33 is removed. As a result, an inversely tapered opening pattern on the coating glass film 34 as shown in FIG. 3C is obtained. Then 300
The sintering is performed at a temperature of about 600C to about 600C.

Next, as shown in FIG. 3D, a recess 35 is formed by wet etching with a phosphoric acid-based etchant using the coating glass film 34 as a mask. The depth of the recess 35 is, for example, the thickness 20 of the operation layer 32.
It is about 100 nm with respect to 0 nm. Thereafter, a Schottky metal film 36, a barrier metal film 37, and a low resistance metal film 38 are sequentially deposited. For forming these metal films, a vapor deposition method or a sputtering method in which the straightness is improved by a collimator or the like is used. The film thickness is, for example, about 100 nm for the Schottky metal film 36, about 50 nm for the barrier metal film 37, and about 250 nm for the low-resistance metal film 38 in the flat portions on the coating glass film 34, respectively. Here, it is necessary that the total thickness of the metal film does not exceed the thickness of the coating glass film 34 so that the metal film deposited on the resist film 33 does not contact the metal film deposited in the opening pattern. There is. Further, each metal film needs to be insoluble in an HF-based aqueous solution. For example, MO is used for the Schottky metal film 36, Pt is used for the barrier metal film 37, and Au is used for the low-resistance metal film 38. Is used.

Next, the coated glass film 34 is dissolved by an HF-based aqueous solution, and the Schottky metal film 36, the barrier metal film 37, and the low resistance metal film 38 on the coated glass film 34 are removed. e) and as shown in FIG.
A gate electrode 39 is obtained.

In this embodiment, a high-temperature process such as alloying of an ohmic electrode can be performed after the above gate electrode forming step.

[0041]

The first effect is that the FET Schottky characteristics are improved. The reason is that since the base of the step of forming the gate metal is a coated glass film, no organic gas is generated due to thermal decomposition of the resin or volatilization of the solvent, and the Schottky interface is not contaminated.

The second effect is an improvement in the reliability of the FET. The reason is that, since a Schottky metal film having high heat resistance can be used, long-term stability under high-temperature conditions and the like is improved. The second reason is that the applied glass film is not deformed by heat (L in FIG. 1).
_S0G1 = L _S0G2 ), even when a structure in which a gate Schottky metal film, a barrier metal film, and a low-resistance metal film are stacked is used, the low-resistance metal film may directly adhere to the GaAs substrate and contaminate the Schottky interface. Because there is no.

The third effect is an improvement in productivity. This is because a gate metal film having high heat resistance can be used, so that there is no limitation that a step of increasing the temperature after forming a conventional gate electrode cannot be used.

[Brief description of the drawings]

FIGS. 1A to 1E are cross-sectional views of main steps of a first embodiment of the present invention.

FIG. 2 is a plan view of the first embodiment of the present invention.

3 (a) to 3 (e) are cross-sectional views showing main steps of a second embodiment of the present invention.

FIG. 4 is a plan view of a second embodiment of the present invention.

FIGS. 5A to 5C are cross-sectional views of main processes of a conventional example.

FIG. 6 is a plan view of a conventional example.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 semi-insulating substrate 2 working layer 3 photoresist film 4 coated glass film 5 recess step 6 Schottky metal film 7 barrier metal film 8 low resistance metal film 9 gate electrode 31 semi-insulating substrate 32 working layer 33 photoresist film 34 coating Glass film 35 Recess step 36 Schottky metal film 37 Barrier metal film 38 Low resistance metal film 39 Gate electrode 51 Semi-insulating substrate 52 Operating layer 53 Photoresist film 54 Schottky metal film 55 Recess step 56 Gate electrode

Claims (3)

[Claims] 1. A method of manufacturing a semiconductor device, comprising:
A step of forming an operation layer on a semi-insulating substrate, (2) a step of forming a pattern by using a photoresist, and (3) a step of applying a coating glass having a thickness smaller than that of the photoresist pattern and baking; (4) a step of removing the photoresist by lift-off to obtain a reverse tapered opening pattern; and (5) a step of firing the coated glass.
(6) a method of manufacturing a semiconductor device, comprising: a step of forming a plurality of metal films; and (7) a step of removing the coated glass film and all the films on the coated glass film by lift-off. Method. 2. The method of manufacturing a semiconductor device according to claim 1, further comprising: (3) applying the applied glass with a thickness smaller than that of the photoresist pattern and baking; A method of manufacturing a semiconductor device, characterized by adding a step of etching a semiconductor device, and performing the steps (4) and subsequent steps similarly. 3. The method according to claim 1, wherein the semiconductor device is a field effect transistor.