JPH11214556A - High frequency input and output terminal, and package for high frequency semiconductor element - Google Patents

High frequency input and output terminal, and package for high frequency semiconductor element

Info

Publication number
JPH11214556A
JPH11214556A JP1277698A JP1277698A JPH11214556A JP H11214556 A JPH11214556 A JP H11214556A JP 1277698 A JP1277698 A JP 1277698A JP 1277698 A JP1277698 A JP 1277698A JP H11214556 A JPH11214556 A JP H11214556A
Authority
JP
Japan
Prior art keywords
dielectric substrate
dielectric
output terminal
frequency
line conductors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1277698A
Other languages
Japanese (ja)
Other versions
JP3493301B2 (en
Inventor
Shigeo Morioka
滋生 森岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP01277698A priority Critical patent/JP3493301B2/en
Publication of JPH11214556A publication Critical patent/JPH11214556A/en
Application granted granted Critical
Publication of JP3493301B2 publication Critical patent/JP3493301B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To prevent reflection of a high frequency signal in a line conductor or the deterioration of high frequency characteristics due to electric interference between line conductors, even when there is no space for providing the same face ground conductor layer or the like due to a narrow interval between the line conductors. SOLUTION: In a high frequency input and output terminal, plural line conductors 14 are formed almost in parallel on the upper face of a dielectric substrate 12 on whose lower face a ground conductor layer 13 is formed, and a band-shaped dielectric wall member 15 holding one part of each line conductor 14 in a direction almost orthogonally crossing each line conductor 14 is joined, and a groove 16 whose width is 0.2 mm or more and whose depth is 1/2 of the thickness of the dielectric substrate 12 or more is provided on the dielectric substrate 12 between the line conductors 14 on at least one side of the dielectric wall member 15. Thus, an air groove is interposed in the part of the groove 16 so that, capacitance between the line conductors 14 can be decreased, and any electric interference having an adverse influence on high frequency characteristics can be reduced.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明はマイクロ波帯やミリ
波帯等の高周波用半導体素子収納用パッケージの高周波
用入出力部に使用される高周波用入出力端子ならびにそ
の高周波用入出力端子を用いた高周波用半導体素子収納
用パッケージに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high frequency input / output terminal used for a high frequency input / output section of a package for accommodating a high frequency semiconductor element such as a microwave band or a millimeter wave band, and a high frequency input / output terminal. And a package for storing a high-frequency semiconductor element.

【0002】[0002]

【従来の技術】マイクロ波帯やミリ波帯等の高周波信号
を用いる高周波用半導体素子等を気密封止して収容する
高周波用半導体素子収納用パッケージの高周波信号の入
出力端子部においては、高周波伝送線路の線路導体とし
て誘電体基板上に形成されたマイクロストリップ線路と
ハーメチックシール部のストリップ線路を接合する構造
が一般的に用いられており、必要に応じて複数の線路導
体がほぼ平行に配設されている。
2. Description of the Related Art A high-frequency signal input / output terminal of a high-frequency semiconductor element housing package for hermetically sealing and housing a high-frequency semiconductor element using a high-frequency signal such as a microwave band or a millimeter wave band has a high frequency. As a line conductor of a transmission line, a structure in which a microstrip line formed on a dielectric substrate and a strip line of a hermetic seal portion are generally used, and a plurality of line conductors are arranged almost in parallel as necessary. Has been established.

【0003】また、このような入出力端子部は、高周波
用半導体素子収納用パッケージの信号入出力部としてパ
ッケージに作り込まれるほかに、高周波用入出力端子と
して作製されてパッケージに組み込まれて使用されてい
る。
[0003] Such an input / output terminal portion is used as a signal input / output portion of a package for housing a high-frequency semiconductor element, and is also produced as a high-frequency input / output terminal and incorporated in a package. Have been.

【0004】上記のような従来の高周波用入出力端子と
しては、例えば図4に示すような構成のものがあった。
図4(a)は従来の高周波用入出力端子の例を示す斜視
図、同図(b)はその一部を透視した平面図、同図
(c)は(b)のA−A’線断面図である。図4に示す
高周波用入出力端子1では、下面に接地導体層3が形成
されたアルミナセラミック等から成る誘電体基板2の上
面にタングステンやモリブデン等から成るメタライズ金
属層により複数の線路導体4が高周波信号の伝送方向に
互いにほぼ平行に形成され、その上にハーメチックシー
ル部を構成する誘電体壁部材5が各線路導体4の一部を
挟み込むように各線路導体4に対しほぼ直交する方向で
接合されている。なお、誘電体壁部材5の上面には必要
に応じて上面接地導体層(図示せず)が形成される。
As a conventional high frequency input / output terminal as described above, for example, there is one having a configuration as shown in FIG.
FIG. 4A is a perspective view showing an example of a conventional high frequency input / output terminal, FIG. 4B is a plan view showing a part of the terminal, and FIG. 4C is a line AA ′ in FIG. It is sectional drawing. In the high frequency input / output terminal 1 shown in FIG. 4, a plurality of line conductors 4 are formed on the upper surface of a dielectric substrate 2 made of alumina ceramic or the like having a ground conductor layer 3 formed on the lower surface thereof by a metallized metal layer made of tungsten or molybdenum. The dielectric wall members 5 are formed substantially parallel to each other in the transmission direction of the high-frequency signal, and the dielectric wall members 5 constituting the hermetic seal portion are arranged in a direction substantially orthogonal to each line conductor 4 so as to sandwich a part of each line conductor 4. Are joined. Note that an upper surface ground conductor layer (not shown) is formed on the upper surface of the dielectric wall member 5 as necessary.

【0005】そして、高周波用半導体素子収納用パッケ
ージを構成する金属基体および容器壁を形成する金属枠
体を切り欠いて高周波用入出力端子の取付部を形成し、
この取付部にこのタイプの高周波用入出力端子1を嵌着
して使用することにより、いわゆるメタルウォールタイ
プの構成の高周波用半導体素子収納用パッケージとな
る。
[0005] Then, a metal base constituting the package for housing the high-frequency semiconductor element and a metal frame forming the container wall are cut out to form a mounting portion for the high-frequency input / output terminal.
By attaching and using this type of high frequency input / output terminal 1 to this mounting portion, a so-called metal wall type high frequency semiconductor element housing package is obtained.

【0006】また、高周波用半導体素子収納用パッケー
ジを構成する誘電体基板および容器壁を形成する誘電体
枠体を切り欠いて高周波用入出力端子の取付部を形成
し、この取付部に高周波用入出力端子1を嵌着して使用
した構成のパッケージや、あるいは、高周波用入出力端
子1と同様の構成の入出力端子部を作り込んだパッケー
ジとして、下面に接地導体層が形成され、上面に高周波
用半導体素子を搭載するための搭載部を有する誘電体基
板と、この誘電体基板上の上面に搭載部近傍から誘電体
基板の外周近傍にかけて形成された複数の線路導体と、
誘電体基板上に搭載部を囲むとともに線路導体の一部を
挟んで接合された誘電体枠体とから成り、誘電体基板と
誘電体壁部材とで線路導体の一部を挟んだ部分が高周波
用入出力端子1と同様の構成をとるものもある。これら
の場合には、いわゆるセラミックウォールタイプの高周
波用半導体素子収納用パッケージとなる。
Further, a dielectric substrate constituting a package for accommodating a high frequency semiconductor element and a dielectric frame forming a container wall are cut out to form a mounting portion for a high frequency input / output terminal. A ground conductor layer is formed on the lower surface, and a package having an input / output terminal portion having a configuration similar to that of the high frequency input / output terminal 1 is formed on the lower surface of the package. A dielectric substrate having a mounting portion for mounting a high-frequency semiconductor element thereon, and a plurality of line conductors formed on the upper surface of the dielectric substrate from near the mounting portion to near the outer periphery of the dielectric substrate,
A dielectric frame that surrounds the mounting portion on the dielectric substrate and is joined with a part of the line conductor sandwiched between the dielectric substrate and the dielectric substrate and the dielectric wall member. Some have the same configuration as the input / output terminal 1. In these cases, a so-called ceramic wall type package for housing a high-frequency semiconductor element is obtained.

【0007】さらに、誘電体基板と金属枠体とを用いて
同様に高周波用入出力端子1を嵌着した構成のパッケー
ジ等もある。
Further, there is a package having a structure in which a high frequency input / output terminal 1 is similarly fitted using a dielectric substrate and a metal frame.

【0008】これら従来の高周波用入出力端子1または
入出力端子部においては、一般に、高周波信号を伝搬す
るために線路導体4の幅や誘電体基板2の厚み等を調整
してインピーダンス整合をとった設計を行なっており、
これにより、ハーメチックシール部、すなわち誘電体基
板2と誘電体壁部材5との接合部における高用波信号の
反射等を抑えて良好な高周波特性を得るようにされてい
る。
In these conventional high frequency input / output terminals 1 or input / output terminals, impedance matching is generally achieved by adjusting the width of the line conductor 4 and the thickness of the dielectric substrate 2 in order to propagate a high frequency signal. Design.
This suppresses reflection of high-frequency signals at the hermetic seal portion, that is, the joint portion between the dielectric substrate 2 and the dielectric wall member 5, and obtains good high-frequency characteristics.

【0009】また、このような構成の高周波用入出力端
子1ならびに高周波用半導体素子収納用パッケージにお
いては、電気特性上考慮すべき点として、高周波信号の
反射特性だけでなく、クロストークやアイソレーション
と呼ばれる特性として線路導体4間における高周波信号
の電気的干渉による高周波特性の低下が問題視されるこ
とから、そのような信号の干渉を防ぐために一般に以下
のような対策がとられている。
In the high-frequency input / output terminal 1 and the high-frequency semiconductor element housing package having the above-described structure, it is necessary to consider not only the reflection characteristics of the high-frequency signal but also the crosstalk and the isolation in terms of the electrical characteristics. As a characteristic referred to as a decrease in high-frequency characteristics due to electrical interference of a high-frequency signal between the line conductors 4, the following countermeasures are generally taken to prevent such signal interference.

【0010】1)各線路導体4間の間隔(配設ピッチ)
を極力広くする。 2)図5(a)に図4(b)と同様の平面図で示すよう
に、各線路導体4間に同一面接地導体層6を設ける。 3)2)の構造において同一面接地導体層6の接地性を
向上させるために、図5(a)および図5(b)(図5
(a)のA−A’断面図)に示すように、誘電体基板2
の内部に導体金属を充填したビアホール等の貫通導体7
を設け、あるいは誘電体基板2の側面に側面メタライズ
導体層(図示せず)を設けて、同一面接地導体層6を接
地導体層3と電気的に接続する。
1) Spacing between the line conductors 4 (arrangement pitch)
As wide as possible. 2) As shown in FIG. 5 (a) in a plan view similar to FIG. 4 (b), the same-plane ground conductor layer 6 is provided between the line conductors 4. 3) In the structure of 2), in order to improve the grounding property of the coplanar ground conductor layer 6, FIGS. 5A and 5B (FIG.
As shown in (A) AA ′ sectional view), the dielectric substrate 2
Through conductors 7 such as via holes filled with conductive metal inside
Or a side metallized conductor layer (not shown) is provided on the side surface of the dielectric substrate 2 to electrically connect the ground conductor layer 6 with the ground conductor layer 3.

【0011】また、各線路導体4あるいは同一面接地導
体層6には、外部電気回路や高周波用半導体素子との接
続のために信号取出用あるいは電源取出用のリード端子
が取り付けられることがある。このリード端子(図示せ
ず)は、例えばAg−Cuろう材等で各線路導体4ある
いは同一面接地導体層6に接続される。
A signal or power supply lead terminal may be attached to each line conductor 4 or the same plane ground conductor layer 6 for connection to an external electric circuit or a high-frequency semiconductor element. The lead terminals (not shown) are connected to the respective line conductors 4 or the same-surface ground conductor layer 6 with, for example, an Ag-Cu brazing material.

【0012】[0012]

【発明が解決しようとする課題】しかしながら、上記の
ような構成の高周波用入出力端子および高周波用半導体
素子収納用パッケージの入出力端子部においては、高周
波用半導体素子の電極パッド配置が高密度化されるに伴
い、あるいは種々の電極パッド配置に対応させるため
に、各線路導体4間の配設ピッチが狭くなってしまう場
合があり、この場合には以下のような問題点があった。
However, in the high frequency input / output terminal and the input / output terminal portion of the high frequency semiconductor element housing package having the above-described structure, the arrangement of the electrode pads of the high frequency semiconductor element is increased. As a result, or in order to cope with various electrode pad arrangements, the arrangement pitch between the line conductors 4 may be narrowed. In this case, there are the following problems.

【0013】a)各線路導体4間に同一面接地導体層6
を設ける余裕がなくなり、無理に設けた場合には線路導
体4と同一面接地導体層6とが短絡するおそれがある。 b)同一面接地導体層6を設けることができても貫通導
体7等を設ける余裕がなくなり、無理に貫通導体7等を
設けた場合には貫通導体7等と線路導体4とが短絡する
おそれがある。 c)同一面接地導体層6および貫通導体7等を設けるこ
とができても、これらと線路導体4とのギャップが十分
に取れないため、インピーダンスが低くなる等インピー
ダンスの不整合が発生してしまい、その結果、高周波信
号の反射が発生して高周波特性が低下してしまう。 d)c)の構造においては、インピーダンスを整合させ
るために線路導体4の幅を狭くする必要があるが、幅を
狭くすると線路導体4にリード端子を取り付ける仕様の
場合にはリード端子の接合強度が低下してしまうことと
なる。
A) Ground conductor layer 6 on the same plane between each line conductor 4
When the line conductor 4 is forcibly provided, the line conductor 4 and the ground conductor layer 6 on the same plane may be short-circuited. b) Even if the ground conductor layer 6 on the same plane can be provided, there is no room for providing the through conductor 7 and the like, and when the through conductor 7 and the like are forcibly provided, the through conductor 7 and the like and the line conductor 4 may be short-circuited. There is. c) Even if the same-surface ground conductor layer 6 and the through conductor 7 can be provided, a gap between these and the line conductor 4 cannot be sufficiently obtained, and impedance mismatch such as lower impedance occurs. As a result, reflection of a high-frequency signal occurs, and high-frequency characteristics are degraded. In the structures d) and c), it is necessary to reduce the width of the line conductor 4 in order to match the impedance. However, if the width is reduced, the joint strength of the lead terminal is required in the case of attaching the lead terminal to the line conductor 4. Will be reduced.

【0014】本発明は上記事情に鑑みて案出されたもの
であり、その目的は、線路導体間の間隔が狭くなって同
一面接地導体層等を設ける余裕がない場合でも、線路導
体間の電気的干渉による高周波特性の低下を低減でき、
しかもリード端子の取付等に対する製造上の不具合もな
い、高周波特性の良好な高周波用入出力端子ならびに高
周波用半導体素子収納用パッケージを提供することにあ
る。
The present invention has been devised in view of the above circumstances, and has as its object to reduce the distance between line conductors even when the distance between the line conductors becomes narrow and there is no room for providing a ground conductor layer on the same plane. The reduction of high frequency characteristics due to electrical interference can be reduced,
In addition, it is an object of the present invention to provide a high frequency input / output terminal and a high frequency semiconductor element housing package having good high frequency characteristics without producing defects in mounting lead terminals and the like.

【0015】[0015]

【課題を解決するための手段】本発明の高周波用入出力
端子は、下面に接地導体層が形成された誘電体基板の上
面に複数の線路導体を互いに略平行に形成するとともに
これら各線路導体に対し略直交する方向で各々の線路導
体の一部を挟み込む帯状の誘電体壁部材を接合して成
り、かつ、この誘電体壁部材の少なくとも片側で、前記
線路導体間の前記誘電体基板に幅が0.2 mm以上、深さ
が前記誘電体基板の厚みの2分の1以上の溝を設けたこ
とを特徴とするものである。
According to the high frequency input / output terminal of the present invention, a plurality of line conductors are formed substantially in parallel with each other on an upper surface of a dielectric substrate having a ground conductor layer formed on a lower surface thereof. A band-shaped dielectric wall member sandwiching a part of each line conductor in a direction substantially orthogonal to the above is joined, and on at least one side of the dielectric wall member, the dielectric substrate between the line conductors is formed. A groove having a width of at least 0.2 mm and a depth of at least half the thickness of the dielectric substrate is provided.

【0016】また、本発明の高周波用入出力端子は、上
記構成において、前記溝が前記誘電体基板を貫通してい
ることを特徴とするものである。
The high frequency input / output terminal according to the present invention is characterized in that, in the above structure, the groove penetrates the dielectric substrate.

【0017】本発明の第1の高周波用半導体素子収納用
パッケージは、上面に高周波用半導体素子を搭載するた
めの搭載部を有する基板上に前記搭載部を囲むように枠
体が接合されるとともに、この枠体を切り欠いてその底
面を導電性とした入出力端子取付部が形成され、この入
出力端子取付部に上記各構成の高周波用入出力端子が嵌
着されて成ることを特徴とするものである。
In the first package for storing a high-frequency semiconductor element according to the present invention, a frame is joined to a substrate having a mounting portion for mounting the high-frequency semiconductor element on an upper surface so as to surround the mounting portion. An input / output terminal mounting portion is formed by cutting out the frame body and the bottom surface thereof is made conductive, and the high-frequency input / output terminals of the above-described respective configurations are fitted to the input / output terminal mounting portion. Is what you do.

【0018】また、本発明の第2の高周波用半導体素子
収納用パッケージは、下面に接地導体層が形成された誘
電体基板の上面に高周波用半導体素子を搭載するための
搭載部とこの搭載部近傍から誘電体基板の外周近傍にか
けて互いに略平行に配設された複数の線路導体とを形成
するとともに、前記誘電体基板上に前記搭載部を囲むと
ともに前記線路導体の各々の一部を挟み込む誘電体枠体
を接合して成り、この誘電体枠体の少なくとも片側で、
前記線路導体間の前記誘電体基板に幅が0.2 mm以上、
深さが前記誘電体基板の厚みの2分の1以上の溝を設け
たことを特徴とするものである。
A second package for accommodating a high-frequency semiconductor device according to the present invention comprises a mounting portion for mounting the high-frequency semiconductor device on an upper surface of a dielectric substrate having a ground conductor layer formed on a lower surface, and the mounting portion. A plurality of line conductors disposed substantially parallel to each other from the vicinity to the vicinity of the outer periphery of the dielectric substrate are formed, and the dielectric which surrounds the mounting portion on the dielectric substrate and partially sandwiches each of the line conductors is formed. It consists of joining the body frame, at least one side of this dielectric frame,
A width of 0.2 mm or more on the dielectric substrate between the line conductors,
A groove having a depth of at least half the thickness of the dielectric substrate is provided.

【0019】さらに、本発明の第2の高周波用半導体素
子収納用パッケージは、上記構成において、前記溝が前
記誘電体基板を貫通していることを特徴とするものであ
る。
Furthermore, a second package for housing a high-frequency semiconductor element according to the present invention is characterized in that, in the above-described configuration, the groove penetrates the dielectric substrate.

【0020】[0020]

【発明の実施の形態】以下、本発明を図面に基づき説明
する。図1は本発明の高周波用入出力端子の実施の形態
の一例を示す図4と同様の図であり、同図(a)は斜視
図、(b)はその一部を透視した平面図、同図(c)は
(b)のA−A’線断面図である。図1において、11は
高周波用入出力端子、12は誘電体基板、15は誘電体基板
12の上面に接合された帯状の誘電体壁部材であり、これ
らは高周波用半導体素子収納用パッケージの信号入出力
部においてハーメチックシール部(気密封止部)として
も利用される。誘電体基板12の下面には接地導体層13
が、上面には高周波信号の伝送方向に互いにほぼ平行に
複数の線路導体14が形成されており、誘電体壁部材15は
線路導体14に対しほぼ直交する方向で各々の線路導体14
の一部を挟み込むように接合されている。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. FIG. 1 is a view similar to FIG. 4 showing an example of an embodiment of a high-frequency input / output terminal of the present invention. FIG. 1 (a) is a perspective view, FIG. FIG. 3C is a sectional view taken along line AA ′ of FIG. In FIG. 1, 11 is a high frequency input / output terminal, 12 is a dielectric substrate, and 15 is a dielectric substrate.
These are band-shaped dielectric wall members joined to the upper surface of 12, and are also used as a hermetic seal portion (hermetic sealing portion) in a signal input / output portion of a high-frequency semiconductor element housing package. A ground conductor layer 13 is provided on the lower surface of the dielectric substrate 12.
However, on the upper surface, a plurality of line conductors 14 are formed substantially parallel to each other in the transmission direction of the high-frequency signal, and the dielectric wall member 15 is arranged in a direction substantially orthogonal to the line conductors 14.
Are joined so as to sandwich a part of them.

【0021】なお、この例では、図1(b)に示すよう
に、線路導体14の線幅を誘電体基板12の上面で露出して
いる部位に対して誘電体基板12と誘電体壁部材15とに挟
まれた部位で狭くしており、これによりハーメチックシ
ール部とその前後における線路導体14の特性インピーダ
ンスの整合をとるようにしている。
In this example, as shown in FIG. 1B, the dielectric substrate 12 and the dielectric wall member are arranged such that the line width of the line conductor 14 is exposed on the upper surface of the dielectric substrate 12. The gap between the hermetic seal portion and the line conductor 14 before and after the hermetic seal portion is matched.

【0022】そして、誘電体壁部材15の少なくとも片
側、すなわち誘電体壁部材15を境にして少なくとも片側
には、線路導体14間の誘電体基板12に、幅が0.2 mm以
上、深さが誘電体基板12の厚みの2分の1以上の溝16が
設けられており、これら溝16により、各線路導体14間に
は空気層の溝が介在することとなっている。なお、本例
では溝16を誘電体壁部材15の両側に設けているが、これ
ら溝16は高周波用入出力端子11の仕様に応じて少なくと
も片側、好適には少なくともパッケージの外側に位置す
る側に設ける。また、溝16の幅は0.2 mm以上で線路導
体14間の間隔未満の大きさに設定される。
On at least one side of the dielectric wall member 15, that is, at least one side of the dielectric wall member 15, the dielectric substrate 12 between the line conductors 14 has a width of 0.2 mm or more and a depth of Grooves 16 having a thickness equal to or more than half of the thickness of the body substrate 12 are provided. With these grooves 16, grooves of an air layer are interposed between the line conductors 14. In this example, the grooves 16 are provided on both sides of the dielectric wall member 15, but these grooves 16 are provided on at least one side, preferably at least on the side located outside the package according to the specification of the high frequency input / output terminal 11. To be provided. The width of the groove 16 is set to be 0.2 mm or more and smaller than the interval between the line conductors 14.

【0023】このような高周波用入出力端子11および同
様の構成の高周波用半導体素子収納用パッケージの入出
力部においては、一般に、複数の線路導体14間の高周波
特性における電気的干渉は、これら線路導体14間に介在
する誘電体、ここでは誘電体基板12の誘電率に大きく起
因するものであり、誘電率が高いほど線路導体14間の容
量値が大きくなって電気的干渉が大きくなる。
In the input / output portion of the high-frequency input / output terminal 11 and the high-frequency semiconductor element housing package having the same configuration, generally, electrical interference in the high-frequency characteristics between the plurality of line conductors 14 This is largely caused by the dielectric constant interposed between the conductors 14, here, the dielectric constant of the dielectric substrate 12, and the higher the dielectric constant, the greater the capacitance value between the line conductors 14 and the greater the electrical interference.

【0024】本発明の高周波用入出力端子11によれば、
線路導体14間の誘電体基板12に溝16を設けたことからこ
の部分に空気の溝が介在することとなり、誘電体基板12
の誘電率、例えばアルミナであれば比誘電率が8.8 〜8.
9 であるのに対し、溝16として介在する空気の比誘電率
は1.0 は小さいため、線路導体14間の容量値は低くな
り、高周波特性に悪影響を与える電気的干渉が低減され
る。
According to the high frequency input / output terminal 11 of the present invention,
Since the groove 16 is provided in the dielectric substrate 12 between the line conductors 14, an air groove is interposed in this portion, and the dielectric substrate 12
The relative permittivity of 8.8 to 8.
On the other hand, since the relative dielectric constant of air interposed as the groove 16 is 1.0, the capacitance value between the line conductors 14 is low, and electrical interference that adversely affects high-frequency characteristics is reduced.

【0025】また、線路導体14の近傍に溝16、すなわち
比誘電率の小さい空気の層があるため、線路導体14周り
の実効誘電率が低くなる。このため、線路導体14の幅を
変えてインピーダンス整合を行なう場合に従来の高周波
用入出力端子と比較して線路導体14の幅を広くすること
ができ、線路導体14にリード端子を取り付ける仕様の場
合にリード端子の接合面積を広くすることができて十分
な接合強度を確保することができるものとなる。
Since the groove 16, that is, a layer of air having a small relative dielectric constant, is present near the line conductor 14, the effective dielectric constant around the line conductor 14 is reduced. Therefore, when impedance matching is performed by changing the width of the line conductor 14, the width of the line conductor 14 can be made wider than that of a conventional high frequency input / output terminal. In this case, the bonding area of the lead terminals can be increased, and sufficient bonding strength can be secured.

【0026】このような構成の高周波用入出力端子11に
おいて、溝16の幅は、0.2 mm未満となるとこの溝16に
よる作用効果が得られなくなり線路導体14間の電気的結
合が大きくなって電気的干渉が大きくなってしまう傾向
があり、また誘電体基板12を製作するに当たって、誘電
体基板12に直接に溝16を加工することが困難となった
り、あるいは下層となるシート状の誘電体層12aの上に
溝16となる切欠き部を形成した上層となる誘電体層12b
を積層するシート積層法を採用する場合に、誘電体層12
bに切欠き部を加工して焼成後に所望の溝16を得ること
が困難となって、製作が困難となる。従って、本発明の
高周波用入出力端子11における溝16の幅は、0.2 mm以
上とすることが必要である。
In the high frequency input / output terminal 11 having such a configuration, if the width of the groove 16 is less than 0.2 mm, the function and effect of the groove 16 cannot be obtained, and the electrical coupling between the line conductors 14 increases, and When the dielectric substrate 12 is manufactured, it is difficult to directly form the groove 16 in the dielectric substrate 12, or a sheet-like dielectric layer serving as a lower layer becomes difficult. A dielectric layer 12b as an upper layer in which a notch serving as a groove 16 is formed on 12a.
When the sheet laminating method of laminating the
It becomes difficult to obtain a desired groove 16 after processing the notch in b and firing, which makes production difficult. Therefore, the width of the groove 16 in the high frequency input / output terminal 11 of the present invention needs to be 0.2 mm or more.

【0027】また、溝16の深さは、誘電体基板12の厚み
の2分の1未満の浅いものとなるとやはりこの溝16によ
る作用効果が十分に得られなくなり線路導体14間の電気
的結合が大きくなって電気的干渉が大きくなってしまう
傾向がある。従って、本発明の高周波用入出力端子11に
おける溝16の深さは、誘電体基板12の厚みの2分の1以
上とすることが必要である。なお、後述するように、溝
16は誘電体基板12の厚みと同じ深さすなわち誘電体基板
12を貫通するものとし、誘電体基板12の線路導体14間に
形成した切欠き部としてもよい。
If the depth of the groove 16 becomes shallow, less than half the thickness of the dielectric substrate 12, the effect of the groove 16 cannot be obtained sufficiently, and the electrical coupling between the line conductors 14 cannot be obtained. And electrical interference tends to increase. Accordingly, it is necessary that the depth of the groove 16 in the high frequency input / output terminal 11 of the present invention is not less than half the thickness of the dielectric substrate 12. In addition, as described later, the groove
16 is the same depth as the thickness of the dielectric substrate 12, that is, the dielectric substrate
12 may be formed as a notch formed between the line conductors 14 of the dielectric substrate 12.

【0028】次に、図2(a)〜(c)に本発明の高周
波用入出力端子の実施の形態の他の例をそれぞれ図1
(a)〜(c)と同様の斜視図、平面図およびA−A’
断面図で示す。図2において、21は高周波用入出力端
子、22は誘電体基板、25は誘電体基板22の上面に接合さ
れた帯状の誘電体壁部材である。誘電体基板22の下面に
は接地導体層23が、上面には高周波信号の伝送方向に互
いにほぼ平行に複数の線路導体24が形成されており、誘
電体壁部材25は線路導体24に対しほぼ直交する方向で各
々の線路導体24の一部を挟み込むように接合されてい
る。
FIGS. 2A to 2C show other examples of the high-frequency input / output terminal according to the present invention, respectively.
(A) to (c) are the same perspective view, plan view and AA ′
Shown in cross section. In FIG. 2, 21 is a high frequency input / output terminal, 22 is a dielectric substrate, and 25 is a strip-shaped dielectric wall member joined to the upper surface of the dielectric substrate 22. A ground conductor layer 23 is formed on the lower surface of the dielectric substrate 22, and a plurality of line conductors 24 are formed on the upper surface almost in parallel to the transmission direction of the high-frequency signal. The line conductors 24 are joined so as to sandwich a part of each line conductor 24 in a direction orthogonal to the line conductors.

【0029】そして、誘電体壁部材25の少なくとも片
側、すなわち誘電体壁部材25を境にして少なくとも片側
には、線路導体24間の誘電体基板22に、幅が0.2 mm以
上、深さが誘電体基板22の厚みの2分の1以上の溝26が
設けられており、この例では溝26が誘電体基板22を貫通
して、切欠き部を形成している。このように溝26を誘電
体基板22を貫通する切欠き部とした場合には、各線路導
体24間の誘電体基板22が空気層により完全に分離される
こととなり、この溝26による作用効果がより好適に奏さ
れるものとなる。
On at least one side of the dielectric wall member 25, that is, at least one side of the dielectric wall member 25, the width of the dielectric substrate 22 between the line conductors 24 is 0.2 mm or more and the depth is A groove 26 that is at least half the thickness of the body substrate 22 is provided. In this example, the groove 26 penetrates through the dielectric substrate 22 to form a notch. When the groove 26 is formed as a cutout penetrating the dielectric substrate 22 as described above, the dielectric substrate 22 between the line conductors 24 is completely separated by the air layer, and the effect of the groove 26 is obtained. Is more suitably performed.

【0030】なお、本例も溝26を誘電体壁部材25の両側
に設けているが、これら溝26も高周波用入出力端子21の
仕様に応じて少なくとも片側、好適には少なくともパッ
ケージの外側に位置する側に設ければよい。
In this embodiment, the grooves 26 are also provided on both sides of the dielectric wall member 25, but these grooves 26 are also provided on at least one side, preferably at least on the outside of the package according to the specifications of the high frequency input / output terminal 21. It may be provided on the side where it is located.

【0031】また、本発明の高周波用入出力端子におい
ては、従来の高周波用入出力端子と同様に線路導体間に
同一面接地導体層等を設け、さらに同一面接地導体層と
接地導体層等とを接続する貫通導体または側面メタライ
ズ導体層を設けてもよい。その一例を図3に示す。
In the input / output terminal for high frequency of the present invention, a ground conductor layer or the like on the same plane is provided between the line conductors as in the input / output terminal for high frequency of the prior art. May be provided with a through conductor or a side metallized conductor layer. An example is shown in FIG.

【0032】図3(a)および(b)は本発明の高周波
用入出力端子の実施の形態の他の例を示す、それぞれ図
2(b)と同様の平面図および(a)のB−B’断面図
である。図3において、31は高周波用入出力端子、32は
誘電体基板、33は接地導体層、34は線路導体、35は誘電
体壁部材、36は線路導体34間の誘電体基板32に設けた溝
である。なお、溝36としては誘電体基板32を貫通してい
る例を示している。
FIGS. 3A and 3B show another embodiment of the high frequency input / output terminal according to the present invention. FIG. 3B is a plan view similar to FIG. 2B and FIG. It is B 'sectional drawing. In FIG. 3, 31 is a high frequency input / output terminal, 32 is a dielectric substrate, 33 is a ground conductor layer, 34 is a line conductor, 35 is a dielectric wall member, and 36 is provided on a dielectric substrate 32 between the line conductors 34. It is a groove. Here, an example is shown in which the groove 36 penetrates the dielectric substrate 32.

【0033】そして、37は誘電体基板32の上面に線路導
体34の間に配設された同一面接地導体層であり、38は誘
電体基板32を貫通して形成された、同一面接地導体層37
と接地導体層33とを電気的に接続するビアホール等の貫
通導体である。さらに、39は誘電体壁部材35の上面に形
成された上面接地導体層であり、貫通導体38により同一
面接地導体層37および接地導体層33と電気的に接続され
ている。なお、本発明の高周波用入出力端子31では、誘
電体壁部材35の少なくとも片側、すなわち誘電体壁部材
35を境にして少なくとも片側における線路導体34間の誘
電体基板32には溝36が形成されているため、同一面接地
導体層37はこの溝36が形成されている部分には形成され
ず、代わりに空気層が存在することとなる。
Reference numeral 37 denotes a coplanar ground conductor layer disposed between the line conductors 34 on the upper surface of the dielectric substrate 32, and 38 denotes a coplanar ground conductor formed through the dielectric substrate 32. Tier 37
And a through conductor such as a via hole for electrically connecting the ground conductor layer 33 to the ground conductor layer 33. Further, reference numeral 39 denotes an upper surface ground conductor layer formed on the upper surface of the dielectric wall member 35, and is electrically connected to the same plane ground conductor layer 37 and the ground conductor layer 33 by the through conductor 38. In the high frequency input / output terminal 31 of the present invention, at least one side of the dielectric wall member 35, that is, the dielectric wall member
Since the groove 36 is formed in the dielectric substrate 32 between the line conductors 34 on at least one side with respect to the boundary 35, the same plane ground conductor layer 37 is not formed in the portion where the groove 36 is formed, Instead, an air layer will be present.

【0034】このように同一面接地導体層37・上面接地
導体層39・貫通導体38、さらには誘電体基板32および誘
電体壁部材35の側面に側面接地導体層等を設けた場合に
は、ハーメチックシール部における線路導体34周囲を接
地導体層で囲むこととなって高周波信号に対するシール
ドとすることができ、安定した高周波特性が得られるも
のとなる。
As described above, when the side surface ground conductor layer and the like are provided on the side surfaces of the same surface ground conductor layer 37, the upper surface ground conductor layer 39, the through conductor 38, and the dielectric substrate 32 and the dielectric wall member 35, By surrounding the line conductor 34 in the hermetic seal portion with the ground conductor layer, it can be used as a shield for high-frequency signals, and stable high-frequency characteristics can be obtained.

【0035】なお、このような側面接地導体層や上面接
地導体層は、これらに代えて、例えばこの高周波用入出
力端子をパッケージに組み込んだ際に他の導電部材によ
り形成してもよい。
The side-surface ground conductor layer and the top-surface ground conductor layer may be formed of other conductive members instead of, for example, when the high frequency input / output terminal is incorporated in a package.

【0036】本発明の高周波用入出力端子において、誘
電体基板および誘電体壁部材としては、例えばアルミナ
やムライト等のセラミックス材料、あるいはガラスセラ
ミックス、あるいはテフロン(PTFE)・ガラスエポ
キシ・ポリイミド等の樹脂系材料などが用いられる。こ
れら誘電体の厚みや幅・長さは、伝送される高周波信号
の周波数や特性インピーダンスなどに応じて適宜設定さ
れる。
In the high frequency input / output terminal of the present invention, the dielectric substrate and the dielectric wall member are made of a ceramic material such as alumina or mullite, a glass ceramic, or a resin such as Teflon (PTFE), glass epoxy or polyimide. A system material or the like is used. The thickness, width and length of these dielectrics are appropriately set according to the frequency and characteristic impedance of the transmitted high-frequency signal.

【0037】なお、誘電体壁部材と誘電体基板とには通
常は同じ材料を用いればよいが、異なる材料を用いて誘
電体壁部材の誘電率と誘電体基板の誘電率とを異ならせ
てもよい。この場合は、例えば、誘電体基板よりも誘電
体壁部材の誘電率が低い方が好ましく、誘電体壁部材の
誘電率をなるべく真空の誘電率に近づけるのがよい。そ
れらにより、誘電体基板と誘電体壁部材との接合部分と
それ以外の部分とにおける伝搬モードの変化が小さくな
り、伝送損失が小さくなるという点で好ましいものとな
る。
The same material may be usually used for the dielectric wall member and the dielectric substrate. However, different materials are used to make the dielectric constant of the dielectric wall member different from that of the dielectric substrate. Is also good. In this case, for example, it is preferable that the dielectric constant of the dielectric wall member is lower than that of the dielectric substrate, and it is preferable that the dielectric constant of the dielectric wall member be as close as possible to a vacuum dielectric constant. Accordingly, the change in the propagation mode at the joint between the dielectric substrate and the dielectric wall member and the other portion is small, which is preferable in that the transmission loss is reduced.

【0038】線路導体は高周波線路導体用の金属材料、
例えばCuやMoMn+Ni+Au、W+Ni+Au、
Cr+Cu、Cr+Cu+Ni+Au、Ta2 N+Ni
Cr+Au、Ti+Pd+Au、NiCr+Pd+Au
などを用いて厚膜印刷法あるいは各種の薄膜形成方法や
メッキ処理法などにより形成され、その厚みや幅も伝送
される高周波信号の周波数や特性インピーダンスなどに
応じて適宜設定される。
The line conductor is a metal material for a high-frequency line conductor,
For example, Cu, MoMn + Ni + Au, W + Ni + Au,
Cr + Cu, Cr + Cu + Ni + Au, Ta 2 N + Ni
Cr + Au, Ti + Pd + Au, NiCr + Pd + Au
It is formed by a thick film printing method, various thin film forming methods, a plating method, or the like, and its thickness and width are appropriately set according to the frequency and characteristic impedance of the transmitted high-frequency signal.

【0039】図1〜図3の例のように誘電体壁部材と誘
電体基板との接合部において線路導体の線路幅をそれ以
外の部分での線路幅よりも狭くする場合、それらの幅
は、理想とする特性インピーダンスに対応する幅からそ
れ以外の部分での線路幅までの間で必要とする仕様に応
じて適宜設定される。
In the case where the line width of the line conductor is made smaller than the line width of the other portion at the joint between the dielectric wall member and the dielectric substrate as in the examples of FIGS. It is set as appropriate according to the required specifications from the width corresponding to the ideal characteristic impedance to the line width in the other portions.

【0040】また、同一面接地導体層37を設ける場合
は、線路導体と同様の材料で同様の方法により形成すれ
ばよく、線路導体34と同一面接地導体層36との間隔は、
一般的な同一面接地導体層を設ける場合の標準的な設定
とすればよい。さらに、誘電体壁部材35と誘電体基板32
との接合部において同一面接地導体層37を線路導体34に
向けて等間隔に突出させるなどして特性インピーダンス
の整合をより精密に行なってもよく、そのような場合に
は電磁界的影響度を考慮して必要とする特性に応じて適
宜設定すればよい。
When the same plane ground conductor layer 37 is provided, the same plane ground conductor layer 37 may be formed of the same material as the line conductor by the same method.
A standard setting for providing a common ground conductor layer on the same plane may be used. Further, the dielectric wall member 35 and the dielectric substrate 32
The characteristic impedance may be more precisely matched by, for example, projecting the same-surface ground conductor layer 37 toward the line conductor 34 at equal intervals at the junction with the conductor, and in such a case, the electromagnetic field influence degree May be set appropriately according to the required characteristics.

【0041】接地導体層3ならびに必要に応じて形成す
る上面接地導体層39や側面接地導体層は、線路導体と同
様の材料を用いて同様の方法により被着形成すればよ
い。なお前述のように、これらは金属被膜層として形成
される場合の他に他の導電部材、例えば金属板や金属ブ
ロックを取着することにより形成される場合もある。
The ground conductor layer 3 and the upper surface ground conductor layer 39 and the side surface ground conductor layer which are formed as necessary may be formed by using the same material as the line conductor and by the same method. As described above, these may be formed by attaching another conductive member, for example, a metal plate or a metal block, in addition to being formed as a metal coating layer.

【0042】次に、本発明の第1の高周波用半導体素子
収納用パッケージについて説明する。本発明の第1の高
周波用半導体素子収納用パッケージにおいては、誘電体
または金属等から成る基板には、その上面に高周波用半
導体素子を搭載するための搭載部が形成されている。こ
の搭載部は基板上に平坦面としてあるいは凹状に形成さ
れる。また、基板上には搭載部を囲むように、基板と同
様に誘電体または金属等から成る枠体が接合される。
Next, a first package for housing a high-frequency semiconductor element of the present invention will be described. In the first package for housing a high-frequency semiconductor element of the present invention, a mounting portion for mounting the high-frequency semiconductor element is formed on the upper surface of a substrate made of a dielectric or metal. This mounting portion is formed on the substrate as a flat surface or in a concave shape. A frame made of a dielectric material or a metal is joined to the substrate so as to surround the mounting portion, similarly to the substrate.

【0043】枠体には、枠体を切り欠いてその側面およ
び底面を導電性とした入出力端子取付部が形成される。
なお、この入出力端子取付部を形成するために、基板に
も同様の切欠きを設けてもよい。入出力端子取付部の側
面および底面は、基板および枠体が金属から成る場合は
導電性であるが、基板および枠体が誘電体から成る場合
には導体層を被着形成することによって導電性とする。
これら側面と底面とは、いずれも基板および枠体あるい
はそれらに被着形成された接地導体層を介して接地され
ている。
The frame is formed with an input / output terminal mounting portion in which the side and bottom surfaces of the frame are cut out and the side and bottom surfaces thereof are made conductive.
Note that a similar notch may be provided on the substrate to form the input / output terminal attachment portion. The side and bottom surfaces of the input / output terminal mounting part are conductive when the substrate and frame are made of metal, but are conductive by forming a conductive layer when the substrate and frame are made of dielectric. And
Both the side and the bottom are grounded via the substrate and the frame or the ground conductor layer adhered to them.

【0044】そして、本発明の第1の高周波用半導体素
子収納用パッケージは、この入出力端子取付部に枠体と
ともに前述の本発明に係る高周波用入出力端子が接合さ
れていることが特徴である。
The first high-frequency semiconductor element housing package of the present invention is characterized in that the above-mentioned high-frequency input / output terminal according to the present invention is joined to the input / output terminal mounting portion together with the frame. is there.

【0045】このような本発明の第1の高周波用半導体
素子収納用パッケージによれば、その高周波用入出力端
子部の構造として前述の本発明に係る高周波用入出力端
子を用いていることから、いわゆるメタルウォールタイ
プの高周波用半導体素子収納用パッケージとして、パッ
ケージ内部に収容された高周波用半導体素子と外部電気
回路との間における高周波信号の伝送において高周波用
入出力端子における線路導体間の電気的干渉による高周
波特性の低下が生ずることがなく、高周波信号の反射が
なく高周波信号に対する良好な伝送特性を有し、内部に
収容される高周波用半導体素子が誤動作等を起こすこと
を防止できるものとなる。
According to the first high-frequency semiconductor element housing package of the present invention, the high-frequency input / output terminal according to the present invention is used as the structure of the high-frequency input / output terminal. As a so-called metal wall type package for housing a high-frequency semiconductor element, an electrical connection between line conductors at a high-frequency input / output terminal in transmission of a high-frequency signal between the high-frequency semiconductor element housed inside the package and an external electric circuit. The high-frequency characteristics do not deteriorate due to the interference, the high-frequency signals are not reflected, and the high-frequency signals have good transmission characteristics, and the high-frequency semiconductor element housed therein can be prevented from malfunctioning. .

【0046】また、高周波用入出力端子においてリード
端子を取着する線路導体の幅を広げることができ、リー
ド端子の接合の信頼性が高い高周波用半導体素子収納用
パッケージとなる。
Further, the width of the line conductor to which the lead terminal is attached in the high frequency input / output terminal can be increased, and a high frequency semiconductor element housing package having high reliability of joining of the lead terminal can be obtained.

【0047】そして、線路導体を搭載部に搭載される高
周波用半導体素子の端子電極ならびに外部電気回路の配
線導体に、ボンディングワイヤやリボン・リード端子等
を介して接続してパッケージ内部の高周波用半導体素子
と外部電気回路とを電気的に接続し、枠体の上面にFe
−Ni−CoやFe−Ni42アロイ等のFe−Ni合金
・無酸素銅・アルミニウム・ステンレス・Cu−W合金
・Cu−Mo合金などから成る蓋体を、半田・AuSn
ろう等の低融点金属ろう材やAuGeロウ等の高融点金
属ろう材、あるいはシームウェルド(溶接)等により取
着することによって、高周波用半導体素子がパッケージ
内部に気密封止して収容され、製品としての高周波用半
導体装置となる。
Then, the line conductor is connected to the terminal electrode of the high-frequency semiconductor element mounted on the mounting portion and the wiring conductor of the external electric circuit via a bonding wire, a ribbon lead terminal, or the like, and the high-frequency semiconductor in the package is connected. The element is electrically connected to an external electric circuit, and Fe
-A lid made of an Fe-Ni alloy such as Ni-Co or Fe-Ni42 alloy, oxygen-free copper, aluminum, stainless steel, Cu-W alloy, Cu-Mo alloy, etc. is soldered, AuSn
The high-frequency semiconductor element is hermetically sealed and housed inside the package by attaching it with a low-melting metal brazing material such as a braze, a high-melting metal brazing material such as an AuGe braze, or by seam welding. As a high-frequency semiconductor device.

【0048】このような本発明の第1の高周波用半導体
素子収納用パッケージにおける基板および枠体として
は、パッケージの仕様に応じて高周波用入出力端子の誘
電体と同様の誘電体あるいは上記の蓋体と同じ金属を用
い、誘電体から成る場合には少なくとも入出力端子取付
部の側面および底面を導電性とする。
The substrate and frame in the first high-frequency semiconductor element housing package of the present invention may be the same dielectric as the high-frequency input / output terminal dielectric or the above-described lid according to the specifications of the package. When the same metal as the body is used, and when the body is made of a dielectric, at least the side and bottom surfaces of the input / output terminal mounting portion are made conductive.

【0049】また、基板と枠体とはAg−Cuろう・A
u−Snろう・Au−Geろう等の高融点金属ろう材等
により接合される。また、高周波用入出力端子は入出力
端子取付部に嵌着され、枠体および基板に同様の高融点
金属ろう材等により接合される。
The substrate and the frame are made of Ag-Cu solder.
It is joined by a high melting point metal brazing material such as u-Sn brazing or Au-Ge brazing. The high frequency input / output terminal is fitted to the input / output terminal mounting portion, and is joined to the frame and the substrate by the same high melting point metal brazing material or the like.

【0050】なお、入出力端子取付部に嵌着させる高周
波用入出力端子の誘電体壁部材の上面は、入出力端子取
付部を枠体の上面に達する切欠きとして枠体の上面と同
一面となるようにしてもよく、このようにすればこれら
の上面に蓋体を直接あるいは枠状の金属シール等を介し
て取着することにより、搭載部に搭載した高周波用半導
体素子を内部に容易に気密封止して収容できる。また、
このとき誘電体壁部材の上面と枠体の上面とが同一面と
ならない場合は、その段差を埋めるような形状とした蓋
体により、あるいは金属シールを介することにより同様
に高周波用半導体素子を内部に気密封止して収容でき
る。
The upper surface of the dielectric wall member of the high frequency input / output terminal to be fitted to the input / output terminal mounting portion is formed so that the input / output terminal mounting portion is cut out to reach the upper surface of the frame and is flush with the upper surface of the frame. In this case, the high-frequency semiconductor element mounted on the mounting portion can be easily inserted into the inside by attaching the lid directly or via a frame-shaped metal seal or the like to these upper surfaces. Can be housed in a hermetically sealed manner. Also,
At this time, if the upper surface of the dielectric wall member and the upper surface of the frame are not flush with each other, the high-frequency semiconductor element is similarly internally sealed by a lid shaped to fill the step or through a metal seal. Can be housed in a hermetically sealed manner.

【0051】また、高周波用入出力端子は、必要に応じ
て入出力端子取付部を複数設けて並列的に複数取り付け
てもよい。
Further, a plurality of high frequency input / output terminals may be provided in parallel by providing a plurality of input / output terminal mounting portions as necessary.

【0052】また、高周波用入出力端子に上面接地導体
層や側面接地導体層を付加する場合は、金属被膜層とし
て形成する場合の他に、貫通導体を多数並べることによ
り、あるいはそれらを連結させることにより、ほぼ連続
した接地導体層として被膜層と同様に機能させるように
してもよいし、金属板や金属ブロックを取着することに
より形成してもよい。
When the upper surface ground conductor layer or the side surface ground conductor layer is added to the high frequency input / output terminal, in addition to the case where the upper conductor layer is formed as a metal film layer, a large number of through conductors are arranged or connected. As a result, a substantially continuous ground conductor layer may function in the same manner as the coating layer, or may be formed by attaching a metal plate or a metal block.

【0053】次に、本発明の第2の高周波用半導体素子
収納用パッケージについて説明する。本発明の第2の高
周波用半導体素子収納用パッケージにおいては、基板は
誘電体基板であり、前述の高周波用入出力端子の誘電体
基板あるいは誘電体壁部材と同様の材料から成り、その
下面には接地導体層が形成され、その上面には高周波用
半導体素子を搭載するための平坦面状あるいは凹状に形
成された搭載部を有している。また、誘電体基板の上面
には搭載部近傍から誘電体基板の外周近傍にかけて複数
の線路導体が互いにほぼ平行に形成されて配設されてお
り、さらに、誘電体基板上には搭載部を囲むとともに線
路導体の各々の一部を挟み込む誘電体枠体が接合されて
いる。
Next, a second package for accommodating a high frequency semiconductor device according to the present invention will be described. In the second package for storing a high-frequency semiconductor element of the present invention, the substrate is a dielectric substrate, which is made of the same material as the dielectric substrate or the dielectric wall member of the above-described high-frequency input / output terminal, and has a lower surface. Has a mounting portion formed on a flat surface or in a concave shape for mounting a high-frequency semiconductor element on an upper surface thereof. In addition, a plurality of line conductors are formed on the upper surface of the dielectric substrate from the vicinity of the mounting portion to the vicinity of the outer periphery of the dielectric substrate so as to be formed substantially in parallel with each other, and further surround the mounting portion on the dielectric substrate. Also, a dielectric frame sandwiching a part of each of the line conductors is joined.

【0054】そして、本発明の第2の高周波用半導体素
子収納用パッケージにおいては、誘電体枠体の少なくと
も片側、すなわち誘電体枠体を境として片側において、
複数の線路導体間の誘電体基板に、幅が0.2 mm以上、
深さが誘電体基板の厚みの2分の1以上の溝を設けたこ
とを特徴とする。
In the second package for housing a high-frequency semiconductor element according to the present invention, at least one side of the dielectric frame, that is, one side of the dielectric frame as a boundary,
A width of 0.2 mm or more on a dielectric substrate between a plurality of line conductors,
A groove having a depth of at least half the thickness of the dielectric substrate is provided.

【0055】この溝は、誘電体枠体の外側のみ、あるい
は内側のみに設けてもよく、外側と内側に同時に設けて
もよい。特に、外側に設けると、線路導体のインピーダ
ンス整合をとりつつ線路導体の幅を従来よりも大きくで
きてリード端子の取着強度を十分に確保することがで
き、より好適なものとなる。
This groove may be provided only on the outside or inside of the dielectric frame, or may be provided simultaneously on the outside and inside. In particular, when provided on the outside, the width of the line conductor can be made larger than before while the impedance of the line conductor is matched, and the attachment strength of the lead terminal can be sufficiently secured, which is more preferable.

【0056】また、この溝は誘電体基板を貫通して切欠
き部として形成してもよい。ただし、誘電体枠体の内側
の溝については、パッケージを気密封止する関係上、誘
電体基板を貫通させることは好ましくない。しかし、内
側の溝を誘電体基板を貫通させて設けた場合であって
も、その貫通溝を覆うように誘電体基板の下面にさらに
別の誘電体基板や金属ベースや放熱部材等を取着させる
ことにより気密性を確保することができる。
Further, this groove may be formed as a notch through the dielectric substrate. However, it is not preferable to let the dielectric substrate penetrate the groove on the inner side of the dielectric frame because the package is hermetically sealed. However, even when the inner groove is provided through the dielectric substrate, another dielectric substrate, a metal base, a heat radiating member, or the like is attached to the lower surface of the dielectric substrate so as to cover the through groove. By doing so, airtightness can be ensured.

【0057】このような構成の本発明の第2の高周波用
半導体素子収納用パッケージによれば、前述の本発明に
係る高周波用入出力端子と同様の構成の高周波信号の入
出力端子部を備えたことから、いわゆるセラミックウォ
ールタイプの高周波用半導体素子収納用パッケージとし
て、パッケージ内部に収容された高周波用半導体素子と
外部電気回路との間における高周波信号の伝送において
高周波用入出力端子における線路導体間の電気的干渉に
よる高周波特性の低下が生ずることがなく、高周波信号
の反射が生ずることがなく高周波信号に対する良好な伝
送特性を有し、内部に収容される高周波用半導体素子が
誤動作等を起こすことを防止できるものとなる。
According to the second high-frequency semiconductor element storage package of the present invention having such a configuration, the high-frequency signal input / output terminal portion having the same configuration as the above-described high-frequency input / output terminal of the present invention is provided. Therefore, as a so-called ceramic wall type package for housing a high-frequency semiconductor element, a high-frequency signal is transmitted between the high-frequency semiconductor element housed inside the package and an external electric circuit. The high-frequency characteristics are not degraded due to the electrical interference of the high-frequency signal, the high-frequency signal is not reflected, and the high-frequency signal has good transmission characteristics, and the high-frequency semiconductor element housed therein may malfunction. Can be prevented.

【0058】また、誘電体枠体の外側に位置する入出力
端子部においては、前述のようにリード端子を取着する
線路導体の幅を広げることができ、リード端子の接合の
信頼性が高い高周波用半導体素子収納用パッケージとな
る。
Further, in the input / output terminal portion located outside the dielectric frame, the width of the line conductor to which the lead terminal is attached can be increased as described above, and the reliability of joining of the lead terminal is high. This is a package for storing a high-frequency semiconductor element.

【0059】そして、この本発明の第2の高周波用半導
体素子収納用パッケージによれば、線路導体を搭載部に
搭載される高周波用半導体素子の端子電極ならびに外部
電気回路の配線導体に、ボンディングワイヤやリボン・
リード端子等を介して接続してパッケージ内部の高周波
用半導体素子と外部電気回路とを電気的に接続し、誘電
体枠体の上面に前述の材料から成る蓋体を前述の取着方
法により取着することによって高周波用半導体素子がパ
ッケージ内部に気密封止して収容され、製品としての高
周波用半導体装置となる。
According to the second package for housing a high-frequency semiconductor element of the present invention, the bonding wire is connected to the terminal electrode of the high-frequency semiconductor element mounted on the mounting portion and the wiring conductor of the external electric circuit. And ribbons
The semiconductor device for high frequency inside the package is electrically connected to an external electric circuit by connecting via a lead terminal or the like, and a lid made of the above-mentioned material is attached on the upper surface of the dielectric frame by the above-mentioned attaching method. By being attached, the high-frequency semiconductor element is hermetically sealed and accommodated in the package, and becomes a high-frequency semiconductor device as a product.

【0060】誘電体基板および誘電体枠体としては、パ
ッケージの仕様に応じて前述の本発明に係る高周波用入
出力端子の誘電体と同様の誘電体を用いればよい。ま
た、誘電体基板の下面には接地導体層をほぼ全面に形成
しておくことが、接地導体層を理想的なグランド状態と
できる点から望ましい。
As the dielectric substrate and the dielectric frame, a dielectric similar to the above-described dielectric of the high frequency input / output terminal according to the present invention may be used according to the specifications of the package. It is desirable to form a ground conductor layer on almost the entire lower surface of the dielectric substrate, since the ground conductor layer can be set in an ideal ground state.

【0061】また、誘電体基板と誘電体枠体とは、別個
に作製したものを接合するほかにも、例えば焼成後に誘
電体基板および誘電体枠体となるセラミックグリーンシ
ートを積層して焼成して一体化することにより接合して
もよい。また、線路導体や接地導体層、あるいは必要に
応じて形成する同一面接地導体層や上面接地導体層・側
面接地導体層・貫通導体は、例えばそれぞれ誘電体基板
・誘電体枠体に導体ペーストを所定パターンに印刷塗布
あるいは埋設して誘電体基板・誘電体枠体に焼成して一
体化することにより被着形成される。
In addition to joining the dielectric substrate and the dielectric frame separately manufactured, for example, after firing, the dielectric substrate and the ceramic green sheet to be the dielectric frame are laminated and fired. And may be joined by being integrated. For the line conductor and the ground conductor layer, or the same-surface ground conductor layer, the upper-surface ground conductor layer, the side-surface ground conductor layer, and the through conductor formed as necessary, for example, apply a conductor paste to a dielectric substrate and a dielectric frame, respectively. It is formed by printing or embedding it in a predetermined pattern and baking and integrating it with a dielectric substrate / dielectric frame.

【0062】なお、誘電体枠体の高周波用入出力端子部
における前述の誘電体壁部材に相当する部分は、誘電体
枠体と一体としてその上面が誘電体枠体の上面と同一面
となるようにすれば、これらの上面に蓋体を直接あるい
は枠状の金属シール等を介して取着することにより、搭
載部に搭載した高周波用半導体素子を内部に容易に気密
封止して収容できる。また、この部分には前述のように
段差があっても差し支えない。
The portion corresponding to the above-mentioned dielectric wall member in the high frequency input / output terminal portion of the dielectric frame is integrated with the dielectric frame, and the upper surface thereof is flush with the upper surface of the dielectric frame. In this case, the high-frequency semiconductor element mounted on the mounting portion can be easily hermetically sealed and accommodated therein by attaching the lid to the upper surface directly or via a frame-shaped metal seal or the like. . This portion may have a step as described above.

【0063】さらに、誘電体壁部材に相当する部分の誘
電率を誘電体枠体の他の部分と異ならせ、例えば低いも
のとすることにより、ハーメチックシール部とその前後
における高周波信号の伝搬モードをより近いものとし
て、反射損失・挿入損失を効果的に低減させることがで
きるものとすることもできる。
Furthermore, by making the dielectric constant of the portion corresponding to the dielectric wall member different from that of the other portions of the dielectric frame, for example, by making it low, the propagation mode of the high frequency signal before and after the hermetic seal portion is reduced. As a closer example, it is possible to effectively reduce reflection loss and insertion loss.

【0064】また、高周波用入出力端子部は必要に応じ
て複数設けてもよいことは言うまでもない。
It is needless to say that a plurality of high frequency input / output terminals may be provided as necessary.

【0065】さらに、この本発明の第2の高周波用半導
体素子収納用パッケージにおいても、高周波用入出力端
子部の誘電体壁部材に相当する誘電体枠体に上面接続導
体層ならびに側面接続導体層に相当する導体層を設けた
場合には、線路導体の周囲を接地導体層で囲む高周波信
号に対するシールドを形成することができる。
Further, in the second package for accommodating a high-frequency semiconductor element according to the present invention, the dielectric frame corresponding to the dielectric wall member of the high-frequency input / output terminal portion also includes the upper surface connection conductor layer and the side surface connection conductor layer. When a conductor layer corresponding to the above is provided, a shield for a high-frequency signal that surrounds the line conductor with a ground conductor layer can be formed.

【0066】また、接地導体層を形成する場合や上面接
地導体層や側面接地導体層を付加する場合は、前述のよ
うに、金属被膜層として形成する場合の他に貫通導体を
多数並べることにより、あるいはそれらを連結させるこ
とにより、ほぼ連続した接地導体層として被膜層と同様
に機能させるようにしてもよいし、金属板や金属ブロッ
クを取着することにより形成してもよい。
When a ground conductor layer is formed or when a top ground conductor layer or a side ground conductor layer is added, a large number of through conductors may be arranged in addition to the case where the through conductors are formed as described above. Alternatively, they may be connected to each other to function as a substantially continuous ground conductor layer in the same manner as the coating layer, or may be formed by attaching a metal plate or a metal block.

【0067】なお、本発明は以上の例に限定されるもの
ではなく、本発明の要旨を逸脱しない範囲で変更・改良
を施すことは何ら差し支えない。例えば、複数の線路導
体は互いに略平行に配設されるものであるが、高周波入
出力端子全体あるいは高周波用半導体素子収納用パッケ
ージ全体を見た場合に複数の線路導体が全体として放射
状に配設されている場合であっても、隣接する線路導体
同士がほぼ平行と言える関係となっていれば本発明の範
囲を逸脱するものではない。
It should be noted that the present invention is not limited to the above example, and that changes and improvements can be made without departing from the scope of the present invention. For example, a plurality of line conductors are arranged substantially parallel to each other, but when the entire high-frequency input / output terminal or the entire high-frequency semiconductor element housing package is viewed, the plurality of line conductors are arranged radially as a whole. Even if it is performed, the line conductors adjacent to each other do not deviate from the scope of the present invention as long as they have a relationship that can be said to be substantially parallel.

【0068】[0068]

【発明の効果】本発明の高周波用入出力端子によれば、
誘電体壁部材の少なくとも片側で複数の線路導体間の誘
電体基板に幅が0.2 mm以上、深さが誘電体基板の厚み
の2分の1以上の溝を設けたことから、この部分に空気
の溝が介在することとなって線路導体間の容量値が低く
なり、高周波特性に悪影響を与える電気的干渉が低減さ
れる。また、線路導体の近傍に溝により比誘電率の小さ
い空気の層が存在することとなるため線路導体周りの実
効誘電率が低くなり、それにより線路導体の幅を変えて
インピーダンス整合を行なって高周波信号の反射を低減
させた場合に従来の高周波用入出力端子と比較して線路
導体の幅を広くすることができるので、線路導体にリー
ド端子を取り付ける仕様の場合にリード端子の接合面積
を広くすることができて十分な接合強度を確保すること
ができるものとなる。
According to the high frequency input / output terminal of the present invention,
Since a groove having a width of 0.2 mm or more and a depth of one half or more of the thickness of the dielectric substrate is provided in the dielectric substrate between the plurality of line conductors on at least one side of the dielectric wall member, air is formed in this portion. The presence of the groove reduces the capacitance value between the line conductors, and reduces the electric interference that adversely affects the high-frequency characteristics. In addition, since an air layer having a small relative dielectric constant exists due to the groove near the line conductor, the effective dielectric constant around the line conductor becomes low, thereby changing the width of the line conductor to perform impedance matching and to perform high frequency operation. When signal reflection is reduced, the width of the line conductor can be made wider than that of conventional high-frequency input / output terminals. And sufficient bonding strength can be ensured.

【0069】そして、溝が誘電体基板を貫通しており、
線路導体間の誘電体基板に切欠き部を設けた場合には、
各線路導体間の誘電体基板が空気層により完全に分離さ
れることとなり、この溝による上記の作用効果がより好
適に奏されるものとなる。
The groove penetrates the dielectric substrate,
If a notch is provided in the dielectric substrate between the line conductors,
The dielectric substrate between the respective line conductors is completely separated by the air layer, and the above-described operation and effect by the groove can be more suitably achieved.

【0070】また、本発明の第1の高周波用半導体素子
収納用パッケージによれば、その入出力端子部の構造と
して上記の本発明の高周波用入出力端子を用いているこ
とから、同様に高周波特性に悪影響を与える電気的干渉
が低減され、高周波信号の反射が生ずることがなく、線
路導体の幅を広くすることができて線路導体にリード端
子を取り付ける仕様の場合にリード端子の接合面積を広
くすることができて十分な接合強度を確保することがで
きるものとなる。
According to the first high-frequency semiconductor element housing package of the present invention, the high-frequency input / output terminal of the present invention is used as the structure of the input / output terminal portion. The electrical interference that adversely affects the characteristics is reduced, the reflection of high-frequency signals does not occur, the width of the line conductor can be widened, and when the lead terminal is attached to the line conductor, the joint area of the lead terminal is reduced. It can be widened and sufficient bonding strength can be secured.

【0071】また、本発明の第2の高周波用半導体素子
収納用パッケージによれば、その高周波入出力端子部と
して少なくとも誘電体枠体の片側で上記の本発明に係る
高周波用入出力端子と同様の溝を形成した入出力端子部
を設けたことから、上記の本発明の高周波用入出力端子
ならびに第1の高周波用半導体素子収納用パッケージと
同様に、高周波特性に悪影響を与える電気的干渉が低減
され、高周波信号の反射が生ずることがなく、線路導体
の幅を広くすることができて線路導体にリード端子を取
り付ける仕様の場合にリード端子の接合面積を広くする
ことができて十分な接合強度を確保することができるも
のとなる。
According to the second high-frequency semiconductor element housing package of the present invention, the high-frequency input / output terminals are at least on one side of the dielectric frame, similar to the above-described high-frequency input / output terminals of the present invention. Since the input / output terminal portion having the groove is formed, like the above-described high-frequency input / output terminal of the present invention and the first high-frequency semiconductor element housing package, electrical interference that adversely affects high-frequency characteristics is reduced. Reduced, no reflection of high-frequency signals occurs, the width of the line conductor can be widened, and in the case of the specification where the lead terminal is attached to the line conductor, the bonding area of the lead terminal can be widened and sufficient bonding Strength can be ensured.

【0072】以上により、本発明によれば、線路導体間
の間隔が狭くなって同一面接地導体層等を設ける余裕が
ない場合でも、線路導体における高周波信号の反射およ
び線路導体間の電気的干渉による高周波特性の低下を低
減でき、しかもリード端子の取付等に対する製造上の不
具合もない、高周波特性の良好な高周波用入出力端子な
らびに高周波用半導体素子収納用パッケージを提供する
ことができた。
As described above, according to the present invention, even when the distance between the line conductors becomes narrow and there is no room for providing a ground conductor layer on the same plane, reflection of high-frequency signals on the line conductors and electrical interference between the line conductors can be achieved. Thus, it is possible to provide a high-frequency input / output terminal and a high-frequency semiconductor element housing package with good high-frequency characteristics, which can reduce a decrease in high-frequency characteristics due to the above-mentioned method, and have no problem in manufacturing such as mounting of lead terminals.

【図面の簡単な説明】[Brief description of the drawings]

【図1】(a)〜(c)はそれぞれ本発明の高周波用入
出力端子の実施の形態の一例を示す斜視図、その一部を
透視した平面図、(b)のA−A’断面図である。
FIGS. 1A to 1C are perspective views each showing an example of an embodiment of a high-frequency input / output terminal according to the present invention, a plan view showing a part of the perspective view, and an AA ′ cross section of FIG. FIG.

【図2】(a)〜(c)はそれぞれ本発明の高周波用入
出力端子の実施の形態の他の例を示す斜視図、その一部
を透視した平面図、(b)のA−A’断面図である。
FIGS. 2 (a) to 2 (c) are perspective views showing another embodiment of the high frequency input / output terminal of the present invention, a plan view partially showing the example, and AA in FIG. 2 (b). FIG.

【図3】(a)および(b)はそれぞれ本発明の高周波
用入出力端子の実施の形態の他の例を示すその一部を透
視した平面図および(a)のB−B’断面図である。
3 (a) and 3 (b) are a plan view of a part of another embodiment of the high frequency input / output terminal of the present invention, and FIG. It is.

【図4】(a)〜(c)はそれぞれ従来の高周波用入出
力端子の例を示す斜視図、その一部を透視した平面図、
(b)のA−A’断面図である。
4A to 4C are perspective views each showing an example of a conventional high-frequency input / output terminal, a plan view partially showing the example,
It is AA 'sectional drawing of (b).

【図5】(a)および(b)はそれぞれ従来の高周波用
入出力端子の他の例を示すその一部を透視した平面図お
よび(a)のA−A’断面図である。
FIGS. 5A and 5B are a plan view partially showing another example of a conventional high frequency input / output terminal and a sectional view taken along line AA ′ of FIG. 5A.

【符号の説明】[Explanation of symbols]

11、21、31・・・・・高周波用入出力端子 12、22、32・・・・・誘電体基板 13、23、33・・・・・接地導体層 14、24、34・・・・・線路導体 15、25、35・・・・・誘電体壁部材 16、26、36・・・・・溝 11, 21, 31 ... High frequency input / output terminals 12, 22, 32 ... Dielectric substrate 13, 23, 33 ... .Line conductors 15, 25, 35... Dielectric wall members 16, 26, 36...

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 下面に接地導体層が形成された誘電体基
板の上面に複数の線路導体を互いに略平行に形成すると
ともにこれら各線路導体に対し略直交する方向で各々の
線路導体の一部を挟み込む帯状の誘電体壁部材を接合し
て成り、かつ、該誘電体壁部材の少なくとも片側で、前
記線路導体間の前記誘電体基板に幅が0.2mm以上、
深さが前記誘電体基板の厚みの2分の1以上の溝を設け
たことを特徴とする高周波用入出力端子。
A plurality of line conductors are formed substantially parallel to each other on an upper surface of a dielectric substrate having a ground conductor layer formed on a lower surface, and a part of each line conductor is arranged in a direction substantially orthogonal to each of the line conductors. A band-shaped dielectric wall member sandwiching the dielectric wall member is joined, and at least one side of the dielectric wall member, the width of the dielectric substrate between the line conductors is 0.2 mm or more,
A high frequency input / output terminal, wherein a groove having a depth of at least half the thickness of the dielectric substrate is provided.
【請求項2】 前記溝が前記誘電体基板を貫通している
ことを特徴とする請求項1記載の高周波用入出力端子。
2. The high frequency input / output terminal according to claim 1, wherein said groove penetrates through said dielectric substrate.
【請求項3】 上面に高周波用半導体素子を搭載するた
めの搭載部を有する基板上に前記搭載部を囲むように枠
体が接合されるとともに、該枠体を切り欠いてその底面
を導電性とした入出力端子取付部が形成され、該入出力
端子取付部に請求項1または請求項2記載の高周波用入
出力端子が嵌着されて成ることを特徴とする高周波用半
導体素子収納用パッケージ。
3. A frame having a mounting portion for mounting a high-frequency semiconductor element on an upper surface thereof is joined to a frame so as to surround the mounting portion, and the frame is cut out to make the bottom surface conductive. A high-frequency semiconductor element housing package comprising: a high-frequency input / output terminal according to claim 1 or 2 fitted to said input / output terminal mounting portion. .
【請求項4】 下面に接地導体層が形成された誘電体基
板の上面に高周波用半導体素子を搭載するための搭載部
と該搭載部近傍から誘電体基板の外周近傍にかけて互い
に略平行に配設された複数の線路導体とを形成するとと
もに、前記誘電体基板上に前記搭載部を囲むとともに前
記線路導体の各々の一部を挟み込む誘電体枠体を接合し
て成り、該誘電体枠体の少なくとも片側で、前記線路導
体間の前記誘電体基板に幅が0.2mm以上、深さが前
記誘電体基板の厚みの2分の1以上の溝を設けたことを
特徴とする高周波用半導体素子収納用パッケージ。
4. A mounting portion for mounting a high-frequency semiconductor element on an upper surface of a dielectric substrate having a ground conductor layer formed on a lower surface, and substantially parallel to each other from near the mounting portion to near an outer periphery of the dielectric substrate. And forming a plurality of line conductors, and joining a dielectric frame that surrounds the mounting portion on the dielectric substrate and sandwiches a part of each of the line conductors. A high-frequency semiconductor device, wherein a groove having a width of at least 0.2 mm and a depth of at least one-half the thickness of the dielectric substrate is provided on the dielectric substrate between the line conductors on at least one side. Package for storage.
【請求項5】 前記溝が前記誘電体基板を貫通している
ことを特徴とする請求項4記載の高周波用半導体素子収
納用パッケージ。
5. The package for accommodating a high-frequency semiconductor device according to claim 4, wherein said groove penetrates through said dielectric substrate.
JP01277698A 1998-01-26 1998-01-26 High frequency input / output terminals and high frequency semiconductor element storage package Expired - Fee Related JP3493301B2 (en)

Priority Applications (1)

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JP01277698A JP3493301B2 (en) 1998-01-26 1998-01-26 High frequency input / output terminals and high frequency semiconductor element storage package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP01277698A JP3493301B2 (en) 1998-01-26 1998-01-26 High frequency input / output terminals and high frequency semiconductor element storage package

Publications (2)

Publication Number Publication Date
JPH11214556A true JPH11214556A (en) 1999-08-06
JP3493301B2 JP3493301B2 (en) 2004-02-03

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