JPH11186238A - Plasma processor - Google Patents

Plasma processor

Info

Publication number
JPH11186238A
JPH11186238A JP9357542A JP35754297A JPH11186238A JP H11186238 A JPH11186238 A JP H11186238A JP 9357542 A JP9357542 A JP 9357542A JP 35754297 A JP35754297 A JP 35754297A JP H11186238 A JPH11186238 A JP H11186238A
Authority
JP
Japan
Prior art keywords
plasma
wafer
processing apparatus
plasma processing
specific resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9357542A
Other languages
Japanese (ja)
Inventor
Hiroshi Matsumura
浩 松村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP9357542A priority Critical patent/JPH11186238A/en
Priority to TW087121261A priority patent/TW442867B/en
Priority to KR1019980057465A priority patent/KR100309524B1/en
Priority to CNB981265537A priority patent/CN1154161C/en
Publication of JPH11186238A publication Critical patent/JPH11186238A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32532Electrodes
    • H01J37/32568Relative arrangement or disposition of electrodes; moving means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32715Workpiece holder

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Plasma Technology (AREA)
  • ing And Chemical Polishing (AREA)

Abstract

PROBLEM TO BE SOLVED: To scale up more a plasma producing region in a parallel plate plasma processor, wherein an etching treatment of a semiconductor wafer is performed, than the surface of the wafer and to stabilize the production of a plasma. SOLUTION: The specific resistance of plasma correction members 4-1, which are arranged on the direct peripheral part of a wafer 8 and consist of a semiconductor material, is stipulated within a constant range and the structure of the members 4-1 is stipulated. The specific resistance of the members 4-1 consisting the semiconductor material is reduced along with a plasma treating time by heat, which is given from a plasma, but the members 4-1 can keep a constant specific resistance or higher until the end of plasma processing if the members 4-1 have a constant specific resistance or higher at normal temperatures and if the members 4-1 have a constant specific resistance or lower, a plasma is produced on an area larger than the wafer 8 because the electric field from a lower electrode 6 penetrates the materials 4-1.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明はプラズマ処理装置に
関し、特に半導体ウェハのプラズマエッチング処理に用
いる平行平板型プラズマ処理装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma processing apparatus, and more particularly to a parallel plate type plasma processing apparatus used for plasma etching of a semiconductor wafer.

【0002】[0002]

【従来の技術】平行平板型(平面電極型)プラズマ処理
装置において被処理ウェハ周縁の直外周部が絶縁物(セ
ラミックス、石英など)の場合、絶縁物の内径部がプラ
ズマのエッジ部となるため、ウェハの中心部と周縁部と
でプラズマの生成状態が異なり、ウェハ周縁部のプラズ
マ処理性能がウェハ中心部の処理性能より劣っていた。
そこで、ウェハの直外周部にウェハと同様な物質からな
るプラズマ補正部材を置くことにより、プラズマ処理性
能の均一性を得る工夫がなされている。
2. Description of the Related Art In a parallel plate type (plane electrode type) plasma processing apparatus, when an outer peripheral portion of a peripheral edge of a wafer to be processed is an insulator (ceramic, quartz, etc.), an inner diameter portion of the insulator becomes a plasma edge portion. The state of plasma generation differs between the central portion and the peripheral portion of the wafer, and the plasma processing performance at the peripheral portion of the wafer was inferior to the processing performance at the central portion of the wafer.
Therefore, a device for obtaining uniformity of the plasma processing performance has been devised by placing a plasma compensating member made of the same material as the wafer on the outer peripheral portion of the wafer.

【0003】図5は、従来の平行平板型プラズマ処理装
置を示す説明用断面図である。プラズマ処理室1は接地
された上部電極3、上部電極を取り巻く上部電極絶縁材
2、上部電極と互に平行に配置され、ウェハ8を搭載す
るウェハステージとなり、高周波電源7より電力を供給
される下部電極6、下部電極を取り巻く下部電極絶縁材
5、下部電極6上のウェハ8の直外周に配置され、ウェ
ハ8表面のプラズマ処理均一性を向上する目的で用いら
れているリング形状の半導体材料からなるプラズマ補正
部材4により構成されている。ウェハ8が下部電極6の
表面に設置されるとプラズマ処理室1にプラズマ処理ガ
スが導入され、プラズマ処理室1内のプラズマ処理ガス
圧力が安定した後、高周波電源7より高周波電力を下部
電極6へ印加すると、下部電極6と上部電極3との間に
プラズマを生じる。このプラズマによりウェハ8表面は
プラズマエッチング処理される。
FIG. 5 is an explanatory sectional view showing a conventional parallel plate type plasma processing apparatus. The plasma processing chamber 1 is arranged in parallel with the grounded upper electrode 3, the upper electrode insulating material 2 surrounding the upper electrode, and the upper electrode, becomes a wafer stage on which the wafer 8 is mounted, and is supplied with power from the high frequency power supply 7. A lower electrode 6, a lower electrode insulating material 5 surrounding the lower electrode, and a ring-shaped semiconductor material which is disposed on the outer periphery of the wafer 8 on the lower electrode 6 and is used for the purpose of improving the plasma processing uniformity on the surface of the wafer 8. And a plasma correction member 4 composed of When the wafer 8 is set on the surface of the lower electrode 6, a plasma processing gas is introduced into the plasma processing chamber 1, and after the plasma processing gas pressure in the plasma processing chamber 1 is stabilized, high-frequency power is supplied from the high-frequency power source 7 to the lower electrode 6. , A plasma is generated between the lower electrode 6 and the upper electrode 3. The surface of the wafer 8 is plasma-etched by this plasma.

【0004】[0004]

【発明が解決しようとする課題】図3および図4はウェ
ハのエッチング処理におけるプラズマのイオンシースで
の電界強度の分布をプラズマ処理装置の断面図(図5)
に重ねて表示したものであり、それぞれプラズマ補正部
材が4−3および4−4で示されている。
FIGS. 3 and 4 are cross-sectional views of a plasma processing apparatus (FIG. 5) showing the distribution of the electric field intensity in the ion sheath of plasma in the wafer etching process.
, And plasma correction members are indicated by 4-3 and 4-4, respectively.

【0005】図3はプラズマ補正部材4−3の抵抗値が
大きく絶縁物に近い場合の電界強度分布を示して居り、
プラズマの生成領域はウェハの周縁まで延びず、ウェハ
周縁では均一な電界は得られず、従ってウェハ周縁部の
エッチング処理性能はウェハ中央部のエッチング処理性
能より劣ることになる。
FIG. 3 shows an electric field intensity distribution when the resistance value of the plasma correction member 4-3 is large and close to an insulator.
The plasma generation region does not extend to the periphery of the wafer, and a uniform electric field cannot be obtained at the periphery of the wafer. Therefore, the etching performance at the wafer periphery is inferior to the etching performance at the center of the wafer.

【0006】図4はプラズマ補正部材4−4の導電性が
高い場合の電界強度分布を示しており、プラズマの生成
領域はウェハの周縁より外方に、補正部材上に拡大して
いるが、ウェハ中央部で電界強度が下がり、ウェハ周縁
部での処理能力は向上するが、ウェハ中央部での処理力
は低下することになる。
FIG. 4 shows an electric field intensity distribution when the conductivity of the plasma correction member 4-4 is high, and the plasma generation region extends on the correction member outward from the periphery of the wafer. The electric field intensity decreases at the central portion of the wafer, and the processing capability at the peripheral portion of the wafer improves, but the processing capability at the central portion of the wafer decreases.

【0007】本発明の目的は、ウェハ表面の全域にわた
って均一な電解強度分布を示し、エッチング処理中に生
成領域が変化しない安定したプラズマを生成させ、ウェ
ハ全域にわたって良好かつ均一なエッチング処理性能を
有するプラズマ処理装置を提供することである。
SUMMARY OF THE INVENTION An object of the present invention is to provide a uniform plasma intensity distribution over the entire surface of a wafer, to generate a stable plasma whose generation region does not change during the etching process, and to have a good and uniform etching process performance over the entire wafer. An object of the present invention is to provide a plasma processing apparatus.

【0008】[0008]

【課題を解決するための手段】本発明のプラズマ処理装
置は、ウェハステージとなる下部電極のウェハ周縁を囲
むウェハ直外周部に設けられるプラズマ補正部材の半導
体材料は一定の比抵抗を有する。
According to the plasma processing apparatus of the present invention, the semiconductor material of the plasma compensating member provided on the outer peripheral portion of the wafer surrounding the peripheral edge of the lower electrode serving as the wafer stage has a constant specific resistance.

【0009】プラズマ補正部材は、円形のウェハを囲む
リング形状に配置される。
[0009] The plasma correction member is arranged in a ring shape surrounding a circular wafer.

【0010】リング形状をなすプラズマ補正部材の上部
表面は前記ウェハの周辺から該ウェハ表面と同一レベル
で外方に延びる一定の幅を有する。
The upper surface of the ring-shaped plasma compensating member has a constant width extending outward from the periphery of the wafer at the same level as the surface of the wafer.

【0011】リング形状をなすプラズマ補正部材の一定
の幅は、プラズマ生成領域の拡大幅に対応して定められ
る。
The fixed width of the ring-shaped plasma compensating member is determined in accordance with the enlarged width of the plasma generation region.

【0012】リング形状をなすプラズマ補正部材の内側
部分はウェハの下面内側に延び、下部電極がプラズマに
晒されない構造を有する。
The inner portion of the ring-shaped plasma compensating member extends inside the lower surface of the wafer and has a structure in which the lower electrode is not exposed to plasma.

【0013】プラズマ補正部材の母材となる半導体材料
の比抵抗は1Ωcm以上かつ15Ωcm以下である。
The specific resistance of the semiconductor material serving as the base material of the plasma correction member is 1 Ωcm or more and 15 Ωcm or less.

【0014】プラズマ補正部材の母材となる半導体材料
はシリコンであってもよい。
The semiconductor material serving as the base material of the plasma correction member may be silicon.

【0015】半導体であるプラズマ補正部材は、プラズ
マから与えられる熱により比抵抗がプラズマ処理時間と
共に低下するが、常温で一定以上の比抵抗を持っていれ
ばプラズマ処理終了時まで一定以上の比抵抗を保つこと
ができ、また、プラズマ補正部材が一定以下の比抵抗を
持っていれば下部電極からの電界が透過するためウェハ
よりも広い面積にプラズマが生成する。補正部材につい
て一定範囲の比抵抗を有するとともに、形状・構造に工
夫を加えることによりウェハ表面の全域にわたり均一か
つ安定なプラズマを発生させることができる。
Although the specific resistance of the semiconductor compensating member, which is a semiconductor, decreases with the plasma processing time due to the heat given by the plasma, if the specific resistance at room temperature is equal to or higher than a certain value, the specific resistance is higher than a certain value until the end of the plasma processing. In addition, if the plasma correction member has a specific resistance equal to or less than a certain value, the electric field from the lower electrode is transmitted, so that plasma is generated in a larger area than the wafer. The correction member has a specific resistance in a certain range, and a uniform and stable plasma can be generated over the entire surface of the wafer by modifying the shape and structure.

【0016】[0016]

【発明の実施の形態】次に本発明の実施の形態について
図面を参照して詳細に説明する。図1は図5に示すプラ
ズマ処理装置と同様な構造を有する平行平板型プラズマ
処理装置の断面図に、生成されるプラズマのイオンシー
スでの電界強度の分布を重ねて表示した図であり、図
3、図4と異なり、プラズマ生成領域がウェハの表面か
らプラズマ補正部材の表面に適度に拡大され、プラズマ
がウェハ表面の全域にわたって均一、かつ安定に生成さ
れているこを示している。
Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 is a cross-sectional view of a parallel plate type plasma processing apparatus having a structure similar to that of the plasma processing apparatus shown in FIG. 3. Unlike FIG. 4 and FIG. 4, the plasma generation region is appropriately enlarged from the surface of the wafer to the surface of the plasma correction member, indicating that the plasma is uniformly and stably generated over the entire surface of the wafer.

【0017】図1に断面を示すプラズマ処理装置におい
ては、プラズマ補正部材4−1の母材の半導体材料は、
その比抵抗値が1Ωcm〜15Ωcmの間にあるシリコ
ン材であり、この比抵抗値の範囲は実験の結果から求め
られたものである。比抵抗値が1Ωcm未満の時は、図
3に示すようにプラズマ生成領域はウェハ周縁まで十分
に延びず、また比抵抗値が15Ωcmを超える時は、図
4に示すようにプラズマ生成領域はウェハ周縁より外方
に必要以上に延び、いずれの場合も図1に示すようなウ
ェハ中心部から周縁迄均一な電界強度分布を得ることは
できなかった。プラズマ補正部材4−1は円形のウェハ
8の周辺を囲むリング形状に配置され、その表面はウェ
ハ8の表面と同じレベルで外方に延び、リングの幅は2
0mmとなっている。補正部材4−1は、リング状に一
体として形成されてもよく、また複数の部材がリング状
に配置される構成でもよい。
In the plasma processing apparatus whose cross section is shown in FIG. 1, the semiconductor material of the base material of the plasma correcting member 4-1 is
It is a silicon material whose specific resistance value is between 1 Ωcm and 15 Ωcm, and the range of this specific resistance value is obtained from the result of an experiment. When the specific resistance value is less than 1 Ωcm, the plasma generation region does not sufficiently extend to the periphery of the wafer as shown in FIG. 3, and when the specific resistance value exceeds 15 Ωcm, the plasma generation region is formed as shown in FIG. In this case, it was impossible to obtain a uniform electric field intensity distribution from the center of the wafer to the periphery as shown in FIG. The plasma compensating member 4-1 is arranged in a ring shape surrounding the periphery of the circular wafer 8, the surface thereof extends outward at the same level as the surface of the wafer 8, and the width of the ring is 2
0 mm. The correction member 4-1 may be integrally formed in a ring shape, or a configuration in which a plurality of members are arranged in a ring shape.

【0018】また、図2に示す今一つの実施形態におい
ては、同様な比抵抗値を有するプラズマ補正部材4−2
の内側部分が階段状にウェハ8の厚さだけ薄くなってお
り、この部分がウェハ8の下側に延びている。これによ
り、ウェハ8の周縁とプラズマ補正部材4−2が接する
部分に隙間が生じる場合であっても下部電極6の表面が
プラズマに晒されるおそれはない。
In another embodiment shown in FIG. 2, a plasma compensating member 4-2 having the same specific resistance value is provided.
Is thinned in a stepwise manner by the thickness of the wafer 8, and this portion extends below the wafer 8. Accordingly, even when a gap is formed between the peripheral edge of the wafer 8 and the portion where the plasma correction member 4-2 contacts, there is no possibility that the surface of the lower electrode 6 is exposed to plasma.

【0019】このプラズマ処理装置は、下部電極絶縁材
5で覆われ、表面を陰極酸化されたアルミニュームで形
成された下部電極6と、上部電極絶縁材2で覆われ、シ
リコンで形成され、下部電極6と平行に配置された上部
電極3を有し、プラズマ処理されるウェハ8を、下部電
極6上に設置し、プラズマ生成ガスとしてCF4 、CH
3 をそれぞれ30sccm、70sccmずつプラズ
マ処理室1へ導入し、プラズマ処理室1内の圧力が安定
した後に、高周波電源7より発振周波数13.56MH
z、出力1500wの高周波電力を下部電極6に印加す
ると、下部電極6と上部電極3で形成される空間にプラ
ズマが生成される。このときプラズマはプラズマ補正部
材4の表面上まで生成される。
This plasma processing apparatus is composed of a lower electrode 6 covered with a lower electrode insulating material 5, the surface of which is formed of aluminum cathode-oxidized, and an upper electrode insulating material 2 which is formed of silicon, and which is formed of silicon. A wafer 8 having an upper electrode 3 arranged in parallel with the electrode 6 and subjected to plasma processing is placed on the lower electrode 6, and CF 4 or CH is used as a plasma generating gas.
F 3 was introduced into the plasma processing chamber 1 by 30 sccm and 70 sccm respectively, and after the pressure in the plasma processing chamber 1 was stabilized, the oscillation frequency was 13.56 MH from the high frequency power supply 7.
When a high frequency power of z and an output of 1500 w is applied to the lower electrode 6, plasma is generated in a space formed by the lower electrode 6 and the upper electrode 3. At this time, the plasma is generated up to the surface of the plasma correction member 4.

【0020】なお、プラズマ処理装置には、例えば下部
電極のみでなく上部電極にも高周波電力を印加する方式
の装置など、高周波電力の印加方式に各種あるが、これ
らの場合でも本発明のプラズマ補正部材を適用すること
ができる点に変りはない。
There are various types of high-frequency power application systems, such as a system for applying high-frequency power not only to the lower electrode but also to the upper electrode. There is no change in that the members can be applied.

【0021】[0021]

【発明の効果】プラズマ補正部材の半導体材料の比抵抗
を一定の範囲に定め、その形状に工夫を加えることによ
り、ウェハ表面の全域にわたって均一かつ安定したプラ
ズマを生成させ、ウェハ全域にわたって均一かつ良好な
エッチング処理性能を実現でき得る効果がある。
According to the present invention, the specific resistance of the semiconductor material of the plasma compensating member is set within a certain range, and by modifying the shape thereof, uniform and stable plasma is generated over the entire surface of the wafer and uniform and excellent over the entire wafer. There is an effect that a high etching processing performance can be realized.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明のプラズマ処理装置の実施の形態を示す
断面図に、処理中に生成するプラズマのイオンシースで
の電界強度の分布を重ねて表示した説明図である。
FIG. 1 is an explanatory diagram in which a distribution of an electric field intensity in an ion sheath of plasma generated during processing is superimposed on a cross-sectional view illustrating an embodiment of a plasma processing apparatus of the present invention.

【図2】本発明のプラズマ処理装置の今一つの実施の形
態を示す断面図である。
FIG. 2 is a sectional view showing another embodiment of the plasma processing apparatus of the present invention.

【図3】従来のプラズマ処理装置の断面図に、プラズマ
のイオンシースでの電界強度の分布の例を重ねて表示し
た説明図である。
FIG. 3 is an explanatory diagram showing an example of a distribution of electric field intensity in a plasma ion sheath overlaid on a cross-sectional view of a conventional plasma processing apparatus.

【図4】従来のプラズマ処理装置の断面図に、プラズマ
のイオンシースでの電界強度の分布の例を重ねて表示し
た説明図である。
FIG. 4 is an explanatory diagram showing an example of a distribution of electric field intensity in a plasma ion sheath overlaid on a cross-sectional view of a conventional plasma processing apparatus.

【図5】従来の平行平板型プラズマ処理装置の断面図を
例示する説明図である。
FIG. 5 is an explanatory view illustrating a cross-sectional view of a conventional parallel plate type plasma processing apparatus.

【符号の説明】[Explanation of symbols]

1 プラズマ処理室 2 上部電極絶縁材 3 上部電極 4、4−1、4−2、4−3、4−4 プラズマ補正
部材 5 下部電極絶縁材 6 下部電極 7 高周波電源 8 ウェハ
REFERENCE SIGNS LIST 1 plasma processing chamber 2 upper electrode insulator 3 upper electrode 4, 4-1, 4-2, 4-3, 4-4 plasma correction member 5 lower electrode insulator 6 lower electrode 7 high-frequency power supply 8 wafer

Claims (7)

【特許請求の範囲】[Claims] 【請求項1】 ウェハステージとなる下部電極のウェハ
周縁を囲むウェハ直外周部に半導体材料からなるプラズ
マ補正部材を有する平行平板型プラズマ処理装置におい
て、前記半導体材料は一定の比抵抗を有することを特徴
とするプラズマ処理装置。
In a parallel plate type plasma processing apparatus having a plasma correction member made of a semiconductor material at an outer periphery of a wafer surrounding a wafer periphery of a lower electrode serving as a wafer stage, the semiconductor material has a constant specific resistance. Characteristic plasma processing apparatus.
【請求項2】 前記プラズマ補正部材は、円形のウェハ
の周縁を囲むリング形状に配置される請求項1に記載の
プラズマ処理装置。
2. The plasma processing apparatus according to claim 1, wherein the plasma correction member is arranged in a ring shape surrounding a peripheral edge of a circular wafer.
【請求項3】 前記リング形状をなすプラズマ補正部材
の上部表面は前記ウェハの周縁から該ウェハ表面と同一
レベルで外方に延びる一定の幅を有する請求項2に記載
のプラズマ処理装置。
3. The plasma processing apparatus according to claim 2, wherein an upper surface of the ring-shaped plasma compensating member has a constant width extending outward from a peripheral edge of the wafer at the same level as the wafer surface.
【請求項4】 前記一定の幅は、プラズマ生成領域の拡
大幅に対応して定められる請求項3に記載のプラズマ処
理装置。
4. The plasma processing apparatus according to claim 3, wherein the predetermined width is determined in accordance with an enlarged width of a plasma generation region.
【請求項5】 前記リング形状をなすプラズマ補正部材
の内側部分はウェハ下面内側に延び、下部電極がプラズ
マに晒されない構造を有する請求項4に記載のプラズマ
処理装置。
5. The plasma processing apparatus according to claim 4, wherein an inner portion of the ring-shaped plasma compensating member extends inside the lower surface of the wafer and the lower electrode is not exposed to plasma.
【請求項6】 前記半導体材料の比抵抗は1Ωcm以上
かつ15Ωcm以下である請求項2乃至5のいずれか1
項に記載のプラズマ処理装置。
6. The semiconductor material according to claim 2, wherein the semiconductor material has a specific resistance of 1 Ωcm or more and 15 Ωcm or less.
Item 6. The plasma processing apparatus according to Item 1.
【請求項7】 前記半導体材料はシリコンである請求項
1乃至6のいずれか1項に記載のプラズマ処理装置。
7. The plasma processing apparatus according to claim 1, wherein the semiconductor material is silicon.
JP9357542A 1997-12-25 1997-12-25 Plasma processor Pending JPH11186238A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP9357542A JPH11186238A (en) 1997-12-25 1997-12-25 Plasma processor
TW087121261A TW442867B (en) 1997-12-25 1998-12-19 Plasma processing apparatus
KR1019980057465A KR100309524B1 (en) 1997-12-25 1998-12-23 Plasma Treatment Equipment
CNB981265537A CN1154161C (en) 1997-12-25 1998-12-25 Plasma processing apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9357542A JPH11186238A (en) 1997-12-25 1997-12-25 Plasma processor

Publications (1)

Publication Number Publication Date
JPH11186238A true JPH11186238A (en) 1999-07-09

Family

ID=18454669

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9357542A Pending JPH11186238A (en) 1997-12-25 1997-12-25 Plasma processor

Country Status (4)

Country Link
JP (1) JPH11186238A (en)
KR (1) KR100309524B1 (en)
CN (1) CN1154161C (en)
TW (1) TW442867B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4540926B2 (en) * 2002-07-05 2010-09-08 忠弘 大見 Plasma processing equipment

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04196319A (en) * 1990-11-28 1992-07-16 Toshiba Corp Discharge treatment device
JP3210207B2 (en) * 1994-04-20 2001-09-17 東京エレクトロン株式会社 Plasma processing equipment

Also Published As

Publication number Publication date
TW442867B (en) 2001-06-23
CN1154161C (en) 2004-06-16
CN1226740A (en) 1999-08-25
KR19990063352A (en) 1999-07-26
KR100309524B1 (en) 2002-04-24

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