JPH11176927A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To bury a monocrystal silicon having smaller defects between insulation film layers so that its surface has the substantially same level as a surface of the insulation film layer, by a method wherein, after an amorphous silicon layer is deposited on the insulation film layer, chemical and mechanical polishing is performed and further epitaxial growth is performed to monocrystallize. SOLUTION: After a SiO2 film 32 of an insulation on film layer to be an element isolating region is formed and patterned on a monocrystal silicon substrate 31, an amorphous silicon layer 33 is deposited on the entire face, and thereafter the amorphous silicon layer 33 is flatted by chemical and mechanical polishing so as to continue its surface to a surface of the SiO2 film 32. Next, heating is performed in the non-oxidation atmosphere and the amorphous silicon layer 33 is monocrystallized from the monocrystal silicon substrate 31 by an epitaxial growth, and a monocrystal silicon layer 34 is produced between the insulation film layers to be element isolating regions. According to this method, as the monocrystal silicon layer 34 is formed as an epitaxial layer, a substrate having less defects can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device in which an element isolation region similar to a trench structure is formed.

[0002]

2. Description of the Related Art The element isolation of a conventional semiconductor device has been performed by a so-called LOCOS method using a partial oxidation method. But,
In this case, the stray capacitance of the junction increases, and the dimensional change during the partial oxidation occurs due to the formation of a bead beak, which hinders an increase in the speed of the device and an increase in the density of the device.

As one of the techniques for remedying this drawback, a trench element isolation method using a selective epitaxial growth method has been proposed. In this method, an insulating film is partially formed on a semiconductor substrate, and a semiconductor single crystal of the same kind as the substrate is epitaxially grown only on an exposed substrate region that is not covered with the insulating film, which is used as an active region of the element. Things. However, in the conventional selective epitaxial growth, the influence of the plane orientation of the substrate appears during single crystal growth, and it has been difficult to obtain a good quality single crystal layer.

As a method for improving the drawbacks of the conventional selective epitaxial growth method (hereinafter referred to as the former method), as shown in FIG. 3, after an insulating film layer is patterned on a substrate, a large number of thin films are formed before epitaxial growth. A method of forming a crystalline silicon layer or an amorphous silicon layer is disclosed in JP-A-59-227137. This is as shown in FIG.
An SiO ₂ film 12 is patterned on the upper surface. For this patterning, dry etching using a resist is applied.
Next, as shown in FIG. 3B, after an amorphous silicon layer 13 is deposited on the entire surface, as shown in FIG.
The organic resist 14 is flattened by spin dilution and cured by heating. Thereafter, as shown in FIG. 3D, the organic resist 14 is etched by plasma etching until the surface of the amorphous silicon layer 13 located on the SiO ₂ is exposed. Next, as shown in FIG.
By etching the amorphous silicon layer 13 on the O ₂ film 12 and subsequently removing the organic resist 14,
It is assumed that the amorphous silicon layer 13 is exposed as shown in FIG. Then, as shown in FIG. 3G, a single-crystal silicon layer 15 is epitaxially grown on the amorphous silicon layer 13 of the single-crystal silicon substrate 11. Thus, a single crystal layer is epitaxially grown only on the single crystal silicon substrate 11 in a self-aligned manner. According to this method, since the epitaxial growth is performed after the amorphous silicon is formed between the insulating films, the single crystal silicon layer 15 with few crystal defects can be obtained.

Another method (hereinafter referred to as the latter method) is disclosed in Japanese Patent Laid-Open No. 59-1944, as shown in FIG.
No. 45 proposes this. As shown in FIG. 4A, after an insulating film layer (SiO ₂ ) 22 is patterned on a substrate 21, an amorphous silicon layer 23 is deposited on the entire surface (see FIG. 4B), and FIG. As shown in FIG. 3, the amorphous silicon layer 2 except on the pattern of the insulating film layer 22 is formed.
3 is annealed with a laser or an electron beam 24 to be single-crystallized to form a single-crystal silicon layer 25. Thereafter, as shown in FIG. 4D, dry etching 26 is performed,
By removing only the amorphous silicon layer 23, a single crystal silicon layer 25 is embedded between the insulating film layers 22, as shown in FIG. Here, the dry etching rate is amorphous silicon> single crystal silicon >>
Since it is an insulating layer film (SiO ₂ ), the insulating film layer (SiO ₂ )
By etching to 22, as shown in FIG. 4E, a single crystal silicon layer 25 with few crystal defects and a surface almost flat with the surface of the insulating film layer can be formed between the insulating film layers 22. .

[0006]

However, in the former method, it is difficult to flatten the surface of the insulating film layer and the surface of the single crystal silicon layer by controlling the epitaxial growth. In the latter method, the amorphous silicon layer is selectively single-crystallized by an electron beam or a laser.
If only amorphous silicon is removed by etching, as shown in FIG. 4F, over-etching occurs and it is difficult to planarize. In the case of laser annealing, it takes a long time to anneal a wide area. An object of the present invention is to provide a method for manufacturing a semiconductor device in which single crystal silicon with few defects can be embedded between insulating film layers such that the surface thereof is substantially the same as the surface of the insulating film layer.

[0007]

SUMMARY OF THE INVENTION The present invention provides at least one
A method of manufacturing a semiconductor device in which one or more self-aligned element isolation regions are formed on a semiconductor substrate, comprising: forming an insulating film layer on the surface of the semiconductor substrate and then patterning the insulating film layer; A step of flattening the amorphous silicon layer so as to expose the surface of the insulating film layer by performing chemical mechanical polishing after depositing the layer, and a step of epitaxially growing the amorphous silicon layer to make it single crystal. Features.

In the method of manufacturing a semiconductor device according to the present invention, preferably, the amorphous silicon layer can be epitaxially grown by a heat treatment in a non-oxidizing atmosphere.

In the method of manufacturing a semiconductor device according to the present invention, preferably, an insulating film layer can be formed on a surface of the amorphous silicon layer before the amorphous silicon layer is epitaxially grown.

In the method of manufacturing a semiconductor device according to the present invention, preferably, the step of epitaxially growing the amorphous silicon layer to make it a single crystal comprises forming an oxide film on the surface of the amorphous silicon layer by heat treatment in an oxidizing atmosphere. And a single crystallizing step.

The operation of the present invention will be described below. In the method of manufacturing a semiconductor device according to the present invention, after patterning an insulating film layer on a substrate, an amorphous silicon layer is deposited on the entire surface,
The surface of the amorphous silicon layer is flattened by scientific mechanical polishing, the amorphous silicon layer is epitaxially grown, and the single crystal silicon layer is embedded between the insulating film layers,
An element isolation structure similar to trench element isolation can be formed. Since amorphous silicon is single-crystallized by annealing, high-quality single-crystal silicon having no defect between insulating film layers can be easily formed. Further, since the surface of the amorphous silicon layer is processed to be flat with the surface of the insulating film layer by chemical mechanical polishing, the controllability is good.

[0012]

(First Embodiment) A first embodiment of a method of manufacturing a semiconductor device according to the present invention will be described with reference to FIG. FIG. 1 is a sectional view schematically illustrating a manufacturing process of the first embodiment. An SiO ₂ film 32 as an insulating film layer serving as an element isolation region is formed on a single crystal silicon substrate 31.
Is formed as a thermal oxide film at a temperature of 1100 ° C. to a thickness of 5000 ° C., and thereafter a resist is formed thereon, and the resist is
After patterning on the O ₂ film 32, the silicon surface of the silicon substrate 31 is exposed by anisotropic etching, and the resist is removed (see FIG. 1A). Next, an amorphous silicon layer 33 is deposited on the entire surface to a thickness of 6000 ° at a temperature of 500 ° C. in a SiH ₆ atmosphere by low-pressure CVD (see FIG. 1B).
As shown in (c), the amorphous silicon layer 33 is flattened by chemical mechanical polishing (CMP) so that the surface thereof and the surface of the SiO ₂ film 32 of the insulating film layer are continuous. The polishing in this case is for selectively polishing amorphous silicon, and the polishing rate of the insulating film layer is smaller than the polishing rate of amorphous silicon.

Next, a heat treatment is performed in a non-oxidizing atmosphere, for example, an N ₂ atmosphere, for example, at 900 ° C. to monocrystallize the amorphous silicon layer 33 from the single-crystal silicon substrate 31 by epitaxial growth, thereby forming an insulating film to be an element isolation region. A single-crystal silicon layer 34 is formed between the layers (see FIG. 1D). Thus, an element isolation structure similar to the trench isolation is formed.

Thereafter, a MOS transistor is formed using the single-crystal silicon layer 34 as shown in FIG. In this figure, reference numeral 35 denotes an n-type active region of a p-channel MOS transistor, and reference numeral 36 denotes a p-type MOS transistor.
Active region, 37 is the source / drain of a p-channel MOS transistor, 38 is the source / drain of an n-type MOS transistor, 39 is the gate insulating film of these MOS transistors, 40 is the gate electrode of these MOS transistors, 41 is These are the sidewall insulating films of these MOS transistors. In this embodiment,
Since the single crystal silicon layer is formed as an epitaxial layer, it can be obtained as a substrate with few defects as a substrate for forming an active element. Since the active region of the device can be formed by a single crystal silicon layer which is an epitaxial layer,
Compared with MOS transistors formed of bulk silicon, the number of defects in the substrate is small, so that the drive current is increased, the isolation breakdown voltage and the breakdown voltage of the gate oxide film are high, and it is possible to cope with high-speed and high-density devices. Furthermore, since the surface of the amorphous silicon layer is processed to be flat with the surface of the insulating film layer by chemical mechanical polishing, the controllability such as flatness can be improved, and the flatness can be improved, so that the subsequent element formation It becomes advantageous in. Then, since the amorphous silicon layer is monocrystallized by annealing, the throughput is faster than annealing by an electron beam or laser.

(Second Embodiment) A second embodiment of the method of manufacturing a semiconductor device according to the present invention will be described with reference to FIG. FIG. 2 is a cross-sectional view schematically illustrating the process of the second embodiment. The second embodiment is different from the first embodiment in that the amorphous silicon layer 33 is epitaxially grown in an oxidizing atmosphere instead of growing the amorphous silicon layer 33 in a non-oxidizing atmosphere. 2A to 2C are the same as FIGS. 1A to 1C and will not be described.

As shown in FIG. 2C, the amorphous silicon layer 33 is flattened by chemical mechanical polishing so that the surface thereof is continuous with the surface of the SiO ₂ film 32 of the insulating film layer. can get. Next, while the outermost surface of the amorphous silicon layer 33 is oxidized by a heat treatment in an oxidizing atmosphere, for example, an oxygen atmosphere, the amorphous silicon layer 33 is epitaxially grown and single-crystallized. Here, a single crystal silicon layer 34 is formed by epitaxial growth, and an oxide film 42 serving as an insulating film is formed on the outermost surface.
Is formed.

Thereafter, ions are implanted into the single crystal silicon layer 34 using the oxide film 41 as an implantation protection film, and n-well is implanted.
1 and p-well are formed. Then, a MOS transistor is formed using the single crystal silicon layer 34 by using a process that is generally widely used.

In the second embodiment, the formation of the oxide film in the above-mentioned epitaxial growth step is carried out continuously with the formation of the injection protection film and the insulating film in the step of forming the MOS transistor, or by the same step as the step of forming the MOS. Thus, an improvement in throughput can be expected. Although the amorphous silicon layer 33 is damaged by chemical mechanical polishing (CMP), the outermost surface is oxidized into an oxide film at the same time as the epitaxial growth is performed. Not only can it be used as an injection protective film, but a separate process is required to remove the damaged portion, but this process does not increase.

[0019]

According to the method of manufacturing a semiconductor device of the present invention, a single crystal silicon layer of a substrate is formed as an epitaxial layer formed by epitaxial growth, and a substrate with few defects can be provided. Since the region can be formed with this layer, the drive current can be increased due to less defects compared to the MOS transistor formed in bulk silicon, and the isolation breakdown voltage and the gate oxide film breakdown voltage are high, so that the speed and density of the element can be increased. Is possible. Furthermore, since the amorphous silicon layer is processed by chemical mechanical polishing so that its surface becomes flat with the surface of the insulating film layer, the controllability of polishing is good,
Then, since the amorphous silicon layer is single-crystallized by annealing, the throughput is high and the productivity is good. Also,
In this annealing, the single-crystal silicon layer is epitaxially grown while oxidizing the outermost surface of the amorphous silicon layer to form an oxide film by performing it in an oxidizing atmosphere, so that this oxide film is used as a protective film for subsequent ion implantation. Therefore, another step of forming an injection protection film can be omitted or shortened, and this oxide film can be used as an insulating film. is there.

[Brief description of the drawings]

FIG. 1 is a first embodiment of a method of manufacturing a semiconductor device according to the present invention;
It is sectional drawing explaining the manufacturing process.

FIG. 2 is a view illustrating a semiconductor device manufacturing method according to a second embodiment of the present invention;
It is sectional drawing explaining the manufacturing process.

FIG. 3 is a cross-sectional view illustrating steps of a conventional method for manufacturing a semiconductor device.

FIG. 4 is a cross-sectional view illustrating steps of a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

11, 21, 31 Single crystal silicon substrate 12, 22, 32 SiO ₂ film 13, 23, 33 Amorphous silicon layer 15, 25, 34 Single crystal silicon layer 42 Oxide film

Claims (4)

[Claims] 1. A method of manufacturing a semiconductor device in which at least one or more self-aligned element isolation regions are formed on a semiconductor substrate, comprising: forming an insulating film layer on a surface of the semiconductor substrate and then patterning the insulating film layer; Depositing an amorphous silicon layer on the film layer and then performing chemical mechanical polishing to flatten the amorphous silicon layer so that the surface of the insulating film layer is exposed; and monocrystallizing the amorphous silicon layer by epitaxial growth. A method of manufacturing a semiconductor device. 2. The method according to claim 1, wherein the amorphous silicon layer is epitaxially grown by a heat treatment in a non-oxidizing atmosphere. 3. An insulating film is formed on a surface of the amorphous silicon layer before the amorphous silicon layer is epitaxially grown.
The method for manufacturing a semiconductor device according to any one of the above. 4. The step of epitaxially growing and monocrystallizing the amorphous silicon layer is a step of epitaxially growing the amorphous silicon layer while forming an oxide film on the surface by heat treatment in an oxidizing atmosphere to monocrystallize the amorphous silicon layer. The method for manufacturing a semiconductor device according to claim 1, wherein: