JPH06120332A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the reaction of a silicon oxide film and silicon during epitaxial growth and the degradation in junction leakage current characteristic by forming a silica nitride film on the bottom and side faces of the silicon oxide film for element isolation. CONSTITUTION:A silicon oxide film (CVD oxide film) 4, formed on a p-type silicon substrate 1, is used to isolate elements. For the purpose, the CVD oxide film 4 for element isolation is removed only from active regions where transistors are to be formed. A silicon nitride film 3 and 3A is formed on the bottom and side faces of the CVD oxide film for element isolation, and the surface of silicon is exposed. Then an epitaxial layer 5 of silicon is selectively grown, and thus the element isolation is achieved. This simply prevents the anomalies in boundary shape caused by the reaction of a silicon oxide film and silicon due to high temperature during an epitaxial growth process.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device using a silicon oxide film for element isolation.

[0002]

2. Description of the Related Art A conventional semiconductor device using a silicon oxide film for element isolation will be described together with a manufacturing method with reference to the drawings.

First, as shown in FIG. 2 (a), a P-type silicon substrate 1 is thermally oxidized to grow a silicon oxide film 2A having a thickness of about 1 μm and then patterned to oxidize only a portion where an element is formed. The silicon film 2A is removed. Next, as shown in FIG. 2B, a thickness of 1 μm is formed in the element formation region.
The epitaxial layer 5A having a certain degree is selectively formed.

Next, as shown in FIG. 2C, an N well region 6 for forming a P channel transistor is formed on the silicon substrate 1 in which the elements are separated. Finally Figure 2
As shown in (d), the gate electrode 8, the source / drain 7, the interlayer insulating film 9, the aluminum wiring 10 and the like are formed on the element-isolated silicon substrate to form an N, P type device.

[0005]

In the semiconductor device using the above-mentioned conventional silicon oxide film for element isolation, the manufacturing process is long and complicated, and the oxidation for element isolation is caused by the high temperature during the epitaxial growth (1000 to 1300 ° C.). There is a problem that the silicon film and the silicon of the epitaxial layer react at a high temperature to generate a crystal defect on the growth layer side of the interface, which deteriorates characteristics such as junction leak current and lowers the reliability and yield of the semiconductor device.

[0006]

The semiconductor device of the present invention comprises:
In a semiconductor device using a silicon oxide film formed on a semiconductor substrate for element isolation, the element isolation silicon oxide film has a bottom surface and side surfaces covered with a silicon nitride film.

[0007]

The present invention will be described below with reference to the drawings. 1A to 1E are sectional views of a semiconductor chip for explaining an embodiment of the present invention.

First, as shown in FIG. 1A, a P-type silicon substrate 1 is thermally oxidized to a silicon oxide film 2 having a thickness of 30 nm.
On the entire surface, a silicon nitride film 3 is grown to a thickness of 30 nm by the CVD method, and then a silicon oxide film (CVD oxide film) 4 is formed thereon to a thickness of 1.0 μm.
Grow. Next, in order to remove the CVD oxide film 4 only in the portion where the diffusion layer is to be formed, a photoresist film 11 is applied and patterned.

Next, as shown in FIG. 1B, the CVD oxide film 4 only in the diffusion layer forming region is removed by anisotropic dry etching. At this time, the silicon nitride film 3 on the lower surface of the oxide film 4 serves as a mask to protect the silicon oxide film 2 on the lower surface of the silicon nitride film 3 and the silicon substrate 1 on the lower surface. Next, after removing the silicon nitride film 3 by wet etching, the silicon nitride film 3A is again formed by the LPCVD method.
Is grown to 30 nm.

Next, as shown in FIG. 1C, the grown silicon nitride film 3A is removed by anisotropic dry etching, and a silicon nitride film with a thickness of 30 nm is formed around the oxide film 4 for element isolation. Leave 3A as the side wall. Next, the silicon oxide film 2 in the diffusion layer forming region is removed by wet etching to expose the silicon surface.

Next, as shown in FIG. 1D, the thickness is 1 μm.
Element isolation is completed by selectively growing the epitaxial layer 5 of silicon to a certain extent.

Next, as shown in FIG. 1E, the photoresist film is used as a mask and phosphorus is used as an acceleration energy of 150 Kev.
Dose 1.0 × 10 ¹³ co / cm ² Ion implantation, 120
Annealing is performed for 8 h in an N ₂ —O ₂ atmosphere at 0 ° C. to form an N well region 6. Finally, on the silicon substrate, gate electrode 8, source / drain 7, interlayer insulating film 9, aluminum wiring 1
0 and the like are formed to form N and P type devices. According to the present example configured as described above, since the silicon nitride film is formed as a sidewall around the silicon oxide film for element isolation, the interface due to the reaction between the silicon oxide film and silicon at high temperature during epitaxial growth is formed. Abnormality of shape can be easily prevented.

[0013]

As described above, the present invention has a structure in which the silicon nitride film is provided on the bottom surface and the side surface of the silicon oxide film for element isolation, so that the reaction between the silicon oxide film and silicon can be prevented during the epitaxial growth. For this reason,
It is possible to prevent the abnormal shape of the silicon oxide film for element isolation and the deterioration of the junction leakage current characteristic, and improve the reliability and yield of the semiconductor device.

[Brief description of drawings]

FIG. 1 is a sectional view of a semiconductor chip for explaining an embodiment of the present invention.

FIG. 2 is a cross-sectional view of a semiconductor chip for explaining an example of a conventional semiconductor device.

[Explanation of symbols]

 1 Silicon Substrate 2, 2A Silicon Oxide Film 3 Silicon Nitride Film 4 CVD Oxide Film 5, 5A Epitaxial Layer 6 N Well Region 7 Source / Drain 8 Gate Electrode 9 Interlayer Insulation Film 10 Aluminum Wiring 11 Photoresist Film

Claims (1)

[Claims] 1. A semiconductor device using a silicon oxide film formed on a semiconductor substrate for element isolation, wherein the element isolation silicon oxide film has a bottom surface and side surfaces covered with a silicon nitride film. Semiconductor device.