JP3479393B2 - Method for manufacturing semiconductor device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention MOS (metal oxide / metal oxide) using all SOI substrates such as substrates
The present invention relates to a method for manufacturing a (silicon) transistor. 2. Description of the Related Art An LSI manufacturing process using an SOI substrate having a thin silicon active region (epitaxial silicon thin film) formed on an insulating film is excellent in low power consumption, high speed, suppression of a short channel effect, and the like. And is being developed worldwide as a process for the next generation, but there are some problems. One of the problems is a floating phenomenon of the substrate potential. That is, since hot carriers generated in the drain region have no escape place, they accumulate in the body region,
It is a problem that the withstand voltage between the source and the drain is lowered and the threshold voltage is changed. Therefore, a circuit that is easily affected by fluctuations in the substrate potential or a circuit that requires a high voltage needs a body contact for fixing the substrate potential. As a conventional technique, an MO using an SOI substrate is used.
The method for manufacturing the body contact of the S transistor is shown in FIG.
To the process shown in FIG. [0005] As shown in FIG.
The SOI substrate 100 is a substrate in which a thin silicon active region, that is, an epitaxial silicon thin film 12 is formed on an insulating substrate 11. This S
A silicon oxide film 13 is formed on the OI substrate 100, and a silicon nitride film 15 is further formed thereon. These are formed by a CVD (chemical vapor deposition) method. After forming a pattern of an element isolation region with a photoresist using photolithography, the silicon nitride film 15 and the silicon oxide film 13 in the opening of the photoresist are removed by dry etching. After removing the photoresist, a thick oxide film 17 is selectively formed at a high temperature using the patterned silicon nitride film 15 as a mask. This thick oxide film 17 is called a field oxide film, and plays a role of separating and insulating each element from one another. As shown in FIG. 10, the silicon nitride film 15 used as the mask and the silicon oxide film
3 is removed using photolithography and dry etching techniques so as to open an N-type region.
Phosphorus ions are implanted into the well region. By thermally diffusing the implanted phosphorus ions,
As shown in FIG. 11, an N ⁺ region is formed. As shown in FIG. 12, a resist 30 is formed on a region where a field oxide film is to be grown, a nitride film is formed on an opening, and then the resist is removed. Then, as shown in FIG. 13, a field oxide film 17 is grown. After the nitride film used to grow the field oxide film 17 is removed, a clean thin silicon oxide film 18 is newly formed as shown in FIG. 14, and a polycrystalline silicon film is further formed thereon by the CVD method. Grow and form. The gate electrode 19 is formed by patterning this polycrystalline silicon film. Thereafter, boron ions are implanted into the P well region, and a P ⁺ region is formed by thermal diffusion. As shown in FIG . 15, a thick oxide film (interlayer insulating film) 20 is formed by a CVD method after the element structure of the transistor is completed as described above. Thereafter, a contact hole is opened in the same manner as in the patterning for element isolation, and a wiring contact 21 is formed here. [0013] However, in the conventional process, a mask shift due to photolithography is likely to occur basically in the steps shown in FIG.
Problems and defects due to mask displacement become problems. Sand
That is, nitridation having an opening for forming N ⁺ region 12
The silicon film 15 and the underlying silicon thermal oxide film 13
When the mask is shifted, the N ⁺ region is formed shifted. This
Therefore, the N ⁺ region 12 serving as a contact region and the N ⁺ region 12
⁺ Region of a transistor formed adjacent to
A P ⁺ region serving as a drain region is formed as designed.
The problem is that the design margin cannot be obtained. In addition, the process is complicated and the production cost is increased. According to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising using an SOI (silicon on insulator) substrate having a thin silicon active region formed on an insulating substrate. Forming a thermal oxide film on the SOI substrate, forming a polycrystalline silicon film and a silicon nitride film on the thermal oxide film, and using the silicon nitride film as a mask. said doped with an impurity in the silicon active region through the polycrystalline silicon film, forming a contact region to contact of the silicon active region, after patterning the polycrystalline silicon film as the nitride
The patterned multi-layered silicon mask is used as a mask.
Thermal oxidation of the crystalline silicon film and the silicon film active area.
Forming a buried oxide film and a field oxide film separating the silicon active region; and, after removing the silicon nitride film, patterning the polycrystalline silicon film to form a gate electrode of a MOS transistor. Forming a source by doping the silicon active region.
A step of forming a drain region . In the present invention, a silicon oxide film, a polycrystalline silicon film as a first insulating layer, and a second Is formed as an insulating layer, and the silicon nitride film is patterned. Then, a polycrystalline silicon film of the first insulating layer appears. Then, since the polycrystalline silicon film appears as a region for taking body contact from the silicon active region, impurities are doped into the patterned region. After doping, the polycrystalline silicon film is thermally oxidized using the silicon nitride film as a mask to form a buried oxide film on the doping region. At this time, since the buried oxide film thermally oxidizes the polycrystalline silicon film, a thick buried oxide film can be formed, and the silicon nitride layer can be self-aligned. In addition, thermal oxidation of the field oxide film and the buried oxide film can be simultaneously performed to form a film. Further, the polycrystalline silicon film as the first insulating film can be used as a gate electrode of a MOS transistor. An embodiment of the present invention will be described with reference to FIGS. 1 to 6 and FIG. 1) As the substrate, 10
SOI substrate 1 having thin silicon active area 2
Use 00. 2) As shown in FIG. 1, the SOI substrate 10
A silicon thermal oxide film 3 of 200 ° is formed on the surface (on silicon active region 2),
A polycrystalline silicon film 4 and a 2000-degree silicon nitride film (second insulating layer) 5 on the polycrystalline silicon film (first insulating layer) 4 uniformly by CVD (chemical vapor deposition). It is formed by a method. 3) As shown in FIG. 2, patterning is performed using lithography and dry etching techniques so that the silicon nitride film 5 remains only in the transistor formation region. The field oxide film forming region is patterned by dry etching so that the polycrystalline silicon film 4 is exposed. 4) Boron ion implantation (50 Ke) using a photoresist pattern in the P-type impurity buried region.
V, 5 × 10 ¹⁴ / cm ³ ) and phosphorus ions are implanted into the N-type region (150 KeV, 5 × 10 ¹⁴ / cm ³ ) through the polycrystalline silicon film 4 into the lower thin silicon layer. At this time, as shown in FIG. 3, since there is a thick silicon nitride layer 5, the silicon active region 2 under this silicon nitride layer 5 is formed.
Is not implanted with impurities. 5) As shown in FIG. 4, an opening is formed with a resist only in a completely insulated field oxide region, and the polycrystalline silicon film 4 is removed by dry etching. 6) As shown in FIG. 5, using the silicon nitride film 5 as a mask, the polycrystalline silicon film 4 is thermally oxidized at 950 ° C. to form a buried oxide film 6 on the doping region. At this time, the buried oxide film 6 can be formed thick because the polycrystalline silicon film 4 is thermally oxidized, and the silicon nitride film 5 can be self-aligned. At the same time, oxidation of the field oxide film 7 is stopped on the insulating substrate 1 230.
Form up to 0 °. Thereafter, excessive oxidation is performed to form 3000 ° in the polycrystalline silicon film 4 region. In this case, thermal oxidation of the field oxide film 6 and the buried oxide film 7 can be simultaneously performed to form a film. 7) As shown in FIG. 6, the silicon nitride film 5 on the silicon active region 2 is removed, and the polycrystalline silicon film 4 is patterned to leave a part of the polycrystalline silicon film 4 as a gate electrode 9. . The source / drain region of the P-type MOS transistor is doped with boron ions. 8) An interlayer insulating film and a wiring contact are formed in the same manner as in the conventional process shown in FIG. 15, and the manufacture of the device is completed. According to the SOI-structure MOS transistor of the present invention, a method of manufacturing a body contact for controlling a substrate floating phenomenon can be realized by using a self-alignment method to prevent a mask from being displaced, to obtain a design margin, and to further improve the process. Can be reduced by simultaneously forming a field oxide film and a buried oxide film, or by using the gate electrode of a MOS transistor for the polycrystalline silicon layer of the first insulating film. Furthermore, since the buried oxide film is formed by thermally oxidizing the polycrystalline silicon layer,
A sufficiently thick oxide film can be formed, and is not easily affected by other stacked layers.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a process chart showing one embodiment of a method for manufacturing a semiconductor device of the present invention. FIG. 2 is a process chart showing one embodiment of a method for manufacturing a semiconductor device of the present invention. FIG. 3 is a process chart showing one embodiment of a method for manufacturing a semiconductor device of the present invention. FIG. 4 is a process chart showing one embodiment of a method for manufacturing a semiconductor device of the present invention. FIG. 5 is a process chart showing one embodiment of a method for manufacturing a semiconductor device of the present invention. FIG. 6 is a process chart showing one embodiment of a method for manufacturing a semiconductor device of the present invention. FIG. 7 is a process chart showing a conventional method for manufacturing a semiconductor device. FIG. 8 is a process chart showing a conventional method for manufacturing a semiconductor device. FIG. 9 is a process chart showing a conventional method for manufacturing a semiconductor device. FIG. 10 is a process chart showing a conventional method for manufacturing a semiconductor device. FIG. 11 is a process chart showing a conventional method for manufacturing a semiconductor device. FIG. 12 is a process chart showing a conventional method for manufacturing a semiconductor device. FIG. 13 is a process chart showing a conventional method for manufacturing a semiconductor device. FIG. 14 is a process chart showing a conventional method for manufacturing a semiconductor device. FIG. 15 is a process chart showing a conventional method for manufacturing a semiconductor device. [Description of Signs] 1 Insulating substrate 2 Silicon active region (epitaxial silicon thin film) 3 Silicon thermal oxide film 4 Polycrystalline silicon film (first insulating layer) 5 Silicon nitride film (second insulating layer) 6 Embedded oxide film 7 Field oxide film 9 Gate electrode 100 SOI substrate

Claims (1)

(1) A method of manufacturing a semiconductor device having a structure using an SOI (silicon-on-insulator) substrate in which a thin silicon active region is formed on an insulating substrate. Forming a thermal oxide film on the substrate, forming a polycrystalline silicon film and a silicon nitride film on the thermal oxide film, and using the silicon nitride film as a mask to pass through the polycrystalline silicon film to the silicon active region. the impurity is doped, forming a contact region to contact of the silicon active region, after patterning the polycrystalline silicon film, the nitrogen
The patterned multi-layered film using the silicon nitride film as a mask.
Thermally oxidizing the crystalline silicon film and the silicon film active region;
Forming a buried oxide film and a field oxide film for separating the silicon active region; and, after removing the silicon nitride film, patterning the polycrystalline silicon film to form a gate electrode of a MOS transistor. Forming a source drain by doping the silicon active region.
Forming a semiconductor device.