JPH11176880A - Manufacture of semiconductor device and carrying board - Google Patents
Manufacture of semiconductor device and carrying boardInfo
- Publication number
- JPH11176880A JPH11176880A JP34317497A JP34317497A JPH11176880A JP H11176880 A JPH11176880 A JP H11176880A JP 34317497 A JP34317497 A JP 34317497A JP 34317497 A JP34317497 A JP 34317497A JP H11176880 A JPH11176880 A JP H11176880A
- Authority
- JP
- Japan
- Prior art keywords
- adhesive
- heat
- wiring conductor
- resistant polymer
- transfer board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9212—Sequential connecting processes
- H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
- H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Wire Bonding (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は半導体装置の製造方
法及び搬送ボードに関するものである。[0001] 1. Field of the Invention [0002] The present invention relates to a method for manufacturing a semiconductor device and a transfer board.
【０００２】[0002]
【従来の技術】半導体装置はそれを使用する機器の小型
化から小さいパッケージが要望され、チップサイズのパ
ッケージが提案されている。2. Description of the Related Art A semiconductor device is required to have a small package due to miniaturization of a device using the semiconductor device, and a chip-sized package has been proposed.
【０００３】従来、この種の半導体装置は、ポリイミド
基材をリール状にしたテープあるいは単体又はシート状
のポリイミド基材を使用し、所定の導体パターン上に半
導体チップを接続し、液状樹脂を充填してパッケージン
グされている。その後、半導体チップと反対側の面に外
部接続のために半田ボールを取り付けたものもある。Conventionally, this type of semiconductor device uses a tape made of a polyimide base material in a reel form or a single or sheet-like polyimide base material, connects a semiconductor chip on a predetermined conductor pattern, and fills with a liquid resin. And have been packaged. After that, there is a case where a solder ball is attached to a surface opposite to the semiconductor chip for external connection.
【０００４】[0004]
【発明が解決しようとする課題】しかしながら、上記の
リール状のテープを使用する製造方法では、半導体チッ
プをリール状のテープに接続させ、液状樹脂で仮硬化さ
せて巻き取る際、半導体チップとテープの接続が剥がれ
てしまうという問題があった。However, in the above-described manufacturing method using a tape in a reel form, when the semiconductor chip is connected to the tape in a reel form and preliminarily cured with a liquid resin and wound up, the semiconductor chip and the tape are wound up. There is a problem that the connection is peeled off.
【０００５】また、単体又はシート状のものを使用して
組立てを行う場合は、ポリイミド基材が７５〜１２５μ
ｍと薄いため、樹脂硬化の際、反りやうねりが発生して
しまい、半導体チップの接続が不可能になることもあっ
た。In the case of assembling using a single or sheet-like material, the polyimide base material has a thickness of 75 to 125 μm.
Due to the small thickness of m, warping and undulation may occur during curing of the resin, making it impossible to connect the semiconductor chip.
【０００６】[0006]
【課題を解決するための手段】上記課題を解決するた
め、本発明は搬送ボード上に接着剤を塗布し、単体又は
シート状の耐熱ポリマー基板をその上に貼り付け、その
耐熱ポリマー基板に半導体チップを搭載し、配線処理を
した後、封止樹脂で封止し、封止樹脂が硬化した後、接
着剤を剥がして搬送ボードを取り除くようにしたもので
ある。In order to solve the above problems, the present invention applies an adhesive onto a carrier board, affixes a single or sheet heat-resistant polymer substrate thereon, and attaches a semiconductor to the heat-resistant polymer substrate. After mounting the chip and performing wiring processing, the chip is sealed with a sealing resin, and after the sealing resin is cured, the adhesive is peeled off to remove the transfer board.
【０００７】[0007]
【発明の実施の形態】図１は本発明の第１の実施形態の
製造工程を示す断面図である。FIG. 1 is a cross-sectional view showing a manufacturing process of a first embodiment of the present invention.
【０００８】搬送ボード１はステンレス鋼材、有機材
料、ガラス等の耐熱性材料で平面度を高く形成したもの
である。The transfer board 1 is made of a heat-resistant material such as stainless steel, organic material, glass or the like and has a high flatness.
【０００９】（ａ）に示したように、この搬送ボード１
上に、接着剤２を塗布する。接着剤２は紫外線照射又は
加熱により剥がれる材質のものが使用される。[0009] As shown in FIG.
The adhesive 2 is applied thereon. The adhesive 2 is made of a material that can be peeled off by ultraviolet irradiation or heating.
【００１０】（ｂ）においては、耐熱ポリマー基材例え
ばポリイミド基材３に配線導体４，５を形成した単位又
はシート状の耐熱ポリマー基板例えばポリイミド基板
を、接着材剤２により搬送ボード１上に平らに貼り付け
て固定する。なお、ポリイミド基材３には、配線導体５
を外部接続するための穴６が設けられている。In FIG. 1B, a unit in which wiring conductors 4 and 5 are formed on a heat-resistant polymer substrate such as a polyimide substrate 3 or a sheet-shaped heat-resistant polymer substrate such as a polyimide substrate is placed on the transfer board 1 with an adhesive 2. Paste flat and fix. The polyimide substrate 3 has a wiring conductor 5
Hole 6 for external connection.
【００１１】次に（ｃ）に示したように、内部接続端子
７が取り付けられている半導体チップ８をポリイミド基
板に搭載し、（ｄ）において内部接続端子７と配線導体
４を金−金接合又は導電性接着剤接合で接続した後、封
止樹脂９で封止する。加熱して封止樹脂９を硬化させた
後、紫外線照射又は加熱により接着剤２を剥がして
（ｅ）に示したように搬送ボード１を取り除き製品とす
る。Next, as shown in (c), a semiconductor chip 8 to which the internal connection terminal 7 is attached is mounted on a polyimide substrate, and in (d), the internal connection terminal 7 and the wiring conductor 4 are gold-gold bonded. Alternatively, after being connected by conductive adhesive bonding, sealing is performed with the sealing resin 9. After heating to cure the sealing resin 9, the adhesive 2 is peeled off by ultraviolet irradiation or heating, and the transfer board 1 is removed as shown in FIG.
【００１２】更に、その後、従来技術で説明したよう
に、外部接続のために穴６を利用して半田ボールを取り
付けても良い。Further, thereafter, as described in the prior art, solder balls may be attached using the holes 6 for external connection.
【００１３】上記したように第１の実施形態によれば、
平面度が高い搬送ボード１上にポリイミド基材３を接着
剤２により貼り付けて固定し、封止樹脂９の硬化後、搬
送ボード１を取り除くようにしたので、樹脂硬化の際に
ポリイミド基板の反りやうねりを無くすことができ、半
導体チップ８と配線導体４との接続不良を防ぐとともに
製造工程間の取扱いが容易になるという効果がある。As described above, according to the first embodiment,
The polyimide base material 3 is adhered and fixed on the transfer board 1 having a high flatness with the adhesive 2, and after the sealing resin 9 is cured, the transfer board 1 is removed. Warpage and undulation can be eliminated, and there is an effect that a connection failure between the semiconductor chip 8 and the wiring conductor 4 is prevented and handling between manufacturing processes is facilitated.
【００１４】図２は本発明の第２の実施形態の製造工程
を示す断面図で、図１と同じものには同じ符号を付して
ある。FIG. 2 is a sectional view showing a manufacturing process according to a second embodiment of the present invention, and the same components as those in FIG. 1 are denoted by the same reference numerals.
【００１５】（ａ）において、搬送ボード１の接着剤２
上の所定の位置に外部接続用の半田ボール１０及びフラ
ックス１１を搭載しておき、（ｂ）に示したようにポリ
イミド基材３に配線導体４，５が形成してあるポリイミ
ド基板を、半田ボール１０と穴６を位置合せして搬送ボ
ード１に平らに貼り付けて固定する。In FIG. 1A, the adhesive 2 of the transfer board 1 is used.
A solder ball 10 and a flux 11 for external connection are mounted at predetermined upper positions, and a polyimide substrate having wiring conductors 4 and 5 formed on a polyimide substrate 3 as shown in FIG. The ball 10 and the hole 6 are aligned, and the ball 10 is flatly attached to the transfer board 1 and fixed.
【００１６】次に（ｃ）に示したように、内部接続端子
７が取り付けられている半導体チップ８をポリイミド基
板に搭載する。Next, as shown in (c), the semiconductor chip 8 to which the internal connection terminals 7 are attached is mounted on a polyimide substrate.
【００１７】（ｄ）において内部接続端子７と配線導体
４を接続した後、封止樹脂９で封止する。高温雰囲気例
えば２２０℃以上で樹脂硬化させるとともに半田ボール
１０と配線導体５を半田接合させる。After connecting the internal connection terminal 7 and the wiring conductor 4 in (d), sealing is performed with a sealing resin 9. The resin is cured in a high-temperature atmosphere, for example, at 220 ° C. or higher, and the solder balls 10 and the wiring conductors 5 are joined by soldering.
【００１８】その後、（ｅ）に示したように接着剤２を
剥がして搬送ボード１を取り除いて製品とする。Thereafter, as shown in FIG. 3E, the adhesive 2 is peeled off, and the transfer board 1 is removed to obtain a product.
【００１９】上記したように、第２の実施形態によれ
ば、第１の実施形態の効果に加えて、外部接続用の半田
ボール１０を予め搭載してあるので、樹脂硬化と同時に
半田ボール１０と配線導体５の接続が可能になり、半田
ボール接続の１工程を削減でき、製造時間の短縮という
効果が得られる。As described above, according to the second embodiment, in addition to the effects of the first embodiment, since the solder balls 10 for external connection are mounted in advance, the solder balls 10 And the wiring conductor 5 can be connected, so that one step of solder ball connection can be reduced, and the effect of shortening the manufacturing time can be obtained.
【００２０】図３は本発明の第３の実施形態の製造工程
を示す断面図で、図２と同じものには同じ符号を付して
ある。FIG. 3 is a sectional view showing a manufacturing process according to a third embodiment of the present invention, and the same components as those in FIG. 2 are denoted by the same reference numerals.
【００２１】（ａ）において、搬送ボード１２の上面の
所定位置に、半田ボール１０を精度良く搭載するために
位置決めする凹部１３を設け、搬送ボード１２上に接着
剤２を塗布し、凹部１３の中に半田ボール１０を収容し
ておく。In FIG. 2A, a recess 13 is provided at a predetermined position on the upper surface of the transfer board 12 for positioning the solder ball 10 with high accuracy, and the adhesive 2 is applied onto the transfer board 12. The solder ball 10 is accommodated therein.
【００２２】（ｂ）においては、ポリイミド基材３に配
線導体４，５を形成したポリイミド基板を搬送ボード１
２に平らに貼り付けて固定する。In (b), a polyimide substrate having wiring conductors 4 and 5 formed on a polyimide substrate 3 is transferred to a transfer board 1.
Stick it flat on 2 and fix.
【００２３】（ｃ）においては、内部接続端子７を備え
た半導体チップ８をポリイミド基板に搭載する。In (c), a semiconductor chip 8 having internal connection terminals 7 is mounted on a polyimide substrate.
【００２４】（ｄ）においては、内部接続端子７と配線
導体４を接続した後、封止樹脂９で封止する。半田ボー
ル１０を接合するときは、（ｄ）の状態から上下を反転
させると半田ボール１０と配線導体５が接触するので、
高温で加熱することにより樹脂硬化させるとともに半田
接合することができる。In (d), after the internal connection terminal 7 and the wiring conductor 4 are connected, they are sealed with a sealing resin 9. When the solder ball 10 is joined, when the solder ball 10 is turned upside down from the state shown in FIG.
By heating at a high temperature, the resin can be cured and soldered.
【００２５】（ｅ）においては、封止樹脂９が硬化した
後、接着剤２を剥がして搬送ボード１２を取り除いて製
品とする。In (e), after the sealing resin 9 is cured, the adhesive 2 is peeled off, and the transfer board 12 is removed to obtain a product.
【００２６】上記したように、第３の実施形態によれ
ば、第２の実施形態の効果に加えて、搬送ボード１２に
外部接続用の半田ボール１０を位置決めする凹部１３を
設けたので、半田ボール１０を精度良く搬送ボード１２
に搭載できるという効果が得られる。As described above, according to the third embodiment, in addition to the effects of the second embodiment, the concave portion 13 for positioning the solder ball 10 for external connection is provided on the transfer board 12, so that the solder Transfer the ball 10 with high precision to the transfer board 12
The effect of being able to be mounted on is provided.
【００２７】図４は本発明の第４の実施形態の製造工程
を示す断面図である。図３と実質的に同様の工程は省略
してある。FIG. 4 is a sectional view showing a manufacturing process according to a fourth embodiment of the present invention. Steps substantially similar to those in FIG. 3 are omitted.
【００２８】（ａ）において、搬送ボード１４には半田
ボール１０の位置決め用凹部１５が所定位置に設けら
れ、更に凹部１５の下方にそれより小さい穴で、配線導
体５と半田ボール１０を半田接合するために熱風を通す
貫通穴１６が設けられている。In FIG. 3A, a concave portion 15 for positioning the solder ball 10 is provided at a predetermined position on the transfer board 14, and the wiring conductor 5 and the solder ball 10 are soldered with a smaller hole below the concave portion 15. For this purpose, a through hole 16 for passing hot air is provided.
【００２９】図３と同様に、搬送ボード１４に接着剤２
を塗布し、凹部１５に半田ボール１０を収容しておき、
ポリイミド基板を搬送ボード１４に貼り付けて固定し、
その上に半導体チップ８を搭載し、内部接続端子７と配
線導体４を接続した後、封止樹脂９で封止し硬化させ
る。組立完了後、搬送ボード１４の下面より貫通穴１６
を通して例えば２２０℃以上の熱風を吹き込み、半田ボ
ール１０の部分のみ局所加熱をして、配線導体５と半田
ボール１０を半田接合させる。In the same manner as in FIG.
Is applied, and the solder ball 10 is housed in the recess 15,
Paste the polyimide substrate on the transfer board 14 and fix it,
After mounting the semiconductor chip 8 thereon and connecting the internal connection terminal 7 and the wiring conductor 4, the semiconductor chip 8 is sealed with a sealing resin 9 and cured. After the assembly is completed, the through hole 16 is
For example, hot air of 220 ° C. or more is blown through the heater to locally heat only the portion of the solder ball 10, and the wiring conductor 5 and the solder ball 10 are joined by soldering.
【００３０】（ｂ）においては、接着剤２を剥がして搬
送ボード１４を取り除いて製品とする。In (b), the adhesive 2 is peeled off, and the transport board 14 is removed to obtain a product.
【００３１】上記したように、第４の実施形態によれ
ば、半田ボール１０の接続工程は必要であるが、第３の
実施形態の効果に加えて、貫通穴１６を通して局所加熱
により半田ボール１０の半田接合をするので、半導体チ
ップ８の熱破壊を防止できるという効果がある。As described above, according to the fourth embodiment, the step of connecting the solder balls 10 is necessary, but in addition to the effect of the third embodiment, the solder balls 10 are locally heated through the through holes 16. Is performed, so that there is an effect that thermal destruction of the semiconductor chip 8 can be prevented.
【００３２】[0032]
【発明の効果】上記したように、本発明は搬送ボードに
耐熱ポリマー基板を接着剤で貼り付け、封止樹脂が硬化
した後に接着剤を剥がして搬送ボードを取り除くので、
樹脂硬化の際に耐熱ポリマー基板に反りやうねりが発生
することがなく、半導体チップの接続不良を防ぐことが
できる。As described above, according to the present invention, the heat-resistant polymer substrate is attached to the transfer board with an adhesive, and after the sealing resin is cured, the adhesive is peeled off and the transfer board is removed.
When the resin is cured, the heat-resistant polymer substrate does not warp or undulate, thereby preventing poor connection of the semiconductor chip.
【図１】本発明の第１の実施形態を示す断面図FIG. 1 is a cross-sectional view showing a first embodiment of the present invention.
【図２】本発明の第２の実施形態を示す断面図FIG. 2 is a sectional view showing a second embodiment of the present invention.
【図３】本発明の第３の実施形態を示す断面図FIG. 3 is a sectional view showing a third embodiment of the present invention.
【図４】本発明の第４の実施形態を示す断面図FIG. 4 is a cross-sectional view showing a fourth embodiment of the present invention.
１，１２，１４ 搬送ボード ２ 接着剤 ３ ポリイミド基材 ４，５ 配線導体 ７ 内部接続端子 ８ 半導体チップ ９ 封止樹脂 １０ 半田ボール １３，１５ 凹部 １６ 貫通穴 1,12,14 Transfer board 2 Adhesive 3 Polyimide base material 4,5 Wiring conductor 7 Internal connection terminal 8 Semiconductor chip 9 Sealing resin 10 Solder ball 13,15 Concave part 16 Through hole
Claims (8)
状の耐熱ポリマー基板を前記接着剤により前記搬送ボー
ド上に貼り付けて固定し、 内部接続端子が取り付けられている半導体チップを前記
耐熱ポリマー基板に搭載し、 前記内部接続端子と前記配線導体を接続した後、封止樹
脂で封止し、 前記封止樹脂が硬化した後、前記接着剤を剥がして前記
搬送ボードを取り除くことを特徴とする半導体装置の製
造方法。An adhesive is applied onto a transfer board, and a single or sheet heat-resistant polymer substrate having a wiring conductor formed on a heat-resistant polymer base material is adhered and fixed on the transfer board with the adhesive. After mounting the semiconductor chip to which the connection terminal is mounted on the heat-resistant polymer substrate, connecting the internal connection terminal and the wiring conductor, sealing the chip with a sealing resin, curing the sealing resin, and bonding the semiconductor chip. A method of manufacturing a semiconductor device, comprising removing an agent and removing the transfer board.
状の耐熱ポリマー基板を前記接着剤により前記搬送ボー
ド上に貼り付けて固定し、 内部接続端子が取り付けられている半導体チップを前記
耐熱ポリマー基板に搭載し、 前記内部接続端子と前記配線導体を接続した後、封止樹
脂で封止し、 前記封止樹脂を硬化させるとともに前記半田ボールと前
記配線導体を半田接合し、 前記接着剤を剥がして前記搬送ボードを取り除くことを
特徴とする半導体装置の製造方法。2. A single or sheet heat-resistant polymer substrate having a wiring conductor formed on a heat-resistant polymer base material, wherein an adhesive is applied on a transfer board, and solder balls are mounted at predetermined positions on the adhesive. Affixing and fixing on the carrier board with the adhesive, mounting a semiconductor chip having an internal connection terminal mounted on the heat-resistant polymer substrate, connecting the internal connection terminal and the wiring conductor, and then sealing resin A method of manufacturing the semiconductor device, wherein the sealing resin is cured, the solder ball and the wiring conductor are joined by soldering, the adhesive is peeled off, and the transfer board is removed.
搬送ボード上に接着剤を塗布し、 前記凹部に半田ボールを収容しておき、 耐熱ポリマー基材に配線導体を形成した単体又はシート
状の耐熱ポリマー基板を前記接着剤により前記搬送ボー
ド上に貼り付けて固定し、 内部接続端子が取り付けられている半導体チップを前記
耐熱ポリマー基板に搭載し、 前記内部接続端子と前記配線導体を接続した後、封止樹
脂で封止し、 前記封止樹脂を硬化させるとともに前記半田ボールと前
記配線導体を半田接合し、 前記接着剤を剥がして前記搬送ボードを取り除くことを
特徴とする半導体装置の製造方法。3. An adhesive is applied onto a transfer board provided with a concave portion for positioning a solder ball, the solder ball is housed in the concave portion, and a single or sheet-like member having a wiring conductor formed on a heat-resistant polymer base material is provided. Affixing the heat-resistant polymer substrate on the carrier board with the adhesive, mounting the semiconductor chip to which the internal connection terminal is attached on the heat-resistant polymer substrate, and connecting the internal connection terminal and the wiring conductor And sealing the sealing resin, curing the sealing resin, joining the solder ball and the wiring conductor by solder, removing the adhesive, and removing the transfer board. .
部の下方に貫通穴を設けた搬送ボード上に接着剤を塗布
し、 前記凹部に半田ボールを収容しておき、 耐熱ポリマー基材に配線導体を形成した単体又はシート
状の耐熱ポリマー基板を前記接着剤により前記搬送ボー
ド上に貼り付けて固定し、 内部接続端子が取り付けられている半導体チップを前記
耐熱ポリマー基板に搭載し、 前記内部接続端子と前記配線導体を接続した後、封止樹
脂で封止し、 前記封止樹脂を硬化させ、 前記貫通穴を通して熱風により前記半田ボールと前記配
線導体を半田接合し、 前記接着剤を剥がして前記搬送ボードを取り除くことを
特徴とする半導体装置の製造方法。4. An adhesive is applied to a concave portion for positioning a solder ball and a carrier board provided with a through hole below the concave portion, the solder ball is housed in the concave portion, and a wiring conductor is formed on the heat-resistant polymer base material. A single or sheet-like heat-resistant polymer substrate formed with the adhesive is fixed on the carrier board by the adhesive, and a semiconductor chip having an internal connection terminal is mounted on the heat-resistant polymer substrate. After connecting the wiring conductor with the wiring conductor, sealing with a sealing resin, curing the sealing resin, solder bonding the solder ball and the wiring conductor by hot air through the through hole, peeling off the adhesive, and A method for manufacturing a semiconductor device, comprising removing a transfer board.
とを特徴とする請求項１から４のいずれかに記載の半導
体装置の製造方法。5. The method according to claim 1, wherein the heat-resistant polymer is polyimide.
剥がれる材質のものであることを特徴とする請求項１か
ら５のいずれかに記載の半導体装置の製造方法。6. The method for manufacturing a semiconductor device according to claim 1, wherein said adhesive is made of a material which can be peeled off by ultraviolet irradiation or heating.
ボードであって、 耐熱性の材料で平面度を高く形成し、配線導体と接続す
る半田ボールを位置決めする凹部を設けたことを特徴と
する搬送ボード。7. A transfer board used in a method of manufacturing a semiconductor device, wherein the transfer board is formed with a high degree of flatness using a heat-resistant material, and a concave portion for positioning a solder ball connected to a wiring conductor is provided. Transfer board.
田ボールを半田接合するために熱風を通すための貫通穴
を設けたことを特徴とする請求項７記載の搬送ボード。8. The carrier board according to claim 7, wherein a through hole is provided below said recess for allowing hot air to pass therethrough for solder-joining said wiring conductor and said solder ball.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP34317497A JP3711311B2 (en) | 1997-12-12 | 1997-12-12 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP34317497A JP3711311B2 (en) | 1997-12-12 | 1997-12-12 | Manufacturing method of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH11176880A true JPH11176880A (en) | 1999-07-02 |
| JP3711311B2 JP3711311B2 (en) | 2005-11-02 |
Family
ID=18359493
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP34317497A Expired - Fee Related JP3711311B2 (en) | 1997-12-12 | 1997-12-12 | Manufacturing method of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3711311B2 (en) |
-
1997
- 1997-12-12 JP JP34317497A patent/JP3711311B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP3711311B2 (en) | 2005-11-02 |
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