JP3711311B2 - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

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Publication number
JP3711311B2
JP3711311B2 JP34317497A JP34317497A JP3711311B2 JP 3711311 B2 JP3711311 B2 JP 3711311B2 JP 34317497 A JP34317497 A JP 34317497A JP 34317497 A JP34317497 A JP 34317497A JP 3711311 B2 JP3711311 B2 JP 3711311B2
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Japan
Prior art keywords
adhesive
heat
wiring conductor
resistant polymer
board
Prior art date
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Expired - Fee Related
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JP34317497A
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Japanese (ja)
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JPH11176880A (en
Inventor
良実 江川
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Oki Electric Industry Co Ltd
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Oki Electric Industry Co Ltd
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Priority to JP34317497A priority Critical patent/JP3711311B2/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9212—Sequential connecting processes
    • H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To prevent warp and waving when hardening a sealing resin, when a semiconductor device is assembled by using polyimide base material in the shape of a single body or a sheet. SOLUTION: A polyamide base material 2, wherein a wiring conductor 4 is formed on the polyimide base material 3, is attached and fixed to the upper part of a carrying board 1 by an adhesive agent 2. A semiconductor chip 8 is mounted on the base material. After the wiring process, the chip is sealed with sealing resin 9, and after the sealing resin 9 has hardened, the bonding agent 2 is peeled off, and the carrying board 1 is removed.

Description

【０００１】
【発明の属する技術分野】
本発明は半導体装置の製造方法に関するものである。
【０００２】
【従来の技術】
半導体装置はそれを使用する機器の小型化から小さいパッケージが要望され、チップサイズのパッケージが提案されている。
【０００３】
従来、この種の半導体装置は、ポリイミド基材をリール状にしたテープあるいは単体又はシート状のポリイミド基材を使用し、所定の導体パターン上に半導体チップを接続し、液状樹脂を充填してパッケージングされている。その後、半導体チップと反対側の面に外部接続のために半田ボールを取り付けたものもある。
【０００４】
【発明が解決しようとする課題】
しかしながら、上記のリール状のテープを使用する製造方法では、半導体チップをリール状のテープに接続させ、液状樹脂で仮硬化させて巻き取る際、半導体チップとテープの接続が剥がれてしまうという問題があった。
【０００５】
また、単体又はシート状のものを使用して組立てを行う場合は、ポリイミド基材が７５〜１２５μｍと薄いため、樹脂硬化の際、反りやうねりが発生してしまい、半導体チップの接続が不可能になることもあった。
【０００６】
【課題を解決するための手段】
上記課題を解決するため、本発明は搬送ボード上に接着剤を塗布し、単体又はシート状の耐熱ポリマー基板をその上に貼り付け、その耐熱ポリマー基板に半導体チップを搭載し、配線処理をした後、封止樹脂で封止し、封止樹脂が硬化した後、接着剤を剥がして搬送ボードを取り除くようにしたものである。
【０００７】
【発明の実施の形態】
図１は本発明の第１の実施形態の製造工程を示す断面図である。
【０００８】
搬送ボード１はステンレス鋼材、有機材料、ガラス等の耐熱性材料で平面度を高く形成したものである。
【０００９】
（ａ）に示したように、この搬送ボード１上に、接着剤２を塗布する。接着剤２は紫外線照射又は加熱により剥がれる材質のものが使用される。
【００１０】
（ｂ）においては、耐熱ポリマー基材例えばポリイミド基材３に配線導体４，５を形成した単体又はシート状の耐熱ポリマー基板例えばポリイミド基板を、接着剤２により搬送ボード１上に平らに貼り付けて固定する。なお、ポリイミド基材３には、配線導体５を外部接続するための穴６が設けられている。
【００１１】
次に（ｃ）に示したように、内部接続端子７が取り付けられている半導体チップ８をポリイミド基板に搭載し、（ｄ）において内部接続端子７と配線導体４を金−金接合又は導電性接着剤接合で接続した後、封止樹脂９で封止する。加熱して封止樹脂９を硬化させた後、紫外線照射又は加熱により接着剤２を剥がして（ｅ）に示したように搬送ボード１を取り除き製品とする。
【００１２】
更に、その後、従来技術で説明したように、外部接続のために穴６を利用して半田ボールを取り付けても良い。
【００１３】
上記したように第１の実施形態によれば、平面度が高い搬送ボード１上にポリイミド基材３を接着剤２により貼り付けて固定し、封止樹脂９の硬化後、搬送ボード１を取り除くようにしたので、樹脂硬化の際にポリイミド基板の反りやうねりを無くすことができ、半導体チップ８と配線導体４との接続不良を防ぐとともに製造工程間の取扱いが容易になるという効果がある。
【００１４】
図２は本発明の第２の実施形態の製造工程を示す断面図で、図１と同じものには同じ符号を付してある。
【００１５】
（ａ）において、搬送ボード１の接着剤２上の所定の位置に外部接続用の半田ボール１０及びフラックス１１を搭載しておき、（ｂ）に示したようにポリイミド基材３に配線導体４，５が形成してあるポリイミド基板を、半田ボール１０と穴６を位置合せして搬送ボード１に平らに貼り付けて固定する。
【００１６】
次に（ｃ）に示したように、内部接続端子７が取り付けられている半導体チップ８をポリイミド基板に搭載する。
【００１７】
（ｄ）において内部接続端子７と配線導体４を接続した後、封止樹脂９で封止する。高温雰囲気例えば２２０℃以上で樹脂硬化させるとともに半田ボール１０と配線導体５を半田接合させる。
【００１８】
その後、（ｅ）に示したように接着剤２を剥がして搬送ボード１を取り除いて製品とする。
【００１９】
上記したように、第２の実施形態によれば、第１の実施形態の効果に加えて、外部接続用の半田ボール１０を予め搭載してあるので、樹脂硬化と同時に半田ボール１０と配線導体５の接続が可能になり、半田ボール接続の１工程を削減でき、製造時間の短縮という効果が得られる。
【００２０】
図３は本発明の第３の実施形態の製造工程を示す断面図で、図２と同じものには同じ符号を付してある。
【００２１】
（ａ）において、搬送ボード１２の上面の所定位置に、半田ボール１０を精度良く搭載するために位置決めする凹部１３を設け、搬送ボード１２上に接着剤２を塗布し、凹部１３の中に半田ボール１０を収容しておく。
【００２２】
（ｂ）においては、ポリイミド基材３に配線導体４，５を形成したポリイミド基板を搬送ボード１２に平らに貼り付けて固定する。
【００２３】
（ｃ）においては、内部接続端子７を備えた半導体チップ８をポリイミド基板に搭載する。
【００２４】
（ｄ）においては、内部接続端子７と配線導体４を接続した後、封止樹脂９で封止する。半田ボール１０を接合するときは、（ｄ）の状態から上下を反転させると半田ボール１０と配線導体５が接触するので、高温で加熱することにより樹脂硬化させるとともに半田接合することができる。
【００２５】
（ｅ）においては、封止樹脂９が硬化した後、接着剤２を剥がして搬送ボード１２を取り除いて製品とする。
【００２６】
上記したように、第３の実施形態によれば、第２の実施形態の効果に加えて、搬送ボード１２に外部接続用の半田ボール１０を位置決めする凹部１３を設けたので、半田ボール１０を精度良く搬送ボード１２に搭載できるという効果が得られる。
【００２７】
図４は本発明の第４の実施形態の製造工程を示す断面図である。図３と実質的に同様の工程は省略してある。
【００２８】
（ａ）において、搬送ボード１４には半田ボール１０の位置決め用凹部１５が所定位置に設けられ、更に凹部１５の下方にそれより小さい穴で、配線導体５と半田ボール１０を半田接合するために熱風を通す貫通穴１６が設けられている。
【００２９】
図３と同様に、搬送ボード１４に接着剤２を塗布し、凹部１５に半田ボール１０を収容しておき、ポリイミド基板を搬送ボード１４に貼り付けて固定し、その上に半導体チップ８を搭載し、内部接続端子７と配線導体４を接続した後、封止樹脂９で封止し硬化させる。組立完了後、搬送ボード１４の下面より貫通穴１６を通して例えば２２０℃以上の熱風を吹き込み、半田ボール１０の部分のみ局所加熱をして、配線導体５と半田ボール１０を半田接合させる。
【００３０】
（ｂ）においては、接着剤２を剥がして搬送ボード１４を取り除いて製品とする。
【００３１】
上記したように、第４の実施形態によれば、半田ボール１０の接続工程は必要であるが、第３の実施形態の効果に加えて、貫通穴１６を通して局所加熱により半田ボール１０の半田接合をするので、半導体チップ８の熱破壊を防止できるという効果がある。
【００３２】
【発明の効果】
上記したように、本発明は搬送ボードに耐熱ポリマー基板を接着剤で貼り付け、封止樹脂が硬化した後に接着剤を剥がして搬送ボードを取り除くので、樹脂硬化の際に耐熱ポリマー基板に反りやうねりが発生することがなく、半導体チップの接続不良を防ぐことができる。
【図面の簡単な説明】
【図１】本発明の第１の実施形態を示す断面図
【図２】本発明の第２の実施形態を示す断面図
【図３】本発明の第３の実施形態を示す断面図
【図４】本発明の第４の実施形態を示す断面図
【符号の説明】
１，１２，１４ 搬送ボード
２ 接着剤
３ ポリイミド基材
４，５ 配線導体
７ 内部接続端子
８ 半導体チップ
９ 封止樹脂
１０ 半田ボール
１３，１５ 凹部
１６ 貫通穴[0001]
BACKGROUND OF THE INVENTION
The present invention relates to the production how the semiconductor device.
[0002]
[Prior art]
A semiconductor device is required to have a small package due to miniaturization of equipment using the semiconductor device, and a chip size package has been proposed.
[0003]
Conventionally, this type of semiconductor device uses a tape having a polyimide base material in a reel shape or a single or sheet-like polyimide base material, a semiconductor chip is connected on a predetermined conductor pattern, and a liquid resin is filled into the package. Have been After that, some solder balls are attached to the surface opposite to the semiconductor chip for external connection.
[0004]
[Problems to be solved by the invention]
However, in the manufacturing method using the reel-shaped tape, there is a problem that when the semiconductor chip is connected to the reel-shaped tape and temporarily cured with a liquid resin and wound up, the connection between the semiconductor chip and the tape is peeled off. there were.
[0005]
In addition, when assembling using a single or sheet-like material, the polyimide base material is as thin as 75 to 125 μm, which causes warping and undulation during resin curing, making it impossible to connect semiconductor chips. Sometimes it became.
[0006]
[Means for Solving the Problems]
In order to solve the above-mentioned problems, the present invention applies an adhesive on a transport board, attaches a single or sheet-like heat-resistant polymer substrate thereon, mounts a semiconductor chip on the heat-resistant polymer substrate, and performs wiring processing. Then, after sealing with sealing resin and hardening | curing sealing resin, an adhesive agent is peeled and a conveyance board is removed.
[0007]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is a cross-sectional view showing the manufacturing process of the first embodiment of the present invention.
[0008]
The conveyance board 1 is made of a heat-resistant material such as a stainless steel material, an organic material, or glass and has a high flatness.
[0009]
As shown to (a), the adhesive agent 2 is apply | coated on this conveyance board 1. FIG. The adhesive 2 is made of a material that can be peeled off by ultraviolet irradiation or heating.
[0010]
In (b), a single body or sheet-like heat-polymer substrate, for example a polyimide substrate to form a wiring conductor 4 and 5 heat the polymer substrate such as polyimide substrate 3, flat on the transport board 1 by adhesives 2 Paste and fix. The polyimide substrate 3 is provided with holes 6 for connecting the wiring conductor 5 to the outside.
[0011]
Next, as shown in (c), the semiconductor chip 8 to which the internal connection terminal 7 is attached is mounted on a polyimide substrate, and in (d), the internal connection terminal 7 and the wiring conductor 4 are joined by gold-gold bonding or conductivity. After connecting by adhesive bonding, sealing is performed with a sealing resin 9. After the sealing resin 9 is cured by heating, the adhesive 2 is peeled off by ultraviolet irradiation or heating to remove the transport board 1 as shown in FIG.
[0012]
Further, as described in the prior art, solder balls may be attached using the holes 6 for external connection.
[0013]
As described above, according to the first embodiment, the polyimide base material 3 is adhered and fixed to the transport board 1 having high flatness with the adhesive 2, and after the sealing resin 9 is cured, the transport board 1 is removed. Since it did in this way, the curvature and waviness of a polyimide board | substrate can be eliminated at the time of resin hardening, and it has the effect that the connection between a semiconductor chip 8 and the wiring conductor 4 is prevented, and the handling between manufacturing processes becomes easy.
[0014]
FIG. 2 is a cross-sectional view showing the manufacturing process of the second embodiment of the present invention, and the same components as those in FIG.
[0015]
In (a), solder balls 10 and fluxes 11 for external connection are mounted at predetermined positions on the adhesive 2 of the transport board 1, and the wiring conductor 4 is placed on the polyimide base 3 as shown in (b). , 5 are fixed on the transfer board 1 by aligning the solder balls 10 and the holes 6 and fixing them.
[0016]
Next, as shown in (c), the semiconductor chip 8 to which the internal connection terminals 7 are attached is mounted on the polyimide substrate.
[0017]
In (d), the internal connection terminal 7 and the wiring conductor 4 are connected and then sealed with a sealing resin 9. The resin is cured in a high temperature atmosphere, for example, 220 ° C. or more, and the solder ball 10 and the wiring conductor 5 are soldered.
[0018]
Thereafter, as shown in (e), the adhesive 2 is peeled off and the transfer board 1 is removed to obtain a product.
[0019]
As described above, according to the second embodiment, in addition to the effects of the first embodiment, the solder ball 10 for external connection is mounted in advance. 5 can be connected, one process of solder ball connection can be reduced, and the effect of shortening the manufacturing time can be obtained.
[0020]
FIG. 3 is a cross-sectional view showing the manufacturing process of the third embodiment of the present invention, and the same components as those in FIG.
[0021]
In (a), a recess 13 for positioning the solder ball 10 with high accuracy is provided at a predetermined position on the upper surface of the transport board 12, the adhesive 2 is applied on the transport board 12, and the solder is placed in the recess 13. The ball 10 is accommodated.
[0022]
In (b), a polyimide substrate in which the wiring conductors 4 and 5 are formed on the polyimide base material 3 is flatly attached to the transport board 12 and fixed.
[0023]
In (c), the semiconductor chip 8 provided with the internal connection terminals 7 is mounted on a polyimide substrate.
[0024]
In (d), the internal connection terminal 7 and the wiring conductor 4 are connected and then sealed with a sealing resin 9. When the solder ball 10 is joined, the solder ball 10 and the wiring conductor 5 come into contact with each other when the solder ball 10 is turned upside down from the state (d), so that the resin can be cured and soldered by heating at a high temperature.
[0025]
In (e), after the sealing resin 9 is cured, the adhesive 2 is peeled off and the transport board 12 is removed to obtain a product.
[0026]
As described above, according to the third embodiment, in addition to the effects of the second embodiment, the recess 13 for positioning the solder ball 10 for external connection is provided on the transfer board 12, so that the solder ball 10 is The effect that it can mount in the conveyance board 12 with sufficient precision is acquired.
[0027]
FIG. 4 is a cross-sectional view showing the manufacturing process of the fourth embodiment of the present invention. Steps substantially similar to those in FIG. 3 are omitted.
[0028]
In (a), the transfer board 14 is provided with a positioning recess 15 for the solder ball 10 at a predetermined position, and further for soldering the wiring conductor 5 and the solder ball 10 with a smaller hole below the recess 15. A through hole 16 through which hot air passes is provided.
[0029]
As in FIG. 3, the adhesive 2 is applied to the transport board 14, the solder balls 10 are accommodated in the recesses 15, a polyimide substrate is attached and fixed to the transport board 14, and the semiconductor chip 8 is mounted thereon. Then, after connecting the internal connection terminal 7 and the wiring conductor 4, it is sealed with a sealing resin 9 and cured. After the assembly is completed, hot air of, for example, 220 ° C. or more is blown from the lower surface of the transfer board 14 through the through hole 16 to locally heat only the solder ball 10 portion, and the wiring conductor 5 and the solder ball 10 are soldered.
[0030]
In (b), the adhesive 2 is peeled off and the transport board 14 is removed to obtain a product.
[0031]
As described above, according to the fourth embodiment, the connecting process of the solder balls 10 is necessary. In addition to the effects of the third embodiment, the solder balls 10 are joined by local heating through the through holes 16. Therefore, there is an effect that the thermal destruction of the semiconductor chip 8 can be prevented.
[0032]
【The invention's effect】
As described above, the present invention attaches a heat-resistant polymer substrate to the transport board with an adhesive, and after the sealing resin is cured, the adhesive is peeled off to remove the transport board. Swelling does not occur and connection failure of the semiconductor chip can be prevented.
[Brief description of the drawings]
FIG. 1 is a sectional view showing a first embodiment of the present invention. FIG. 2 is a sectional view showing a second embodiment of the present invention. FIG. 3 is a sectional view showing a third embodiment of the present invention. 4 is a cross-sectional view showing a fourth embodiment of the present invention.
1, 12, 14 Transport board 2 Adhesive 3 Polyimide substrate 4, 5 Wiring conductor 7 Internal connection terminal 8 Semiconductor chip 9 Sealing resin 10 Solder balls 13, 15 Recess 16 Through hole

Claims (4)

搬送ボード上に接着剤を塗布し、
耐熱ポリマー基材に配線導体を形成した単体又はシート状の耐熱ポリマー基板を前記接着剤により前記搬送ボード上に貼り付けて固定して、前記耐熱ポリマー基板の少なくとも半導体チップ搭載領域を前記搬送ボード上に前記接着剤を介して固定し、
内部接続端子が取り付けられている半導体チップを前記耐熱ポリマー基板の前記半導体チップ搭載領域に搭載し、
前記内部接続端子と前記配線導体を接続した後、封止樹脂で封止し、
前記封止樹脂が硬化した後、前記接着剤を剥がして前記搬送ボードを取り除くことを特徴とする半導体装置の製造方法。Apply adhesive on the transfer board,
A single-piece or sheet-like heat-resistant polymer substrate in which a wiring conductor is formed on a heat-resistant polymer base material is attached and fixed onto the transport board with the adhesive , and at least a semiconductor chip mounting region of the heat-resistant polymer substrate is placed on the transport board. Fixed through the adhesive,
A semiconductor chip to which an internal connection terminal is attached is mounted on the semiconductor chip mounting region of the heat-resistant polymer substrate,
After connecting the internal connection terminal and the wiring conductor, sealing with a sealing resin,
After the sealing resin is cured, the adhesive board is peeled off to remove the transfer board. 搬送ボード上に接着剤を塗布し、
前記接着剤上の所定位置に半田ボールを搭載しておき、
耐熱ポリマー基材に配線導体を形成した単体又はシート状の耐熱ポリマー基板を前記接着剤により前記搬送ボード上に貼り付けて固定し、
内部接続端子が取り付けられている半導体チップを前記耐熱ポリマー基板に搭載し、
前記内部接続端子と前記配線導体を接続した後、封止樹脂で封止し、
前記封止樹脂を硬化させるとともに前記半田ボールと前記配線導体を半田接合し、
前記接着剤を剥がして前記搬送ボードを取り除くことを特徴とする半導体装置の製造方法。Apply adhesive on the transfer board,
A solder ball is mounted at a predetermined position on the adhesive,
A single-piece or sheet-like heat-resistant polymer substrate in which a wiring conductor is formed on a heat-resistant polymer base material is fixed on the transport board by the adhesive, and fixed.
A semiconductor chip to which internal connection terminals are attached is mounted on the heat-resistant polymer substrate,
After connecting the internal connection terminal and the wiring conductor, sealing with a sealing resin,
Curing the sealing resin and soldering the solder ball and the wiring conductor;
A method of manufacturing a semiconductor device, wherein the adhesive is removed to remove the transfer board. 半田ボールを位置決めする凹部を設けた搬送ボード上に接着剤を塗布し、
前記凹部に半田ボールを収容しておき、
耐熱ポリマー基材に配線導体を形成した単体又はシート状の耐熱ポリマー基板を前記接着剤により前記搬送ボード上に貼り付けて固定し、
内部接続端子が取り付けられている半導体チップを前記耐熱ポリマー基板に搭載し、
前記内部接続端子と前記配線導体を接続した後、封止樹脂で封止し、
前記封止樹脂を硬化させるとともに前記半田ボールと前記配線導体を半田接合し、
前記接着剤を剥がして前記搬送ボードを取り除くことを特徴とする半導体装置の製造方法。Apply an adhesive on the transfer board with a recess to position the solder ball,
A solder ball is accommodated in the recess,
A single-piece or sheet-like heat-resistant polymer substrate in which a wiring conductor is formed on a heat-resistant polymer base material is fixed on the transport board by the adhesive, and fixed.
A semiconductor chip to which internal connection terminals are attached is mounted on the heat-resistant polymer substrate,
After connecting the internal connection terminal and the wiring conductor, sealing with a sealing resin,
Curing the sealing resin and soldering the solder ball and the wiring conductor;
A method of manufacturing a semiconductor device, wherein the adhesive is removed to remove the transfer board. 半田ボールを位置決めする凹部と前記凹部の下方に貫通穴を設けた搬送ボード上に接着剤を塗布し、
前記凹部に半田ボールを収容しておき、
耐熱ポリマー基材に配線導体を形成した単体又はシート状の耐熱ポリマー基板を前記接着剤により前記搬送ボード上に貼り付けて固定し、
内部接続端子が取り付けられている半導体チップを前記耐熱ポリマー基板に搭載し、
前記内部接続端子と前記配線導体を接続した後、封止樹脂で封止し、
前記封止樹脂を硬化させ、
前記貫通穴を通して熱風により前記半田ボールと前記配線導体を半田接合し、
前記接着剤を剥がして前記搬送ボードを取り除くことを特徴とする半導体装置の製造方法。Applying an adhesive on a concave board for positioning the solder ball and a transport board provided with a through hole below the concave section,
A solder ball is accommodated in the recess,
A single-piece or sheet-like heat-resistant polymer substrate in which a wiring conductor is formed on a heat-resistant polymer base material is fixed on the transport board by the adhesive, and fixed.
A semiconductor chip to which internal connection terminals are attached is mounted on the heat-resistant polymer substrate,
After connecting the internal connection terminal and the wiring conductor, sealing with a sealing resin,
Curing the sealing resin,
Soldering the solder ball and the wiring conductor with hot air through the through hole,
A method of manufacturing a semiconductor device, wherein the adhesive is removed to remove the transfer board.
JP34317497A 1997-12-12 1997-12-12 Manufacturing method of semiconductor device Expired - Fee Related JP3711311B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP34317497A JP3711311B2 (en) 1997-12-12 1997-12-12 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP34317497A JP3711311B2 (en) 1997-12-12 1997-12-12 Manufacturing method of semiconductor device

Publications (2)

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JPH11176880A JPH11176880A (en) 1999-07-02
JP3711311B2 true JP3711311B2 (en) 2005-11-02

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