JPH11129480A - Recording head and recorder using the head - Google Patents

Abstract

PROBLEM TO BE SOLVED: To stably discharge an ink even at the time of generating a large current by separately wiring a ground terminal of a first inverter and a ground terminal of a driving circuit, thereby reducing an adverse influence of a voltage noise of a GND line of a voltage converter. SOLUTION: A large current of about several amperes flows from a power source line 125, and flows through a heater 121 and a power transistor 122 to a GND line 130 as it is. In this case, a GND terminal 170 of an inverter each having a resistor 162 and a MOS transistor 163 is disconnected from the line 130 in which the current of the transistor 122 flows, externally led via another wirings to a GND voltage which is not affected by an influence of a voltage noise or connected to another power source to avoid an introduction of the noise generated at the line 130 to a front stage inverter of a voltage converter 161. Thus, even if a plurality of heaters are simultaneously turned ON, a stable ink discharge can be performed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a recording head for recording on a recording medium by discharging ink in accordance with an ink jet system, and a recording apparatus using the recording head.

[0002]

2. Description of the Related Art FIG. 3 shows a circuit configuration of a conventional ink jet recording head. The electrothermal transducer (heater) of the recording head and its driving circuit as shown in FIG. 3 are formed on the same substrate by using a semiconductor process technique as disclosed in, for example, Japanese Patent Application Laid-Open No. 5-185594. I have.

[0003] As shown in FIG. 3, reference numeral 401 denotes an electrothermal conversion element (heater) for generating thermal energy.
Reference numeral 2 denotes a power transistor for supplying a desired current to the heater 401, and reference numeral 424 denotes a power transistor for supplying a current to each heater 401 and temporarily stores image data for determining whether or not to eject ink from a nozzle portion of the print head. A shift register for storing, 427 is a transfer clock input terminal for inputting a transfer clock signal CLK provided in the shift register 424, and 426 is image data input for serially inputting image data DATA for turning on / off the heater 401. A terminal 423 is a latch circuit for recording and holding image data for each heater for each heater.
Reference numeral 28 denotes a latch signal input terminal for inputting a latch signal LT for controlling the latch timing of the latch circuit 423. Reference numeral 429 denotes a switch for determining the timing at which current flows to the heater 401. Reference numeral 425 denotes a current applied by applying a predetermined voltage to the heater. 430 is a GND line into which a current flowing through the heater 401 and the power transistor 422 flows.

The number of bits of image data stored in the shift register 424, the number of power transistors 422, and the number of heaters 401 are the same.

FIG. 4 is a timing chart of various signals for driving the recording head drive circuit shown in FIG. With reference to FIG. 4, the driving circuit of the recording head shown in FIG. 3 will be described.

The transfer clock signal CLK for the number of bits of the image data DATA stored in the shift register 424 is input to the transfer clock input terminal 427.

Data transfer to shift register 424 is performed in synchronization with the rise of transfer clock signal CLK.
Image data DATA for turning on / off each heater 401 is input from an image data input terminal 426.
Here, since the number of bits of the image data DATA stored in the shift register 424 is the same as the number of the heaters 410 and the power transistors 422, the pulses of the transfer clock signal CLK are inputted by the number of the heaters 401 and the image data is inputted. After transferring DATA to shift register 424,
The latch signal LT is supplied to the latch signal input terminal 428, and the latch circuit 423 holds the image data DATA corresponding to each heater 401.

After that, the switch 429 is turned on for an appropriate time.
In this case, a current flows from the power supply line 425 to the power transistor 422 and the heater 401 in accordance with the period during which the switch 429 is ON, and the current flows into the GND line 430. At this time, the heater 401 generates heat necessary to discharge the ink, and the ink corresponding to the image data is discharged from the nozzles of the recording head.

The circuit configuration described above has already been disclosed in Japanese Unexamined Patent Application Publication No.
No. 08536, a circuit configuration shown in FIG. 5 has been proposed as an improved version of the circuit configuration shown in FIG.

[0010] As shown in FIG.
01 is a power transistor for supplying a desired current, and an nMOS transistor is used. FIG.
The power transistor shown in FIG.
Although a PN transistor is used, in such a circuit configuration, a CMOS gate is usually used for a so-called logic circuit such as a shift register or a latch circuit. At the same time, a Bi-CMOS process is used to form an NPN transistor. Will be used. However, Bi-CMO
The S process has the disadvantage that the number of masks required for the process is large and expensive. Therefore, if an nMOS transistor is used instead of an NPN transistor as a power transistor, it can be manufactured at a relatively low cost because it can be manufactured by the same process as a logic circuit. What has been described above is the circuit configuration of the recording head manufactured by the so-called CMOS process.

Further, a circuit configuration shown in FIG. 6 is proposed in Japanese Patent Application No. 8-197241 as an improved type of a circuit configuration of a recording head using the CMOS process.

Generally, the drivability of an nMOS transistor is improved by increasing the gate voltage.
However, the signal applied to the CMOS logic circuit is 0 V /
Since this is a digital signal in which 5 V is Lo / Hi, nM
Even if a Hi signal of 5 V is directly applied to the gate of the OS power transistor, there is a problem that sufficient drivability cannot be obtained. In order to improve the drivability of the nMOS power transistor, it has been proposed to provide a voltage conversion circuit 451 shown in FIG.

Here, reference numeral 452 denotes a voltage conversion circuit 451.
453 is an nMOS transistor having a drain connected to the resistor 452,
Reference numerals 4 and 455 denote a pMOS transistor and an nMOS transistor, respectively, which constitute a CMOS inverter circuit. Reference numeral 456 denotes a power supply line of the voltage conversion circuit 451. Reference numeral 430 denotes a GND line into which a current flowing through the heater 401 and the power transistor 440 flows. G
The ND line 430 is commonly connected to the sources of the nMOS transistors 453 and 455 of the voltage conversion circuit 456. The conventional technique shown in FIG. 6 operates in the same manner as the timing chart shown in FIG.

The shift register 424 and the latch circuit 42
Reference numeral 3 generally comprises a CMOS gate, and receives a clock signal CLK, image data DATA,
The latch signals LT and the like all have a signal amplitude of 0V / 5V. For this reason, the power supply voltage of the latch circuit 423 is often 5V. Therefore, the output of the latch circuit 423 becomes H
It becomes 5V at the time of i. The voltage of 5V is applied to the switch 42.
When the voltage is applied to the gate of the nMOS transistor 453 via 9, the nMOS transistor 453 is turned on, so that a current flows through the resistor 452. Here, if the value of the resistor 452 is set to a value sufficiently higher than the ON resistance of the nMOS transistor 453, a voltage close to 0 V is applied to the gate of the next-stage CMOS inverter circuit without limit, and the nMOS The gate of the transistor 454 can be set to the Lo state. Then, the output at the connection between the nMOS transistor 454 and the pMOS transistor 455 becomes Hi, and the voltage level is the voltage of the power supply line 456 as it is, and is supplied to the gate of the power transistor 440. That is, when the output of the latch circuit 423 is Hi, the power transistor 4
The voltage of the power supply line 456 is applied to the gate of
In the N state, a current flows through the heater 401 to perform printing by ink ejection. If the voltage of the power supply line 456 is set to a voltage higher than 5V which is the power supply voltage of the shift register circuit 424 and the latch circuit 423, the drivability of the power transistor 440 can be improved accordingly.

[0015]

However, in the prior art, the resistor 452 in the preceding stage in the voltage conversion circuit 451 is not used.
And the threshold voltage of the inverter circuit composed of the nMOS transistor 453 is substantially determined by the threshold voltage Vth of the nMOS transistor 453. Normal,
Since the manufacturing process is controlled so that the threshold voltage Vth of the nMOS transistor is set to about 0.6 to 1.0 V, the threshold value of the preceding inverter circuit is set to a low value of 0.6 to 1.0 V. Is set. On the other hand, in shift register circuits and latch circuits, CM
Since a logic circuit is formed by the OS gate, the threshold voltage is about 1/2 of the power supply voltage, that is, about 2.5 V when the power supply voltage is 5 V. That is, the fact that the threshold value of the inverter circuit preceding the voltage conversion circuit 451 is 0.6 to 1.0 V means that only this inverter circuit has a particularly low threshold voltage.

Further, when recording by discharging ink,
It is necessary to supply a large current of 150 mA to 200 mA to the heater 401. Particularly, when a plurality of heaters 401 are turned on at the same time, a larger current is supplied to the GND line 4.
30, the voltage noise generated in the GND line 430 becomes large. At this time, the same voltage noise is generated on the GND line to which the source side of the nMOS transistor 453 of the voltage conversion circuit 451 is connected, and this voltage noise is such that the threshold value of the first-stage inverter circuit is lower than that of the other CMOS gates. In addition, even when a normal signal is not output, the inverter circuit is inverted due to the GND noise, and as a result, not only a malfunction or a discharge failure is caused, but in the worst case, a heater may be damaged.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to reduce the adverse effects of voltage noise on the GND line of a voltage conversion circuit and to perform stable ink discharge even when a large current is generated. It is to provide a recording head and a recording apparatus using the recording head.

[0018]

In order to solve the above-mentioned problems and achieve the object, a recording head according to the present invention has the following arrangement. That is, in a recording head that has a plurality of recording elements and records image data on a recording medium by independently energizing and driving each of the recording elements, a driving circuit for energizing and driving the recording elements; An output circuit that outputs image data to the recording element at a predetermined timing; and a CMOS logic circuit that converts a voltage applied to the drive circuit based on the image data and drives the current supply, and The CMOS logic circuit includes: a first inverter circuit having an nMOS type element to which the voltage of the image data is applied and a resistor; and a second inverter circuit having a pMOS type element and an nMOS type element. And the ground terminal of the drive circuit were separated from each other.

In order to solve the above-mentioned problems and achieve the object, a recording apparatus according to the present invention has a configuration in which a recording head having the above-described characteristics is mounted.

[0020]

Embodiments of the present invention will be described below in detail with reference to the accompanying drawings.

[Circuit Configuration of First Embodiment] The circuit configuration of the first embodiment will be described. FIG. 1 shows the first embodiment of the present invention.
FIG. 3 is a circuit diagram of the embodiment.

As shown in FIG. 1, reference numeral 121 denotes an electrothermal conversion element (hereinafter referred to as a heater) for generating heat for discharging ink, and reference numeral 122 denotes a power transistor for supplying a desired current to the heater 121. , Reference numeral 124 denotes a shift register for supplying current to each heater 121 and temporarily storing image data for determining whether or not to eject ink from the nozzles of the recording head. Reference numeral 127 denotes a transfer provided in the shift register 124. An input terminal for a clock signal CLK, reference numeral 126 denotes an image data input terminal for serially inputting image data DATA for turning on / off the heater 121, and reference numeral 123 denotes a latch for recording and holding image data for each heater 121 for each heater. Circuit, code 1
Reference numeral 28 denotes a latch signal input terminal for inputting a latch signal LT for controlling the latch timing of the latch circuit 123, reference numeral 129 denotes a switch for determining the timing at which current flows through the heater 121, and reference numeral 161 denotes the voltage amplitude of the digital signal from the switch 129. A voltage conversion circuit for converting the voltage into a higher voltage amplitude and applying the voltage to the gate of the power transistor 122; reference numeral 162, a resistor constituting a part of the voltage conversion circuit 161; reference numeral 163, an nMOS transistor having a drain connected to the resistor 162; Reference numerals 164 and 165 denote pMOS transistors and nMOS transistors, respectively.
A MOS inverter is constituted, reference numeral 140 is a power supply line of the voltage conversion circuit 161, reference numeral 125 is a power supply line for applying a predetermined voltage to the heater 121 to supply current, and reference numeral 130 is the heater 121 and the power transistor 122.
170, the GND line into which the current passed through
Is a terminal for drawing out the GND terminal of the preceding inverter circuit comprising the resistor 162 of the voltage conversion circuit 161 and the nMOS transistor 163, and is connected to the source side of the nMOS transistor 163.

The number of bits of the image data stored in the shift register 124 and the number of the power transistors 122 are set to be the same.

[Circuit Operation] In the circuit configuration of this embodiment,
The operation is performed in the same manner as the timing chart shown in FIG. That is, assuming that the operation is performed in synchronization with the rising timing of the transfer clock, image data for turning on / off each heater 121 is input from the image data input terminal 126. Here, since the number of bits of the image data stored in the shift register 124 and the number of the heaters 121 and the power transistors 122 are the same, the pulses of the transfer clock signal CLK are input by the number of the heaters 121 to shift the image data. After that, the latch signal LT is output to the latch signal input terminal 128, and each heater 1
The image data corresponding to 21 is held in the latch circuit 123. Thereafter, when the switch 129 is turned on, a Lo / Hi signal corresponding to the image data is output from the latch circuit 123, and the voltage is applied to the gate of the nMOS transistor 163 of the voltage conversion circuit 161 via the switch 129. . Shift register 124 and latch circuit 123
Is constituted by a CMOS logic circuit, and since the transfer clock signal CLK, image data DATA, latch signal LT, and the like all have a signal amplitude of 0 V / 5 V, the power supply voltage of the shift register 124 and the latch circuit 123 Is often 5V.

Therefore, the output of the latch circuit 123 becomes 5 V at the time of Hi, and this voltage becomes n through the switch 129.
When applied to the gate of the MOS transistor 163, n
Since the MOS 163 is turned on, a current flows from the power supply 140 via the resistor 162.

At this time, if the value of the resistor 162 is set to a value sufficiently higher than the ON resistance of the nMOS transistor 163, a voltage near 0 V is supplied to the gate of the pMOS transistor 164 of the preceding CMOS inverter circuit without limit. , The gate of the pMOS transistor 164 can be set to the Lo state. Then, the output as the CMOS inverter becomes Hi, and the voltage level at this time becomes the power supply 140.
Appears as it is and is applied to the gate of the power transistor 122.

That is, when the output of the latch circuit 123 is Hi (image data is present), the power transistor 122
The voltage of the power supply line 140 is applied to the gate, and the power transistor 122 is turned on, and a current flows through the heater 121 to perform printing by ink ejection.

Here, considering a state in which a current flows through a plurality of heaters 121, a few A
Large current flows, and the current is
1, GND line 1 via power transistor 122
Flow into 30. At this time, a large voltage noise is generated in the GND line 130 due to its own resistance R and LC components. This voltage noise is generated by the voltage conversion circuit 161.
This may cause a malfunction. The reason is that the threshold value of the inverter circuit in the preceding stage mainly composed of the resistor 162 and the nMOS transistor 163 is
Is determined by the threshold voltage Vth, and the threshold value is set to 0.6 in a general manufacturing process.
１．０1.0V.

Therefore, in this embodiment, the resistor 162 and n
The GND terminal 170 of the pre-stage inverter circuit constituted by the MOS transistor 163 is separated from the GND line 130 into which the current of the power transistor 122 flows, and is pulled out to the outside by another wiring to set the GND voltage which is not affected by the voltage noise. Alternatively, by connecting to a separate power supply, it is possible to prevent the voltage noise generated in the GND line 130 from being mixed into the inverter circuit at the preceding stage of the voltage conversion circuit 161. As a result, a plurality of heaters are simultaneously turned on.
Even in such a state, stable ink ejection can be performed without malfunction.

Further, the GND terminal 1 of the preceding-stage inverter circuit
Reference numeral 70 denotes a wiring made of aluminum or an aluminum alloy, which is drawn out. Therefore, voltage noise can be effectively reduced.

[Circuit Configuration of Second Embodiment] The circuit configuration of the second embodiment will be described. FIG. 2 shows a second embodiment of the present invention.
FIG. 3 is a circuit diagram of the embodiment.

As shown in FIG. 2, reference numeral 172 denotes a terminal for drawing out the GND terminal of the inverter circuit at the preceding stage of the voltage conversion circuit 161 and connecting the GND terminal of the shift register circuit 124 and the GND terminal of the latch circuit 123 by common wiring. It is. In the circuit configuration shown in FIG.
The GND terminal of the pre-stage inverter circuit of No. 61 is drawn out to the outside by another wiring, and the wiring is separated from the GND terminal 171 of the latch circuit 123 and the like. On the other hand, in the circuit configuration shown in FIG.
By connecting these GND terminals by a common wiring and separating them from the GND terminal of the power transistor 122,
The effect of the voltage noise at the D terminal can be reduced.

[Substrate for Inkjet Recording Head] Next, the substrate for an inkjet recording head having the circuit structure of the first and second embodiments will be described. FIG. 7 is a perspective view showing a detailed configuration of the substrate for an inkjet recording head.

As shown in FIG. 7, the ink jet recording head substrate has a liquid passage 80 communicating with a plurality of ejection ports 800.
By assembling a flow path wall member 801 for forming the ink jet head 5 and a top plate 802 having an ink supply port 803,
A recording head 810 of an ink jet recording method can be configured. In this case, the ink injected from the ink supply port 803 is stored in the internal common liquid chamber 804 and supplied to each of the liquid paths 805, and in this state, the base 808 and the heat generating section 806 are driven, so that the ink is discharged from the discharge port 800. Is discharged.

Further, the recording head 810 shown in FIG. 7 is mounted on the main body of the ink jet recording apparatus, and by controlling a signal applied from the main body to the recording head 810, high speed recording and high quality recording can be realized. Can be provided.

[Inkjet Recording Apparatus Main Body] Next, an inkjet recording apparatus using the recording head 810 shown in FIG. 7 will be described. FIG. 8 is an external perspective view showing an ink jet recording apparatus 900 according to the embodiment of the present invention.

In FIG. 8, the recording head 810 is driven by a driving force transmitting gear 90 in conjunction with the forward / reverse rotation of a driving motor 901.
2, mounted on a carriage 920 that engages with a spiral groove 921 of a lead screw 904 that rotates via an arrow 903, and is driven by a driving force of a driving motor 901 along with a guide 919 together with an arrow a or b along with the carriage 920.
It is possible to reciprocate in the direction. A paper pressing plate 905 for the recording paper P conveyed onto the platen 906 by a recording medium feeding device (not shown) presses the recording paper P against the platen 906 along the carriage moving direction.

The photo plastics 907 and 908 are provided on the lever 909 provided on the carriage 920.
A home position detecting unit 908 for confirming the presence in the area provided with 908 and switching the rotation direction of the drive motor 901 or the like. The support member 910 is a recording head 810
The suction means 912 sucks the inside of the cap member 911 and recovers the suction of the recording head 810 via the cap opening 513. The moving member 915 includes a cleaning blade 914.
Of the cleaning blade 91
4 and the moving member 915 are supported by the main body support plate 916. Needless to say, the cleaning blade 914 is not limited to the illustrated embodiment, and a well-known cleaning blade can be applied to the present embodiment. Also, the lever 917 is
It is provided to start the suction for the suction recovery, and moves with the movement of the cam 918 engaged with the carriage 920. The movement of the driving force from the drive motor 901 is controlled by known transmission means such as clutch switching. A signal is applied to the heating section 806 provided on the recording head 810,
Recording control unit (not shown) that controls the driving of each mechanism such as 1
Is provided on the apparatus main body side.

The ink jet recording apparatus 900 having the above-described configuration uses a platen 906 by a recording medium feeding apparatus.
The recording head 810 performs recording on the recording paper P conveyed upward while reciprocating over the entire width of the recording paper P. The recording head 810 has the circuit structure of each of the above-described embodiments. Since it is manufactured using a substrate for use, high-precision and high-speed recording becomes possible.

[Configuration of Control Circuit] Next, the configuration of a control circuit for executing the recording control of the above-described apparatus will be described. FIG. 9 is a block diagram illustrating a configuration of a control circuit of the inkjet recording apparatus 900. In the figure showing a control circuit, 1700 is an interface for inputting a recording signal, 1701 is an MPU, 1702 is a program ROM for storing a control program executed by the MPU 1701, 1
A dynamic RA 703 stores various data (such as the recording signal and recording data supplied to the head).
M. A gate array 1704 controls supply of print data to the print head 1708, and also controls data transfer between the interface 1700, the MPU 1701, and the RAM 1703. 1710 is a recording head 1708
1709 is a carrier motor for conveying the recording paper. Reference numeral 1705 denotes a head driver for driving the head, and reference numerals 1706 and 1707 denote motor drivers for driving the transport motor 1709 and the carrier motor 1710, respectively.

The operation of the above control configuration will be described. When a recording signal enters the interface 1700, the gate array 17
04 and the MPU 1701 converts the recording signal into recording data for printing. Then, the motor driver 17
06 and 1707 are driven, and the head driver 1
The recording head is driven according to the recording data sent to 705, and printing is performed.

In the above description, an example was described in which the substrate for an ink jet recording head was employed for an ink jet recording head. However, the substrate structure according to the present invention can be applied to, for example, a substrate for a thermal head. .

The present invention provides an excellent effect particularly in a recording head and a recording apparatus of the type which ejects ink using thermal energy, which is proposed by the applicant among the ink jet recording methods.

Regarding the typical configuration and principle, it is preferable to use the basic principle disclosed in, for example, US Pat. Nos. 4,723,129 and 4,740,796. This method can be applied to both so-called on-demand type and continuous type.
In the case of the on-demand type, a rapid temperature rise exceeding the boiling corresponding to the recorded information is applied to the electrothermal transducer disposed corresponding to the sheet holding the liquid (ink) or the liquid path. By applying at least one drive signal to the recording medium, heat energy is generated in the electrothermal transducer, and the film is boiled on the heat acting surface of the recording head. As a result, the liquid (ink) This is effective because bubbles in the parentheses) can be formed. By discharging the liquid (ink) through the discharge opening by the growth and contraction of the bubble, at least one droplet is formed. When the drive signal is formed into a pulse shape, the growth and shrinkage of the bubble are performed immediately and appropriately, so that the ejection of a liquid (ink) having particularly excellent responsiveness can be achieved, which is more preferable. As the pulse-shaped drive signal, those described in US Pat. Nos. 4,463,359 and 4,345,262 are suitable. In addition,
U.S. Pat.
By adopting the conditions described in the specification of 313,124,
Further excellent recording can be performed.

As the configuration of the recording head, in addition to the combination of the discharge port, the liquid path, and the electric heat converter (linear liquid flow path or right-angled liquid flow path) as disclosed in the above-mentioned respective specifications, U.S. Pat.No. 4,558,333 and U.S. Pat.
The configuration using the specification of Japanese Patent No. 9,600 is also included in the present invention. In addition, Japanese Unexamined Patent Application Publication No. 123670/1984 discloses a configuration in which a common slit is used as a discharge portion of an electrothermal transducer for a plurality of electrothermal transducers, and an opening for absorbing a pressure wave of thermal energy is provided. The present invention is also effective as a configuration based on JP-A-59-138461 which discloses a configuration corresponding to a discharge unit.

Further, as a full-line type recording head having a length corresponding to the width of the maximum recording medium that can be recorded by the recording apparatus, a combination of a plurality of recording heads as disclosed in the above specification is used. Either a configuration that satisfies the length or a configuration as a single recording head that is integrally formed may be used, but the present invention can more effectively exert the above-described effects.

[Another Form of Recording Head] As shown in FIG. 10, an ink jet recording head 810 holds a recording head section 811 having a plurality of ejection ports 800 and ink to be supplied to the recording head section 811. An ink container 812. The ink container 812 is detachably provided on the recording head unit 811 at the boundary K. The ink jet recording head 810 is provided with an electric contact (not shown) for receiving an electric signal from the carriage side when mounted on the recording apparatus shown in FIG. 7, and the electric signal drives the heater. . In the ink container 812, a fibrous or porous ink absorber is provided for holding ink, and the ink is held by these ink absorbers.

On the other hand, an ink jet recording head 810 shown in FIG. 8 has a recording head portion 811 and an ink container 812 integrally formed.

It should be noted that the present invention can be applied to a modification or change of the above embodiment without departing from the spirit thereof.

Even if the present invention is applied to a system including a plurality of devices (for example, a host computer, an interface device, a reader, a printer, etc.), a single device (for example, a copying machine, a facsimile machine, etc.) )
May be applied.

[0051]

As described above, according to the present invention,
By setting the GND terminal of the pre-stage inverter circuit composed of the resistance of the voltage conversion circuit and the nMOS transistor to a wiring different from the GND terminal of the power transistor, the influence of voltage noise is reduced, and malfunction in the voltage conversion circuit is prevented. Even when a plurality of heaters are energized at the same time, stable ink ejection is possible, and a high-performance recording head can be realized.

[0052]

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a first embodiment of the present invention.

FIG. 2 is a circuit diagram according to a second embodiment of the present invention.

FIG. 3 is a diagram illustrating a circuit configuration of a conventional inkjet printhead.

FIG. 4 is a timing chart of various signals for driving the printhead drive circuit shown in FIG. 3;

FIG. 5 is a diagram illustrating a circuit configuration of a conventional inkjet printhead.

FIG. 6 is a diagram showing a circuit configuration of a conventional inkjet recording head.

FIG. 7 is a perspective view showing a detailed configuration of a substrate for an inkjet recording head.

FIG. 8 is an external perspective view illustrating an inkjet recording apparatus according to an embodiment of the present invention.

FIG. 9 is a block diagram illustrating a configuration of a control circuit of the inkjet recording apparatus.

FIG. 10 is an external perspective view illustrating another embodiment of the inkjet recording head shown in FIG.

[Explanation of symbols]

 121: heater 122: nMOS power transistor 123: latch circuit 124: shift register 161: voltage conversion circuit 171, 172: GND terminal

Claims (7)

[Claims] 1. A recording head having a plurality of recording elements, and recording image data on a recording medium by independently energizing and driving each of the recording elements, comprising: a driving circuit for energizing the recording elements; An output circuit that outputs image data at a predetermined timing to each of the recording elements; and a CMOS logic circuit that converts a voltage applied to the drive circuit based on the image data and drives the current supply circuit. Wherein the CMOS logic circuit includes an nMOS type element to which the voltage of the image data is applied, a first inverter circuit having a resistance, and a second type having a pMOS type element and an nMOS type element.
A recording head, comprising: an inverter circuit, wherein a ground terminal of the first inverter circuit and a ground terminal of the drive circuit are separated from each other. 2. A ground terminal of the first inverter circuit,
2. The recording head according to claim 1, wherein a common wiring is connected to a ground terminal of the output circuit. 3. The recording head according to claim 1, wherein the drive circuit includes an nMOS power transistor, and the output circuit includes a shift register that temporarily stores an externally input image signal. 4. The recording head according to claim 1, wherein the wiring is made of aluminum or an aluminum alloy. 5. The recording head according to claim 1, wherein the recording head is an inkjet recording head that performs recording by discharging ink. 6. The recording head according to claim 1, wherein the recording head ejects ink by using thermal energy, and includes a thermal energy converter for generating thermal energy to be applied to the ink. Item 6. The recording head according to item 5. 7. A recording apparatus comprising the recording head according to claim 1.