JP2004050846A - Substrate for ink jet head, ink jet head and ink jet printing apparatus using the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a substrate for an ink jet head which can sufficiently suppress the occurrence of noises in driving a heating unit and can be made small. <P>SOLUTION: The substrate for an ink jet head comprises a plurality of heating units 401, a power transistor 402 for driving the heating units 401 corresponding to an image data, an input pad 411 of a heat pulse (a pulse width specifying signal) for specifying the driving pulse width to be applied to the heating units 401, and a block selecting section for dividing the plurality of heating units 401 into blocks for every specified number and performing time division driving using the block as a unit. A delay circuit group 102 comprising a logic circuit (delay circuit) 104 for supplying a drive signal to the heating units 401 in the block by shifting the timing of the drive pulse to be applied to the heating units 401 in a selected block, is provided in the input line of the heat pulse. <P>COPYRIGHT: (C)2004,JPO

Description

The present invention relates to an inkjet head substrate capable of performing stable printing with reduced malfunction due to noise, an inkjet head using the inkjet head substrate, and an inkjet printing apparatus such as a printer using the inkjet head.

The ink jet recording method (liquid jet recording method) is capable of high-speed recording because the generation of noise during operation is extremely small to a negligible level, and can be performed on so-called plain paper without requiring a special process of fixing. It is extremely excellent in the point that recording can be performed and the like, and recently the printing method is becoming mainstream. In particular, in an ink jet head using thermal energy, by applying thermal energy generated by a heating element (electrical heat converter; heater) to a liquid, a foaming phenomenon is selectively generated in the liquid, and the energy of the foaming is generated. Ejects ink droplets from the ejection ports. In such an ink-jet head, in order to improve the recording density (resolution), a large number of fine heating elements are arranged on a silicon semiconductor substrate or the like, and the discharge ports are arranged for each heating element so as to face the heating element. And a driving circuit and a peripheral circuit for driving the heating element are also provided on the silicon semiconductor substrate. A substrate provided with a heating element, a driving circuit, and a peripheral circuit on a silicon semiconductor substrate in this manner is referred to as a substrate for an inkjet head. For example, dozens to thousands of heating elements, a driver for each heating element, a shift register having the same number of bits as a heating element for transmitting image data input in series to the driver in parallel, and a shift register. A latch circuit for temporarily storing output data for each heating element has been provided in the same silicon semiconductor substrate.

As described above, in recent years, integration of logic circuits such as drivers, shift registers, and latches on a head base is progressing, but a current pulse flowing through one heating element instantaneously reaches a considerable current value. When the number of heating elements that are turned on at the same time (that is, the number of ejection ports from which ink droplets are simultaneously ejected) is large, for example, a pulse current of about 1 to several amps drives the heating element. To the power supply line and the ground (GND) line.

When such a large pulsed current flows, the logic circuit section on the head base malfunctions due to noise caused by inductive coupling generated in the flexible wiring from the printer apparatus main body to the ink jet head or the wiring in the ink jet head. There is a fear. In addition, there is a concern about emission of unnecessary electromagnetic noise to the outside of the printer.

Since the level of the induction noise increases as the amount of change in current per unit time increases, the number of ejection ports provided in the inkjet head for high-speed or high-definition printing is increased, and the noise is simultaneously turned on. An increase in the number of elements is expected, and the current value of the current pulse is further increased, that is, the noise level is increased.

Therefore, instead of simultaneously driving a large number of ejection ports provided on the head base, these ejection ports are divided into a plurality of blocks, and driving is performed in block units. That is, at a certain timing, the heating element is selectively driven in the first block, and in the remaining blocks, none of the heating elements is driven. At the next timing, the heating element is selectively driven in the second block. In the remaining blocks, none of the heat generating elements is driven, and in the same manner, one cycle of the block is completed to complete one drive of the heat generating elements corresponding to all the discharge ports.

However, when the number of discharge ports is large, the size of the current pulse does not become small and the amount of induced noise cannot be suppressed if the number of blocks is divided into an appropriate number. Although it is conceivable to increase the number of blocks and reduce the number of heating elements that are turned on at the same time, in such a configuration, the time allocated to one block is shortened, and a sufficient amount of ink is discharged. Energy may not be obtained.

Therefore, Japanese Patent Application Laid-Open No. 7-68761 discloses a configuration in which a drive pulse applied to heating elements belonging to the same block is slightly shifted for each heating element. That is, when forming the base for the ink jet head, a hysteresis circuit is provided in the input section together with the components of the logic discharge control circuit such as the heating element, the driver, and the shift register, and the driving pulse is shifted with respect to the different heating elements. Is applied, a CR (capacitor-resistance) integrating circuit is formed in a signal path of a heat pulse (input pulse width signal) for defining a pulse width and a timing of a driving pulse, and the heat pulse is delayed to thereby make each pulse. The heating elements are sequentially driven. By shifting the timing of the heat pulse using the CR integration circuit and controlling the current flowing through the heating element in this way, the number of heating elements that are turned on at exactly the same timing is reduced, and the peak value and current of the current due to the driving pulse are reduced. Is reduced so as to suppress the generation of noise. As a result, even if the number of ejection ports, which is indispensable for high-speed printing, or the number of simultaneously driven heating elements due to high-density mounting increases, generation of induction noise and the like can be suppressed.
JP-A-7-68761

However, when the generation of noise is suppressed by using a CR integrator as disclosed in the above-mentioned Japanese Patent Application Laid-Open No. 7-68761, when there is a variation between C (capacitor) and R (resistance), , The product of the heat pulse causes a variation in the delay value of the heat pulse, so that the current flowing through the heating element cannot be accurately controlled, and as a result, the generation of noise may not be sufficiently suppressed. Further, since the CR integrator is composed of an input buffer, a capacitor, and a resistor, if the difference in the wiring pattern length to the input of the next-stage logic circuit becomes large, the delay value will vary. In a head substrate typically manufactured using a silicon semiconductor device manufacturing technology, a gate oxide film is used for a capacitor, and a diffused resistor is often used for a resistor. When a CR integrating circuit having the following is to be constructed, the capacitor and the resistor occupy a large area on the head base, which causes a problem that the head base becomes large.

Therefore, an object of the present invention is to provide an ink jet head substrate, which can sufficiently suppress the generation of noise and can be configured to be small in size, and an ink jet head and an ink jet printing apparatus using such a substrate. .

An ink jet head substrate according to the present invention includes: a plurality of heating elements on a substrate; and an input line for inputting a pulse width defining signal for defining a width of a driving pulse applied to the heating elements. Wherein a logic circuit for supplying a driving pulse applied to the heating element at a shifted timing is provided on the input line.

In the present invention, as the above-described logic circuit, a delay circuit configured by connecting even-numbered CMOS inverter circuits is preferably used.

The inkjet head of the present invention includes the inkjet head substrate of the present invention, and a member combined with the inkjet head substrate to form a liquid path associated with the heating element and an ink discharge port forming one end of the liquid path. It is characterized by having.

The inkjet printing apparatus of the present invention is characterized by comprising the inkjet head of the present invention, and means for transporting a print medium relative to the inkjet head.

According to the present invention, the heat pulse is delayed by providing a logic circuit on the line of the pulse width defining signal (heat pulse) so that the timing of the drive pulse applied to different heating elements belonging to the same block is deviated. There is an effect that the current flowing through the body can be accurately controlled, and the rate of change of the pulsed current accompanying the driving of the heating element is suppressed, thereby suppressing the generation of noise. Further, since the CR integration circuit is not used for shifting the timing, there is an effect that an increase in the size of the head base can be suppressed.

Next, a preferred embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a diagram illustrating a circuit configuration of a substrate for an inkjet head according to an embodiment of the present invention.

論理 Here, the logic circuit refers to a circuit which determines an output signal according to an input signal when a certain signal is input. For example, a device including a diode and a transistor is referred to as DTL (Diode-Transistor Logic), and a device using a transistor instead of the diode is referred to as (Transistor-Transistor Logic).

In FIG. 1, a large number of heating elements 401 are provided on a base 400, one end of the heating element 401 is commonly connected to a heating element driving power supply, and the other end is a power supply provided for each heating element 401. The transistor 402 is grounded. The power transistor 402 functions as a switch for the heating element 401. A latch circuit 403 and a shift register 404 are provided over the base 400. Further, the heating element group is divided into a predetermined number of blocks for the purpose of reducing the size of the power supply device of the printer body by reducing the number of heating elements 401 driven simultaneously and reducing the current flowing instantaneously. A logic 405 for selecting a time-division driving block such as a decoder provided for performing divisional driving in units of, a logic buffer 101 having hysteresis characteristics, and the like are formed on the base 400. Further, as illustrated, an electrostatic protection element 406 may be inserted.

The input signals include a clock for operating the shift register, an image data input for receiving image data in a serial manner, a latch clock for holding data in a latch circuit, a block enable signal for block selection, and power. There are a logic signal which is a heat pulse for externally controlling the ON time of the transistor, that is, a time for driving the heating element, a logic circuit driving power supply (5 V), a ground (GND) line, and a heating element driving power supply. These are input via pads 407, 408, 409, 410, 411, 412, 413 and 414 on the substrate, respectively. Further, for each power transistor 402, a logical product (AND) of the heat pulse, the output of the latch 403, and the output from the decoder 405 is obtained, and the power transistor 402 is controlled according to the result, so that the driving pulse flows through the heating element 401. An AND circuit is provided.

Here, FIG. 6 shows an equivalent circuit of the electrostatic protection element 406, and FIG. 7 shows a film configuration thereof. Although the details are not shown in FIG. 1, the electrostatic protection element 406 has a circuit form of FIG. 6A having a pull-down resistor or a circuit form of FIG. 6B having a pull-up resistor. It is composed of either. 6, 600 (610) is connected to the pad on the substrate of FIG. 1, 606 (616) is connected to the logic buffer 101 of FIG. 1, and 601 (611) is connected between the ground (GND) lines. 602 (612) and 604 (614) are electrostatic protection diodes connected to a logic circuit driving power supply (5V) line. Reference numeral (615) denotes a diode for electrostatic protection connected to a ground (GND) line, and reference numeral 603 (613) denotes a polysilicon resistor. The dotted line shown in FIG. 6 indicates the path of current flow when the pad 600 (610) is electrostatically discharged. As can be seen from the figure, the dotted line between the pad 600 (610) and the polysilicon resistor 603 (613) A path including a parasitic diode 601 (611) connected to a ground (GND) line formed of a pull-up or pull-down resistor and a diode 602 (612) connected to a logic circuit driving power supply (5 V); and a polysilicon resistor 603 (613) ) To the buffer 606 (616), a path composed of the diode 605 (615) connected to the ground (GND) line and the diode 604 (614) connected to the logic circuit drive power supply (5V) is formed.

7A and 7B are film configuration diagrams in which FIG. 6 is classified according to components. FIG. 7A shows a pull-down resistor 601 with a parasitic diode, FIG. 7B shows a pull-up resistor 611 with a parasitic diode, and FIG. ) Indicate diodes 602 (612) and 604 (614) connected to a logic circuit drive power supply (5 V), and FIG. 7D shows a diode 605 (615) connected to a ground (GND) line. 7A to 7D, 701 is a P-type silicon substrate, 702 is a P-type well region, 703 is an N-type well region, 704 is a field oxide film, and 705a shown in FIG. Reference numerals 705c and 706c, and 705b and 706a shown in FIGS. 7B and 7C are a high-concentration N-type region and a high-concentration P-type region for making ohmic contact with an aluminum wiring (not shown). Here, the N-type well region 703 used as a resistor serves as a diode terminal together with the high-concentration P-type region 706c, and a high-concentration N-type region 705a provided directly away from the pad. The high-concentration N-type region 705c is provided so as to connect to the N-type region 705c, and is connected to the high-concentration P-type region 706c provided in the P-type well region 702 via aluminum (not shown). . Thus, the N-type well region 703 forms a diode together with the P-type silicon substrate 701 and the P-type well region 702, and acts as a resistance between the high-concentration N-type region 705a and the high-concentration N-type region 705c. 7 (B) is the same as FIG. 7 (A) except that the high-concentration N-type region is changed from 705c to 705b to change from a pull-down resistor to a pull-up resistor. The same symbols are given to the layers, and the description will be omitted because they are duplicated. In FIG. 7C, a diode is formed by the N-type well region 703, the high-concentration P-type region 706a, and the high-concentration N-type region 705b. In FIG. 7D, the N-type well region 703, the P-type well The region 702, the high-concentration P-type region 706c, and the high-concentration N-type region 705a form a diode.

In the recording drive sequence using the head substrate, first, the image data is serially transmitted from the printer main body to the substrate inside the head in synchronization with a clock, and is taken in by the intra-substrate shift register 404. The fetched data is temporarily stored in the latch circuit 403, and a block is selected in a time-division manner until the next image data is held in the latch circuit, and a heat pulse is input from the heat pulse input pad 411 in each of the block selections. Then, one or a plurality of power transistors 402 in which a block is selected and image data is on are turned on, and current (drive) is supplied to one or a plurality of heating elements 401 in which the block is selected and image data is on. (Pulse) flows and is driven.

Further, in this embodiment, a delay circuit group 102 is provided so that even the heating elements belonging to the same block are driven at shifted timings, and based on the heat pulse input from the heat pulse input pad 411, Heat pulses with different delay times are generated, and these heat pulses are supplied to different heating elements 401 in the same block. That is, the delay circuit group 102 has several logic circuits 104 provided by connecting an even number of inverter circuits in series, and the number of heating elements obtained by subtracting 1 from the number of heating elements included in the same block. Then, a heat pulse for each heating element is output on each heat pulse signal line 103 for each heating element. In the illustrated example, one block is composed of four heating elements 401, which are represented by A to D for convenience. The heat pulse input from the heat pulse input pad 411 is supplied as it is to the heating element A, and the heat pulse input from the heat pulse input pad 411 is supplied to one logic circuit 104 to the heating element B. The heat pulse is supplied to the heating element of C, and the heat pulse to be supplied to the heating element of B is further delayed by one logic circuit 104, and the heating element of D is supplied to the heating element of D. , C are further delayed by one logic circuit 104 from the heat pulses to be supplied to the heating elements. As a result, the heat pulses obtained by delaying the heat pulses input to the heat pulse input pad 411 by the first, second, and three-stage logic circuits 104 are supplied to the B, C, and D heating elements. Will be.

As such a logic circuit 104, an inverter delay circuit formed by combining a plurality of inverter circuits formed by the same film formation process as a logic system of a drive control system including a shift register 404 and a latch circuit 403 can be used. . FIG. 2 illustrates an example of the logic circuit 104 provided as a delay circuit. 2A shows the logic circuit 104 at the block level, and FIG. 2B shows the logic circuit 104 at the gate level in more detail.

(2) As shown in FIG. 2A, the logic circuit 104 includes an input buffer 204, a cascaded two-stage delay 205, and an output buffer 206. Here, each of the input buffer 204, the delay 205, and the output buffer 206 is a CMOS (Complementary Metal Oxide Semiconductor) inverter circuit. Since two stages of the delay 205 are provided, the logic circuit 104 is, in the end, a cascade connection of four stages of inverter circuits.

In this delay circuit, as shown in FIG. 2B, in the input buffer 204 and the output buffer 206, the gate length (channel length) L of each MOS transistor (p-channel and n-channel) constituting the inverter is determined by , 2 μm, which is the same as the logic system of the drive control system including the shift register 404 and the latch circuit 403. The gate length L of the delay 205 is set to 10 μm, which is larger than 2 μm of the logic system, so that a sufficient delay can be obtained. The gate width (channel width) W of the delay 205 is set to the same value as that of the input buffer 204 (for example, 6 μm for n-MOS and 9 μm for p-MOS). The gate width W of the output buffer 206 is 12 μm for the n-MOS and 18 μm for the p-MOS.

In the present embodiment, it is assumed that a block is formed by the four-element heating element 401, and three logic circuits (delay circuits) 104 are provided for the signal line portion of the heat pulse from the heat pulse input pad 411. The different types of heat pulse signal lines 103 were configured and wired so that the time for actually transmitting the heat pulse among the four heating elements (elements) simultaneously selected by the block selection circuit 405 was shifted by 10 ns for each element. Here, it is assumed that all the heating elements A to D in FIG. 1 are selected and driven, that is, all signals from the latch 403 for these heating elements are active (enabled) and the heat pulse is at a high level. Next, the operation of the present embodiment will be described on the assumption that the power transistor 402 is turned on and current flows through the heating element 401 as a drive pulse.

The heating element of A is driven by the heat pulse input to the heat pulse input pad 411, and a waveform obtained by delaying the heat pulse to the heating element of A becomes a heat pulse to the heating element B. In this case, the time when the heat pulse of the heating element B actually exceeds the threshold value of the power transistor 402 and the current starts to flow (turns on) in the heating element B is later than the time when the current starts to flow in the heating element A. Similarly, the time at which the current starts flowing through the heating element C and the time at which the current starts flowing through the heating element D are also sequentially delayed, so that the current pulse flowing through the heating element driving power supply line has a stepped shape. That is, the amount of change in current per unit time is not much different from the case where a single heating element is turned on, and the noise level is significantly reduced.

Compared to the one described in Japanese Patent Application Laid-Open No. 7-68761, the head base of the present embodiment delays the heat pulse by a logic circuit such as a CMOS inverter instead of a CR integrator circuit. Variation is reduced, and the current applied to the heating element can be accurately controlled. Therefore, the amount of generated noise can be further suppressed. Further, since the CMOS inverter circuit can be made smaller than the CR integration circuit on the silicon semiconductor substrate, the head base of the present embodiment can be made smaller than the conventional one. This leads to cost reduction and productivity improvement.

Note that, in the present embodiment, an example has been described in which four heating elements are simultaneously selected as a block and the heat pulse transmission time is shifted for each heating element. However, the number of heating elements constituting one block is appropriately determined. The heat pulse may be applied at the same timing by combining several heating elements within a range where the noise level does not matter. Of course, the present invention can be applied to a case where any number of heating elements are simultaneously turned on by increasing or decreasing the amount of delay by the delay circuit by the inverter and by appropriately wiring.

Each of the logic circuits (delay circuits) 104 using the inverters described above includes a drive control logic system including a heating element, a driver (power transistor), a shift register, and a latch circuit on a silicon semiconductor substrate, and a pulse width input unit (pad 411). In addition, the block selecting circuit 405 and the like can be formed at the same time without forming a process for manufacturing the head substrate 400 by forming the film by a film forming process. Therefore, since the number of pads at the input portion of the base and other circuit configurations in the base do not need to be largely changed, even if the delay circuit group 102 is provided as described above, the cost of the base itself hardly increases. In addition, since noise can be dealt with in the head, it is not necessary to attach a component such as a capacitor for noise suppression to other parts, so that the cost and size of the apparatus main body can be reduced.

In the present invention, the logic circuit 104 for delaying the heat pulse is not limited to the one shown in FIG. FIG. 3 shows another example of the logic circuit (delay circuit).

The delay circuit shown in FIG. 3 includes an input buffer 204 composed of a CMOS inverter circuit, a two-stage delay 209, and an output buffer 206, similarly to the delay circuit shown in FIG. Is different from the one shown. That is, in the delay circuit shown in FIG. 3, a delay 209 which is a CMOS inverter circuit is configured such that an N-channel MOS transistor in a normal CMOS inverter circuit (see FIG. 2) is replaced with two N-channel MOS transistors in order to increase a delay amount. The transistors are replaced by cascade-connected transistors, and the P-channel MOS transistors are replaced by cascade-connected two P-channel MOS transistors. The output of the preceding inverter is commonly supplied to the gate of each MOS transistor.

In this configuration, a sufficient delay time can be obtained without increasing the gate (channel) length L of each MOS transistor. In particular, it is easy to make the gate length L of each MOS transistor forming the delay circuit the same as the gate length of the drive control logic transistors including the shift register 404 and the latch circuit 403. Alternatively, there is an advantage that circuit design and layout design of a head base as an integrated circuit are facilitated.

Next, the schematic configuration of the ink jet head of the present invention using the above-described head substrate will be described with reference to FIG.

As described above, on the head base 400, a plurality of heating elements (heaters) for generating heat by receiving an electric signal and discharging ink from the discharge port 40 by bubbles generated by the heat, They are arranged in rows.

(4) A flow path 41 for supplying ink to the discharge port 40 provided at a position facing the heating element is provided corresponding to each discharge port. Walls forming these discharge ports and flow paths are provided in the grooved member 101. By connecting these grooved members 101 to the above-described head base 400, the flow path 41 and a plurality of flow paths are formed. A common liquid chamber 21 for supplying ink is provided.

Next, an inkjet printing apparatus using such an inkjet head will be described.

FIG. 5 is a schematic view of an ink jet printing apparatus IJRA to which the ink jet head of the present invention is applied. The lead screw 5005 rotates through driving force transmission gears 5011 and 5009 in conjunction with forward and reverse rotations of a driving motor 5013. The carriage HC that engages with the groove 5004 has an inkjet head detachably mounted thereon, has a pin (not shown), and is reciprocated in the directions of arrows a and b. Reference numeral 5002 denotes a paper pressing plate, which presses a print medium, typically paper, against a platen 5000, which is print medium transport means, in the carriage movement direction. Reference numerals 5007 and 5008 denote home position detecting means for confirming the presence of the carriage lever 5006 in this area by photocouplers and switching the rotation direction of the motor 5013. Reference numeral 5016 denotes a member that supports a cap member 5022 that caps the front surface of the ink jet head. Reference numeral 5015 denotes suction means that suctions the inside of the cap, and performs suction recovery of the ink jet head through an opening 5023 in the cap. Reference numeral 5017 denotes a cleaning blade. Reference numeral 5019 denotes a member which allows the blade to move in the front-rear direction. These members are supported by a main body support plate 5018. It goes without saying that the blade is not limited to this form, and a well-known cleaning blade can be applied to this embodiment. Reference numeral 5012 denotes a lever for starting suction for suction recovery, which moves with the movement of the cam 5020 which engages with the carriage, and which controls the movement of the drive force from the drive motor by a known transmission means such as clutch switching. Is done.

The capping, cleaning, and suction recovery are configured so that when the carriage comes to the home position side area, desired operations can be performed at the corresponding positions by the action of the lead screw 5005. Any operation can be applied to this example as long as the operation is performed. Each of the above-described configurations is an excellent invention when viewed alone or in combination, and shows preferred configuration examples for the present invention.

The apparatus is provided with signal supply means for supplying a drive signal for driving the heating element and other signals to the ink jet head (head base).

FIG. 1 is a circuit configuration diagram of a substrate for an inkjet head according to an embodiment of the present invention. FIG. 2 is a circuit diagram illustrating a configuration example of an inverter delay circuit in the inkjet head base illustrated in FIG. 1. FIG. 2 is a circuit diagram showing another example of the configuration of the inverter delay circuit in the inkjet head base shown in FIG. 1. FIG. 2 is a schematic configuration diagram of an inkjet head using the base shown in FIG. 1. FIG. 5 is a perspective view illustrating a configuration example of an inkjet printing apparatus using the inkjet head illustrated in FIG. 4. (A), (B) is an equivalent circuit diagram of the electrostatic protection element shown in FIG. (A)-(D) is a film configuration diagram of the electrostatic protection element shown in FIG. 6.

Explanation of reference numerals

101 Buffer 102 Delay circuit group 104 Logic circuit 204 Input buffer 205 Delay 206 Output buffer 400 Inkjet head substrate 401 Heating element 402 Power transistor 403 Latch circuit 404 Shift register 405 Block selection logic (decoder)
406 Electrostatic protection element 407-415 pad

Claims (8)

On a substrate, a plurality of heating elements, and an input line for inputting a pulse width defining signal for defining the width of a driving pulse applied to the heating elements, an inkjet head substrate having:
A substrate for an ink jet head, wherein a logic circuit for supplying the driving pulse applied to the heating element at a shifted timing is provided on the input line. Further, a driver that drives the plurality of heating elements according to image data, a block selection unit that divides the plurality of heating elements into blocks of a predetermined number and performs time-division driving on a block-by-block basis, The drive control logic further comprising: a drive control logic for controlling a drive signal supplied to the driver; and a hysteresis circuit provided at an input portion of the drive control logic so that an input data threshold value is different between a rising edge and a falling edge. 2. The substrate for an inkjet head according to 1. The substrate for an ink jet head according to claim 1, wherein the logic circuit is configured by connecting even-numbered stages of CMOS inverters in series. A shift register for outputting image data input in series in parallel, and a latch circuit for temporarily storing data output from the shift register are further provided on the substrate,
The heating element, the driver, the input unit, the block selection unit, the shift register and the latch circuit are formed on the substrate, and the logic circuit includes a drive control logic system including the shift register and the latch circuit. 2. The substrate for an ink jet head according to claim 1, wherein the substrate has the form of an inverter circuit formed by the same film forming process. 5. The substrate for an ink jet head according to claim 4, wherein the inverter circuit is a CMOS inverter circuit. 6. An ink jet head substrate according to claim 1, and a liquid path associated with the heating element and an ink discharge port forming one end of the liquid path, which are combined with the ink jet head substrate. An inkjet head, comprising: An ink-jet printing apparatus comprising: the ink-jet head according to claim 6; and means for conveying a print medium relative to the ink-jet head. 8. The ink jet printing apparatus according to claim 7, further comprising a carriage for detachably supporting the ink jet head and scanning the print medium.

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