WO2004050370A1 - Recording head and recorder comprising such recording head - Google Patents

Recording head and recorder comprising such recording head Download PDF

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Publication number
WO2004050370A1
WO2004050370A1 PCT/JP2003/015225 JP0315225W WO2004050370A1 WO 2004050370 A1 WO2004050370 A1 WO 2004050370A1 JP 0315225 W JP0315225 W JP 0315225W WO 2004050370 A1 WO2004050370 A1 WO 2004050370A1
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WO
WIPO (PCT)
Prior art keywords
constant current
recording
recording head
circuit
mos transistor
Prior art date
Application number
PCT/JP2003/015225
Other languages
French (fr)
Japanese (ja)
Inventor
Nobuyuki Hirayama
Original Assignee
Canon Kabushiki Kaisha
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Kabushiki Kaisha filed Critical Canon Kabushiki Kaisha
Priority to EP03812334A priority Critical patent/EP1579997A4/en
Priority to AU2003302652A priority patent/AU2003302652A1/en
Publication of WO2004050370A1 publication Critical patent/WO2004050370A1/en
Priority to US11/134,416 priority patent/US20050212857A1/en

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Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01Ink jet
    • B41J2/015Ink jet characterised by the jet generation process
    • B41J2/04Ink jet characterised by the jet generation process generating single droplets or particles on demand
    • B41J2/045Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
    • B41J2/04501Control methods or devices therefor, e.g. driver circuits, control circuits
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01Ink jet
    • B41J2/015Ink jet characterised by the jet generation process
    • B41J2/04Ink jet characterised by the jet generation process generating single droplets or particles on demand
    • B41J2/045Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
    • B41J2/04501Control methods or devices therefor, e.g. driver circuits, control circuits
    • B41J2/04541Specific driving circuit
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01Ink jet
    • B41J2/015Ink jet characterised by the jet generation process
    • B41J2/04Ink jet characterised by the jet generation process generating single droplets or particles on demand
    • B41J2/045Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
    • B41J2/04501Control methods or devices therefor, e.g. driver circuits, control circuits
    • B41J2/0455Details of switching sections of circuit, e.g. transistors
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01Ink jet
    • B41J2/015Ink jet characterised by the jet generation process
    • B41J2/04Ink jet characterised by the jet generation process generating single droplets or particles on demand
    • B41J2/045Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
    • B41J2/04501Control methods or devices therefor, e.g. driver circuits, control circuits
    • B41J2/04555Control methods or devices therefor, e.g. driver circuits, control circuits detecting current
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01Ink jet
    • B41J2/015Ink jet characterised by the jet generation process
    • B41J2/04Ink jet characterised by the jet generation process generating single droplets or particles on demand
    • B41J2/045Ink jet characterised by the jet generation process generating single droplets or particles on demand by pressure, e.g. electromechanical transducers
    • B41J2/04501Control methods or devices therefor, e.g. driver circuits, control circuits
    • B41J2/0458Control methods or devices therefor, e.g. driver circuits, control circuits controlling heads based on heating elements forming bubbles

Definitions

  • the present invention relates to a recording head including a plurality of recording elements, and a recording device including the recording head.
  • FIG. 11 shows an example of a heater drive circuit in such an ink jet head.
  • time-division driving in which a plurality of heaters are driven in a time-division manner to eject ink is generally performed.
  • a plurality of heaters is divided into a plurality of blocks composed of heaters arranged adjacent to each other, and driving is performed so that two or more heaters are not driven simultaneously in each block. Time-sharing eliminates the need to supply large amounts of power at once by suppressing the total current flowing through the heater.
  • the blocks to be accommodated are divided into l to m. That is, in block 1, the power supply lines from the power supply pad 1104, a heater 1101 "110 1 are connected in common to lx, each NMOS transistor 1102 u ⁇ l 10 2 i x, supply 1 104 and the ground 1104 Are connected in series with each of the corresponding transistors 1101 u to 101 lx , and each of the transistors 1101 administratto 1101 lx is supplied from the control circuit 1105 to the corresponding NMOS transistor 1102 u. when to l 102 control signal to the gate of lx is applied, the current through the corresponding heater is heated by the flow from the power supply wiring by the NMOS transistors ll OS ⁇ ll OS i x is turned on.
  • FIG. 12 is a timing chart showing the timing for energizing and driving each block of the heater drive circuit shown in FIG.
  • the control signal VGl ⁇ VGx are timing signals for driving the first to X-th heater 1101 u ⁇ l 101 lx belonging to the block 1. That, VGl ⁇ VGx shows the waveform of the signal input to the block of the click 1 NMOS transistor ll O Su ll O 2 lx control terminal (gate one g), when the high level, the corresponding NMO S transistor 1 102 Turns on and turns off the corresponding NMOS transistor when it is at low level.
  • each of I hl to I hx indicates a current value flowing through each of the heaters 1101 ⁇ to ⁇ 101 x .
  • the number of heaters energized and driven in each block can be controlled so as to always be one or less. There is no need to supply a large current to the heater.
  • FIG. 13 is a diagram showing a layout example of a heater substrate (a substrate constituting a recording head) on which the heater drive circuit of FIG. 11 is formed.
  • This Figure 13 FIG. 11 shows a layout of power supply lines connected from power supply pads 1104 to blocks 1 to m shown in FIG.
  • the power supply wiring 1 3 0 1 i to 1 3 0 1 m is individually supplied from the power supply pad 1 1 0 4 to the blocks 1 to m , and the power supply wiring 1 3 0 2 to ⁇ 3 0 is supplied from the power supply pad 1 1 0 4. 2 m is connected.
  • the heater substrate has many heaters and their driving circuits formed on the same semiconductor substrate. For this reason, low-cost MOS-type semiconductor processes that enable high-density and small-sized devices, have simple manufacturing processes, and are used for the formation of drive circuits over the night are used. Furthermore, since it is necessary to reduce the cost by increasing the number of heater substrates that can be obtained from one wafer, it is also required to reduce the size of the heater substrate.
  • the energy input to the heater is too small, the ejection of the ink becomes unstable, and if it is excessive, the durability of the heater will be reduced. Therefore, in order to perform high-quality recording, it is desirable that the energy input to the heater be constant. However, as described above, when the fluctuation of the voltage applied to the heater is large, the durability of the heater is reduced, and the ink ejection becomes unstable.
  • the voltage drop in the common wiring varies depending on the number of heaters driven simultaneously. In order to stabilize the energy input to each heater against such fluctuations in voltage drop, the energy input to each heater is adjusted by the voltage application time.
  • the voltage drop in the common wiring increases due to the increase in the number of heaters driven at the same time, the time for applying the voltage during the heater drive increases, making it difficult to drive the heater at high speed. ing.
  • FIG. 14 shows a heater driving circuit described in Japanese Patent Application Laid-Open No. 2000-191913.
  • constant current sources Trl4 to Tr (n + 13)
  • switching elements Ql to Qn
  • the constant current source circuits and switching elements required for the same number as the number of heaters occupy the majority of the area of the heater substrate, so reducing the area of this part is important for suppressing the cost of the heater substrate. Since the current flowing through the heater is as high as 50 mA to 200 mA, it may not be possible to reduce the transistor size in order to suppress the voltage drop due to the parasitic resistance of the transistor. In addition, by shortening the wiring from the heater to the switching element and the constant current circuit, the board area can be reduced.Therefore, the constant current source circuit and the switching element should be arranged at the same pitch as the arrangement pitch of the light. Is valid.
  • the present invention has been made in view of the above conventional example, and the feature of the present invention is that even if the number of simultaneous driving of the recording elements increases, high-speed and stable recording is possible, and the area of the heater substrate is increased. It is an object of the present invention to provide a recording head in which cost increase is suppressed without increasing, and a recording apparatus provided with the recording head.
  • each recording element is driven by a constant current, and the constant current value can be adjusted so that uniform energy can be applied to each recording element.
  • Another object of the present invention is to provide a recording device provided with a storage device.
  • FIG. 1 is a circuit diagram showing an example of a heater drive circuit provided in the print head according to the first embodiment of the present invention.
  • FIG. 2 is an equivalent circuit diagram of a drive circuit per heater according to the first embodiment of the present invention.
  • FIG. 3 is a timing chart illustrating the operation timing of the circuit of FIG.
  • FIG. 4 is a circuit diagram showing an example of a heater drive circuit provided in the recording head according to the second embodiment of the present invention.
  • FIG. 5 is a characteristic diagram of the NMOS transistor used in this embodiment.
  • FIG. 6 is a circuit diagram showing conditions for measuring characteristics of the NMOS transistor according to the second embodiment of the present invention.
  • FIG. 7 is a circuit diagram showing an example of a heater drive circuit provided in the recording head according to the third embodiment of the present invention.
  • FIG. 8A is a characteristic diagram of the NMOS transistor according to the second embodiment
  • FIG. 8B is a circuit diagram showing the characteristic measurement conditions of the NMOS transistor.
  • FIG. 9 is a circuit diagram showing an example of a head drive circuit provided with a recording head according to the fourth embodiment of the present invention.
  • FIG. 10 is a circuit diagram showing an example of a heater drive circuit provided in a recording head according to the fifth embodiment of the present invention.
  • FIG. 11 is a circuit diagram showing a conventional heater drive circuit.
  • FIG. 12 is a timing chart of a signal for operating a conventional heater drive circuit.
  • FIG. 13 is a diagram showing a wiring layout of a heat sink substrate.
  • FIG. 14 is a circuit diagram showing a configuration of a conventional heater drive circuit.
  • FIG. 15 is an external perspective view illustrating the outline of the configuration of the inkjet recording apparatus according to the present embodiment.
  • FIG. 16 is a block diagram illustrating a functional configuration of the inkjet recording apparatus according to the present embodiment.
  • FIG. 17 is a schematic perspective view showing the configuration of the recording head according to the present embodiment.
  • the “heater substrate” used below does not indicate a simple substrate made of a silicon semiconductor, but a substrate provided with each element, wiring, and the like.
  • “on the heater substrate” means not only the surface of the heater substrate but also the surface of the element substrate and the inside of the element substrate near the surface.
  • the term “built-in” according to the present embodiment is not a word indicating simply arranging each separate element on a substrate, but is a method for manufacturing each semiconductor element. It indicates that it is integrally formed and manufactured on a heat sink substrate by a process or the like.
  • FIG. 1 is a circuit diagram illustrating a configuration of a heater drive circuit provided on a heater substrate of an inkjet recording head according to a first embodiment of the present invention.
  • 101 ⁇ to 101 lx indicate heaters (heat resistances) for printing, and when each heater is energized to generate heat, ink droplets are emitted from each corresponding nozzle. Discharged. That is, in a recording head using this heater substrate, ejection ports (nozzles) for ejecting ink are provided corresponding to the respective heaters.
  • these heaters 101 ul to 101 lx are divided into blocks 1 to m, and each block is provided with X heaters and corresponding heaters.
  • X NMOS transistors are included.
  • One 02 "to 102 lx are each NMOS transistors for turning on Z off the power supply to the corresponding heater.
  • 103 u ⁇ l 03 lx is provided a constant current source, corresponding to each heater.
  • These each of the constant current source 103 u ⁇ l 03 lx, NMOS transistors 102 ⁇ ⁇ 02 lx, respectively and heat Isseki group 101 1: ⁇ ⁇ 101 are connected in series to each 1Kai, each current source 103u ⁇ l 03 1 ⁇ outputs a constant current to the connection terminal The magnitude of this constant current value is adjusted by a control signal from the reference current circuit 105.
  • 104 is a control circuit, which corresponds to the recording data to be recorded.
  • the reference current circuit 105 outputs a control signal 110 to the constant current sources 103 administratto 103 1 ⁇ , and the constant current generated by each constant current source Controlling the value.
  • 106 and 107 are power supply pads connected to a power supply unit (not shown) outside the substrate. Electric power for driving the heater is supplied through these power supply pads.
  • Each of 108 and 109 is a power supply line for supplying electric power for driving the heater from each of the power supply pads 106 and 107 to the blocks 1 to m.
  • Fig. 2 is a diagram showing an equivalent circuit of a circuit including one heater, one NMOS transistor, and one constant current source.
  • Fig. 3 shows the drive signal and the timing explaining the current flowing through each heater. This is a chart.
  • a signal VG is a recording signal corresponding to an image signal supplied from the control circuit 104 in FIG.
  • the configuration of the control circuit 104 may be a circuit that controls an image signal such as a shift register and a latch.
  • the signal VC is a control signal supplied from the reference current circuit 105 to the constant current source 203, and corresponds to the control signal 110 in FIG. 1.
  • the constant current source 203 (the constant current in FIG. source 103 1] L ⁇ 103 corresponding to 1Kai) by the emitted electrostatic current values are controlled.
  • the power supply VH indicates a voltage source for driving the heater 201.
  • the NMOS transistor 202 ideally operates as a switch between the drain and source terminals.
  • the signal level of the signal VG is high, the NMOS transistor 202 turns on (short circuit between the drain and source). It is assumed that it is turned off at the mouth level (open between the drain and source).
  • a voltage between the terminals is applied to the constant current source 203, a constant current set by the control signal VC flows between the terminals (from the top to the bottom in the figure).
  • FIG. 3 is a diagram showing the generation timing of the signal VG and the waveform of the current flowing to the heater 201 at that time.
  • the signal VG is at a low level during a period up to a time tl. In this period, since the output of the constant current source 203 and the heater 201 are cut off, no current flows through the heater 201. Next, during the period from the time t1 to the time t2, the signal VG goes to the high level, the current flows between the source and the drain of the NMOS transistor 202, and the output current of the constant current source 203 becomes high. Flows to Then, after time t2, the signal VG becomes low level, and the power supply to the heater 201 is cut off.
  • the current supply time to the heater 201 is controlled by the pulse width of the signal VG, and the magnitude of the current Ih flowing through the heater 201 is controlled by the control signal VC of the constant current source 203.
  • the current flowing through the sun 201 is represented by numeration values I1 to I3 corresponding to the control signal VC.
  • the constant current value I (11 to 13) determined by the control signal VC flows through the light source 201 during a period from time t1 to time t2 according to the pulse width of the signal VG.
  • the ink existing in the nozzle (flow path) provided corresponding to the heater 201 is heated and foamed, and the ink is ejected from the nozzle corresponding to the heater, so that a predetermined pixel (dot) is formed. Recorded.
  • the source and the drain are short-circuited when the NMOS transistor 202 is on.
  • the NMOS transistor 202 is on, there is a resistance between the source and the drain.
  • the output current of the constant current source is applied to the heater as it is, so that the same operation as the above description of driving the heater is performed. .
  • FIG. 4 is a diagram showing an example in which the constant current source 103 of FIG. 1 of the first embodiment described above is constituted by NMOS transistors 401 n to 401 lx . Portions common to FIG. Is omitted.
  • NMOS transistor 401 'to 401 drains of lx are connected to the NMOS transistor 102 u ⁇ l 02 lx each source for Suitchin grayed.
  • NMOS transistor 401 U ⁇ 401 lx gates of the reference current circuit 105 are connected.
  • the control signal 110, the value of the current flowing through the respective heaters are more controlled NMOS transistor 401 u ⁇ 401 lx gate voltage by Ri controlled by a control signal 110 from the reference current circuit 105 .
  • FIG. 5 is a diagram showing a typical static characteristic example of the NMOS transistor used for the NMOS transistors 401 n to 401 lx
  • FIG. 6 shows the bias conditions thereof.
  • FIG. 5 shows the characteristics of the drain current Id when the drain voltage Vds is changed with the gate voltage Vg being a parameter. Dray in Figure 5
  • the gate voltage Vg and the drain voltage Vds of the NMOS transistors 401 u to 401 lx in FIG. 4 are set so as to operate in a region where the drain current Id does not change much with the change in the drain voltage Vds (saturation region, etc.). I do.
  • I do As a result, it is possible to obtain an output current that does not largely depend on the drain voltages Vds of the NMOS transistors 401 1 to 401 lx .
  • the on-resistance characteristic which is the current-voltage characteristic between the source and drain of the NMOS transistors 401 u to 401 lx , can be controlled by the gate voltage V g, that is, the control signal 110. By controlling this on-resistance value, A desired constant current can be supplied to each heater.
  • FIG. 7 shows that the drains of the NMOS transistors 401 administratto 401 lx shown in FIG. 4 are further connected to the sources of the NMOS transistors 701 u to 701 lx , and two NMOS transistors are cascaded in series to form a constant current source 203 ( 5 is a circuit diagram showing an example in which FIG. 2 is formed.
  • parts common to FIGS. 1 and 4 described above are denoted by the same reference numerals, and description thereof will be omitted. The case of two stages will be described, but the present invention can of course be applied to a case of more stages.
  • each gate of the NMOS transistors 701 u to 701 lx is also connected to the reference current circuit 105.
  • the NMOS transistors 701 u to 701 lx operate as gate-grounded transistors, and fix the drain voltage of the NMOS transistor AO ln O lx by the potential between the gate and the source of the NMOS yo iu Yoi.
  • the reference current circuit 105 connects the NMOS transistors 401 n to 401 to the drain voltage V As to the region in behavior of the saturation region or the like with little change in the drain current Id with respect to a change in ds, the control signal 111, which sets the gate voltage of NMOS 701 u ⁇ 701 lx.
  • the source voltage of the MOS transistors 701 u to 701 lx can be suppressed to a small potential change between the gate and the source by fixing the gate voltage with respect to the voltage fluctuation of the drain of the NMOS transistors 701 u to 701 lx. it can.
  • the fluctuation of the power supply voltage NM the fluctuation of the on-resistance value and the wiring resistance value of the switching NMOS transistors 102 n to l 02 lx compared to the circuit of FIG. Fluctuations in the drain voltage of the NMOS transistors 401 u to 401 lx operating as a constant current source can be suppressed.
  • Figure 8 A is a diagram showing a current output characteristic example of the NMOS transistor 701 U ⁇ 701 lx and the NMOS transistor 401 u ⁇ 401 1 circuit portion of lx 7,
  • FIG. 8B is a diagram illustrating the bias conditions.
  • FIG. 8A shows a case where a constant voltage is applied to the gate of the NMOS transistor 701 in FIG. 8B and the drain voltage of the NMOS transistor 701 is changed in parallel with the gate voltage of the NMOS transistor 401. It shows the output current value.
  • the change in the output current with respect to the change in the drain voltage of the NMOS transistor 701 is smaller than that in FIG.
  • FIG. 9 is a circuit diagram illustrating the circuit of FIG. 4 with a specific configuration example of the reference current circuit 105 added.
  • the reference current circuit 105 constitutes a current mirror circuit that outputs a current from the drains of the NMOS transistors 401 administratto 401 lx based on the NMOS transistor 901.
  • the NMOS transistor 901 has a gate and a drain that are diode-connected.
  • the reference current source 902 Is connected.
  • the gate of the NMOS transistor 901 is commonly connected to the gate of the NMOS transistor 401: ⁇ to 01 lx .
  • the gate size of the NMOS transient scan evening 901 and NMOS transistor 401 u ⁇ 401 lx are equal, a gate voltage of the NMOS transistor 901 and the NMOS transistor 40 1 u ⁇ 401 lx become equal, the reference current equal current by a reference current source 902 Output from the drains of the NMOS transistors 401 u to 401 lx . If the gate sizes of NMOS transistor 901 and NMOS transistor 4011 : L to 401 lx are different, it is proportional to the reference current corresponding to the gate size ratio of NMOS transistor 901 and NMOS transistor 401 administratto 401 lx. A constant output current is obtained.
  • FIG. 10 is a circuit diagram showing the circuit of FIG. 7 with a specific configuration example of the reference current circuit 105 added.
  • the gates of the NMOS transistors 701 u to 701 lx are connected to the gate of the NMOS transistor 1001 of the reference current circuit 105.
  • NMO S transistor evening 1001, gate and drain are Daio one de connection, in which can grant a constant voltage to the NMOS transistor 701 " ⁇ 701 lx gate.
  • the NMOS transistor 1001 and NMOS Tran register 701 " ⁇ 701 lx gate first source voltage is substantially equal to this, the drain voltage of the NMOS transistor 901 and NMOS transistors 401 ⁇ 401 lx be equal.
  • the reference current from the reference current source 902 depends on the drain voltages of the NMOS transistors 701 u to 701 lx. Instead, it is accurately mirrored by the output currents of the NMOS transistors 401 u to 401 lx .
  • a constant current source circuit for supplying a constant current to the heater and a switching circuit for controlling the current application time can be configured using the NMOS transistor.
  • a constant current can be supplied when the heater is driven, and the current value of the constant current can be adjusted and controlled. Thus, uniform energy can be applied to each heater.
  • circuit configurations of FIGS. 1, 4, 7, 9, 10 and the like in each of the above embodiments may be formed on one element substrate.
  • the reference current circuit may be a circuit provided outside the element substrate, it is preferable that the reference current circuit is formed on the same element substrate.
  • FIG. 15 is an external perspective view showing an outline of a configuration of an ink jet recording apparatus 1 which is a typical embodiment of the present invention.
  • an ink jet recording apparatus (hereinafter, referred to as a recording apparatus) is generated by a carriage motor M 1 on a carriage 2 equipped with a recording head 3 for performing recording by discharging ink according to an ink jet system.
  • the driving force is transmitted from the transmission mechanism 4, the carriage 2 is reciprocated in the direction of arrow A, and, for example, a recording medium P such as recording paper is fed through the paper feeding mechanism 5 'and conveyed to the recording position.
  • recording is performed by ejecting ink from the recording head 3 onto the recording medium P.
  • the carriage 2 is moved to the position of the recovery device 10, and the ejection recovery processing of the recording head 3 is performed intermittently.
  • the ink cartridge 6 for storing the ink to be supplied to the recording head 3 is installed.
  • the ink cartridge 6 is detachable from the carriage 2.
  • the recording device 1 shown in Fig. 15 is capable of color recording, so that the carriage 2 contains magenta (M), cyan (C), yellow (Y), and black ( ⁇ ) inks, respectively. It has four ink cartridges. Each of these four ink cartridges is independently removable.
  • the carriage 2 and the recording head 3 are designed so that the joint surfaces of the two members are properly contacted to achieve and maintain the required electrical connection.
  • the recording head 3 performs recording by selectively discharging ink from a plurality of discharge ports by applying energy according to a recording signal.
  • the recording head 3 of this embodiment employs an ink-jet method in which ink is ejected using thermal energy, has an electrothermal converter for generating thermal energy, and is applied to the electrothermal converter.
  • the electrical energy is converted into thermal energy, and the thermal energy is applied to the ink.
  • the ink is ejected from the ejection port using the pressure change caused by bubble growth and shrinkage caused by film boiling caused by applying the thermal energy to the ink.
  • the electrothermal converter is provided corresponding to each of the discharge ports, and discharges ink from the corresponding discharge port by applying a pulse voltage to the corresponding electrothermal converter in accordance with a recording signal.
  • the carriage 2 is connected to a part of the drive belt 7 of the transmission mechanism 4 for transmitting the drive force of the carriage motor Ml, and the arrow A along the guide shaft 13
  • the guide is slidably guided in the direction. Therefore, the carriage 2 reciprocates along the guide shaft 13 by the forward and reverse rotation of the carriage motor Ml.
  • a scale 8 is provided to indicate the absolute position of the carriage 2 along the movement direction of the carriage 2 (the direction of arrow A).
  • the scale 8 uses a black PET printed on a transparent PET film at a required pitch, one of which is fixed to the chassis 9 and the other is supported by a panel panel (not shown). Sa Have been.
  • the printing apparatus 1 is provided with a platen (not shown) opposed to the discharge port surface on which the discharge port (not shown) of the recording head 3 is formed.
  • a recording signal is applied to the recording head 3 to eject ink, thereby performing recording over the entire width of the recording medium P conveyed on the platen.
  • reference numeral 14 denotes a conveying roller driven by the conveying motor M2 to convey the recording medium P
  • reference numeral 15 denotes a recording medium P applied to the conveying roller 14 by a spring (not shown).
  • a pinch roller 16 is in contact with the pinch roller 16, a pinch roller holder rotatably supporting the pinch roller 15, and 17 is a transport roller gear fixed to one end of the transport roller 14. Then, the transport roller 14 is driven by the rotation of the transport mode M2 transmitted to the transport roller gear 17 via an intermediate gear (not shown).
  • reference numeral 20 denotes a discharge roller for discharging the recording medium (sheet) P on which an image has been formed by the recording head 3 to the outside of the recording apparatus, and the rotation of the conveyance mode M2 is transmitted. It is adapted to be driven.
  • the discharge port L20 is brought into contact with a spur roller (not shown) which presses the recording medium P with a panel (not shown).
  • 22 is a spur holder for rotatably supporting the spur roller.
  • the recording apparatus 1 has a desired position (outside the recording area) outside the range of the reciprocating movement (outside the recording area) for the recording operation of the carriage 2 on which the recording head 3 is mounted.
  • a recovery device 10 for recovering the ejection failure of the recording head 3 is provided.
  • the recovery device 10 includes a capping mechanism 11 1 for capping the discharge port surface of the recording head 3 and a wiping mechanism 12 2 for cleaning the discharge port surface of the recording head 3.
  • the ink is forcibly ejected from the ejection port by a suction means (suction pump or the like) in the recovery device in conjunction with the ink jetting, thereby increasing the viscosity of the ink or air bubbles in the ink flow path of the recording head 3.
  • An ejection recovery process such as removal of the ink is performed.
  • the ejection opening surface of the recording head 3 is cabbed by the cabbing mechanism 11, thereby protecting the recording head 3 and preventing evaporation and drying of the ink.
  • the wiping mechanism 12 is arranged in the vicinity of the capping mechanism 11 and wipes ink droplets adhered to the ejection opening surface of the recording head 3.
  • the capping mechanism 11 and the wiping mechanism 12 make it possible to keep the ink ejection state of the recording head 3 normal.
  • FIG. 16 is a block diagram showing a control configuration of the printing apparatus shown in FIG.
  • the controller 600 includes an MPU 601, a program corresponding to a control sequence described later, a ROM 602 storing required tables, and other fixed data, control of a carriage mode Ml, and control of a transfer mode M2.
  • AS IC special-purpose integrated circuit
  • reference numeral 610 denotes a combination (or a reader for reading images, a digital camera, or the like) serving as a supply source of image data, and is generally called a host device. Image data, commands, status signals, and the like are transmitted and received between the host device 610 and the recording device 1 via the interface (IZF) 611.
  • Reference numeral 62 denotes a group of switches. The power switch 621, the print switch 62 for instructing the start of printing, and the ink for the recording head 3 for maintaining good ink ejection performance. It consists of a switch for receiving command input from the operator, such as a recovery switch 623 for instructing the start of processing (recovery processing).
  • a position sensor 631 such as a photo hood for detecting the home position h
  • a temperature sensor 632 provided at an appropriate place of the recording device for detecting the environmental temperature. This is a group of sensors for detecting the device status.
  • 640 is a carriage motor driver for driving a carriage motor Ml for reciprocally scanning the carriage 2 in the direction of arrow A, and 640 is for driving a transport motor M2 for transporting the recording medium P. It is a transport motor driver.
  • FIG. 17 is a schematic perspective view showing the configuration of a recording head cartridge including the recording head according to the present embodiment.
  • a recording head cartridge 1200 in this embodiment includes an ink tank 130 that stores ink and an ink supplied from the ink tank 130 according to recording information.
  • the recording head 3 has a recording head 3 ejected from a nozzle, and the recording head 3 employs a so-called cartridge system which is removably mounted on the carriage 2.
  • the recording head cartridge 1200 is reciprocally scanned along the carriage axis, and a color image is recorded on a recording sheet.
  • ink tanks such as black, light cyan (C), light magenta (LM), Cyan, magenta and yellow Color independent ink tanks are provided, each of which is detachable from the recording head 3.
  • the recording head cartridge 1200 here shows a form in which the ink tank 1300 can be attached to and detached from the recording head.
  • the recording head cartridge integrated with the recording head is shown. It may be one cartridge.
  • Fig. 17 shows a case where six colors of ink are used.However, as shown in Fig. 15, printing is performed using four colors of ink, for example, black, cyan, magenta and yellow. May be. In this case, independent ink tanks for each of the four colors may be detachably attached to the recording head 3.
  • a device including one device for example, a copying machine, a facsimile machine, etc.
  • the present invention is not limited to this, and can be applied to, for example, a thermal head.

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  • Microelectronics & Electronic Packaging (AREA)
  • Particle Formation And Scattering Control In Inkjet Printers (AREA)

Abstract

A recording head having a plurality of recording devices comprises a plurality of switching devices provided corresponding to the respective recording devices, constant current sources provided corresponding to the respective recording devices for applying a constant current, and a current control circuit for controlling constant currents supplied from the constant current sources. The recording devices are driven by constant currents from the constant current sources.

Description

明細書 記録へッド及び前記記録へッドを備える記録装置 技術分野  TECHNICAL FIELD A recording head and a recording device provided with the recording head
本発明は、 複数の記録素子を備える記録ヘッドと、 その記録ヘッドを備 える記録装置に関するものである。 背景技術  The present invention relates to a recording head including a plurality of recording elements, and a recording device including the recording head. Background art
記録へッドのノズル内に配置されたヒー夕により熱エネルギーを発生さ せ、 その熱エネルギーを利用してヒー夕近傍のインクを発泡させ、 そのノ ズルからインクを吐出させて記録を行うインクジエツ卜へッドが知られて いる。 このようなインクジエツトへッドにおけるヒー夕駆動回路の一例を 図 1 1に示す。  An ink jet that generates thermal energy by the heater and nozzle arranged in the nozzle of the recording head, uses the thermal energy to foam ink near the heater and ejects ink from the nozzle to perform recording The head is known. FIG. 11 shows an example of a heater drive circuit in such an ink jet head.
高速に記録を行うためには、 なるべく多くのヒー夕を同時に駆動して多 くのノズルから同時にィンクを吐出させることが望ましい。しかしながら、 プリンタ装置の電源の電力供給能力に制限があり、 また電源からヒータに 至る配線の抵抗に起因する電圧降下などにより、 一度に流すことができる 電流値が制限される。 このため複数のヒータを時分割で駆動してインクを 吐出させる時分割駆動が一般的である。 この時分割駆動では、 例えば、 複 数のヒ一夕を、 隣接配置されたヒー夕で構成される複数のブロックに分割 し、 各ブロック内で同時に 2つ以上のヒータを駆動しないように駆動を時 分割し、 ヒータを流れる電流の総和を抑えることにより一度に大電力を供 給する必要をなくしている。 このようなヒータの駆動を行う駆動回路の動 作について図 1 1を用いて説明する。  In order to print at high speed, it is desirable to drive as many heaters as possible at the same time and eject ink from many nozzles simultaneously. However, the power supply capability of the power supply of the printer is limited, and the current value that can be passed at one time is limited due to a voltage drop due to the resistance of the wiring from the power supply to the heater. For this reason, time-division driving in which a plurality of heaters are driven in a time-division manner to eject ink is generally performed. In this time-division driving, for example, a plurality of heaters is divided into a plurality of blocks composed of heaters arranged adjacent to each other, and driving is performed so that two or more heaters are not driven simultaneously in each block. Time-sharing eliminates the need to supply large amounts of power at once by suppressing the total current flowing through the heater. The operation of the drive circuit for driving such a heater will be described with reference to FIG.
ヒータ 1 1 0 1 u〜l 1 0 l mxのそれぞれに対応する各 NMO Sトラ ンジス夕 1 1 0 2 H〜1 1 0 2 MJま、 図 1 1に示すようにそれぞれ同数 (x) づっ収容するブロック l〜mに分けられている。 即ち、 ブロック 1 では、 電源パッド 1104からの電源配線は、 ヒータ 1101„〜110 1 lxに共通に接続されており、 NMOSトランジスタ 1102 u〜l 10 2 i xのそれぞれは、 電源 1 104とグランド 1104の間で、 対応するヒ 一夕 1101 u〜l 101 lxのそれぞれと直列に接続されている。 また、 ヒ一夕 1101„〜1101 lxのそれぞれは、 制御回路 1105から、 対 応する NMOSトランジスタ 1102u〜l 102 lxのゲートに制御信 号が印加されたときに、 その NMOSトランジスタ l l O S^ l l O S i xがオンすることにより電源配線から対応するヒータを通って電流が流 れて加熱される。 Heaters 1 1 0 1 u to l 10 l mx corresponding to each NMO Transistor 1 1 10 2 H to 1 10 2 M J, as shown in Fig. 11 (x) The blocks to be accommodated are divided into l to m. That is, in block 1, the power supply lines from the power supply pad 1104, a heater 1101 "110 1 are connected in common to lx, each NMOS transistor 1102 u~l 10 2 i x, supply 1 104 and the ground 1104 Are connected in series with each of the corresponding transistors 1101 u to 101 lx , and each of the transistors 1101 „to 1101 lx is supplied from the control circuit 1105 to the corresponding NMOS transistor 1102 u. when to l 102 control signal to the gate of lx is applied, the current through the corresponding heater is heated by the flow from the power supply wiring by the NMOS transistors ll OS ^ ll OS i x is turned on.
図 12は、 図 11に示すヒータ駆動回路の各ブロックのヒー夕に通電駆 動するタイミングを示すタイミングチヤ一トである。  FIG. 12 is a timing chart showing the timing for energizing and driving each block of the heater drive circuit shown in FIG.
例えば、 図 11のブロック 1を例にとると、 制御信号 VGl〜VGxは、 ブロック 1に属する第 1〜第 X番目のヒータ 1101 u〜l 101 lxを 駆動させるためのタイミング信号である。 即ち、 VGl〜VGxは、 ブロッ ク 1の NMOSトランジスタ l l O Su l l O 2 lxの制御端子 (ゲ一 ト) に入力される信号の波形を示し、 ハイレベルの時に、 対応する NMO Sトランジスタ 1 102をオンし、 ロウレベルの時に、 対応する NMOS トランジスタをオフする。 他のブロック 2〜mの場合も同様である。 図 1 2において、 I hl〜 I hxのそれぞれは、 ヒータ 1101 ^〜丄 101 xのそれぞれに流れる電流値を示している。 For example, taking as an example the block 1 of FIG. 11, the control signal VGl~VGx are timing signals for driving the first to X-th heater 1101 u~l 101 lx belonging to the block 1. That, VGl~VGx shows the waveform of the signal input to the block of the click 1 NMOS transistor ll O Su ll O 2 lx control terminal (gate one g), when the high level, the corresponding NMO S transistor 1 102 Turns on and turns off the corresponding NMOS transistor when it is at low level. The same applies to other blocks 2 to m. In FIG. 12, each of I hl to I hx indicates a current value flowing through each of the heaters 1101 ^ to 丄 101 x .
このように各プロック内のヒ一夕を順次、 時分割で通電駆動することに より、 各ブロック内で通電駆動されるヒータは、 常に 1個以下になるよう に制御することができるので、 一度に大電流をヒータに供給する必要はな い。  In this way, by sequentially energizing the heaters in each block in a time-division manner, the number of heaters energized and driven in each block can be controlled so as to always be one or less. There is no need to supply a large current to the heater.
図 13は、 図 11のヒータ駆動回路が形成されているヒータ基板 (記録 ヘッドを構成する基板) のレイアウト例を示す図である。 この図 13は、 図 1 1に示す電源パッド 1 1 0 4からブロック 1〜mに接続される電源配 線のレイアウトを示したものである。 FIG. 13 is a diagram showing a layout example of a heater substrate (a substrate constituting a recording head) on which the heater drive circuit of FIG. 11 is formed. This Figure 13 FIG. 11 shows a layout of power supply lines connected from power supply pads 1104 to blocks 1 to m shown in FIG.
ブロック 1〜mの各ブロックに対し電源パッド 1 1 0 4より個別に電源 配線 1 3 0 1 i〜 1 3 0 1 mが、 電源パッド 1 1 0 4より電源配線 1 3 0 2 〜丄 3 0 2 mが接続されている。 前述のように、 各ブロックで同時に駆動 される最大ヒータ数を 1以下にすることで、 各ブロック別に分割された配 線を流れる電流値は、 常に 1つのヒータに流れる電流以下にすることがで きる。 これにより複数のヒー夕を同時駆動した場合でも、 ヒータ基板内で の配線における電圧降下量を一定とすることができる。 これと同時に、 複 数のヒータを同時駆動した場合でも、 各ヒータへの投入エネルギー量をほ ぼ一定にすることができる。 The power supply wiring 1 3 0 1 i to 1 3 0 1 m is individually supplied from the power supply pad 1 1 0 4 to the blocks 1 to m , and the power supply wiring 1 3 0 2 to 丄 3 0 is supplied from the power supply pad 1 1 0 4. 2 m is connected. As described above, by setting the maximum number of heaters that are simultaneously driven in each block to 1 or less, the current value flowing through the wiring divided for each block can always be less than the current flowing to one heater. Wear. As a result, even when a plurality of heaters are driven simultaneously, the amount of voltage drop in the wiring in the heater substrate can be kept constant. At the same time, even when multiple heaters are driven simultaneously, the amount of energy input to each heater can be made almost constant.
近年、 プリンタは高速化、 高精細化が要求されているため、 プリン夕の 記録へッドは高密度で多ノズル化が図られており、 記録へッドにおけるヒ 一夕駆動に際しては、 記録速度の点から、 なるべく多くのヒータを同時に 高速に駆動することが求められている。  In recent years, high-speed and high-definition printers have been required, and the recording head of the printer has been increased in density and the number of nozzles has been increased. In terms of speed, it is required to drive as many heaters simultaneously as possible at high speed.
またヒー夕基板は、 多数のヒータと、 その駆動回路を同一の半導体基板 上に形成している。 このためヒ一夕の駆動回路の形成には、 デバイスの高 密度 ·小型化が可能で、 製造工程が簡略な、 低コスト MO S型の半導体プ 口セスが用いられている。 更に、 1つのウェハから取れるヒータ基板の個 数を増加させてコストダウンを図る必要があるため、 ヒータ基板を小型化 することも求められている。  The heater substrate has many heaters and their driving circuits formed on the same semiconductor substrate. For this reason, low-cost MOS-type semiconductor processes that enable high-density and small-sized devices, have simple manufacturing processes, and are used for the formation of drive circuits over the night are used. Furthermore, since it is necessary to reduce the cost by increasing the number of heater substrates that can be obtained from one wafer, it is also required to reduce the size of the heater substrate.
ところが前述のように、 同時に駆動されるヒー夕数を増やした場合、 ヒ —夕基板内では同時駆動ヒータの数に対応した配線が必要となる。 このた め配線の数が増すと共に、 ヒー夕基板面積が限られている場合には、 配線 一本当りの配線領域が減少するため配線抵抗が増加する。 また同時に、 配 線数が増して各配線幅が細くなることにより、 ヒー夕基板内の配線相互で の抵抗のバラツキも増加することになる。 このような問題は、 ヒータ基板 を小型化する場合にも同様に生じ、 更に、 配線抵抗の増加及び抵抗のバラ ツキが増加することになる。 前述のように、 ヒータ基板内では、 ヒータと 電源配線は電源に対して直列に接続されているため、 配線抵抗とその抵抗 のバラツキが増加することにより、 各ヒータに印加される電圧の変動割合 が増加する。 However, as described above, when the number of heaters driven simultaneously is increased, wiring corresponding to the number of simultaneously driven heaters is required in the substrate. For this reason, the number of wirings increases, and when the area of the heat-sink substrate is limited, the wiring area per one wiring decreases and the wiring resistance increases. At the same time, as the number of wirings increases and the width of each wiring becomes narrower, the variation in resistance among the wirings in the heating board also increases. The problem is that the heater board This also occurs in the case of miniaturization, and furthermore, the wiring resistance increases and the resistance variation increases. As described above, since the heater and the power supply wiring are connected in series with the power supply in the heater board, the variation in the wiring resistance and the resistance increases, and the variation rate of the voltage applied to each heater increases. Increase.
ヒータへの投入エネルギーは、 過小であればィンクの吐出が不安定にな り、 また過剰であれば、 ヒータの耐久性が低下することになる。 このため 高画質な記録を行うためには、 ヒータへの投入エネルギーが一定であるこ とが望ましい。 しかしながら上述のように、 ヒータに印加される電圧の変 動が大きい場合には、 ヒー夕の耐久性を低下させたり、 インク吐出が不安 定になったりする。  If the energy input to the heater is too small, the ejection of the ink becomes unstable, and if it is excessive, the durability of the heater will be reduced. Therefore, in order to perform high-quality recording, it is desirable that the energy input to the heater be constant. However, as described above, when the fluctuation of the voltage applied to the heater is large, the durability of the heater is reduced, and the ink ejection becomes unstable.
また、 ヒータ基板外部での配線は、 複数のヒータに対して共通となって いるため、 同時に駆動するヒータの数によって、 共通の配線での電圧降下 が異なるものになる。 このような電圧降下の変動に対して、 各ヒー夕での 投入エネルギーを一定化するために、 電圧の印加時間により、 各ヒータへ の投入エネルギーが調整される。 しかしながら、 同時駆動のヒータの数が 増すことにより共通配線での電圧降下が増加しているため、 ヒー夕駆動時 の電圧の印加時間が増し、 高速でヒ一夕を駆動することが困難になってい る。  In addition, since the wiring outside the heater substrate is common to a plurality of heaters, the voltage drop in the common wiring varies depending on the number of heaters driven simultaneously. In order to stabilize the energy input to each heater against such fluctuations in voltage drop, the energy input to each heater is adjusted by the voltage application time. However, since the voltage drop in the common wiring increases due to the increase in the number of heaters driven at the same time, the time for applying the voltage during the heater drive increases, making it difficult to drive the heater at high speed. ing.
このようなヒー夕への投入エネルギー変動による問題を解決する方法が 特開 2 0 0 1— 1 9 1 5 3 1に提案されている。 図 1 4は特開 2 0 0 1— 1 9 1 5 3 1に記載されているヒータの駆動回路を示す。 ここでは記録素 子毎 (R l〜Rn) に設けられた定電流源 (Trl4〜Tr (n+13) ) とスィッチ ング素子 (Ql〜Qn) により、 ヒータ (R l〜Rn) を定電流により駆動す るものである。 この構成によりヒータの駆動数の増加にともなう基板外部 での電圧降下の変動によらず、 常に一定電流でヒータを駆動することがで さる。 ヒータの数と同数必要な定電流源回路およびスィツチング素子は、 ヒー タ基板の面積の大半を占めるため、 この部分の面積を縮小することがヒー 夕基板のコストを抑える上で重要である。 ヒー夕に流れる電流は 5 0 mA 〜2 0 0 mAと高電流であることから、 トランジスタに寄生する抵抗によ る電圧降下を抑えるために、 トランジスタサイズを縮小できないことがあ る。 またヒータからスイッチング素子ゃ定電流回路までの配線を短くする ことで、 基板面積を縮小することができるため、 ヒ一夕の配列ピッチと同 じピッチで定電流源回路およびスィツチング素子を配列することが有効で ある。 A method for solving such a problem due to fluctuations in the energy input to the heater has been proposed in Japanese Patent Application Laid-Open No. 2001-1991. FIG. 14 shows a heater driving circuit described in Japanese Patent Application Laid-Open No. 2000-191913. Here, constant current sources (Trl4 to Tr (n + 13)) provided for each recording element (Rl to Rn) and switching elements (Ql to Qn) are used to control the heaters (Rl to Rn) with a constant current. It is driven by. With this configuration, it is possible to always drive the heater with a constant current regardless of fluctuations in the voltage drop outside the substrate due to an increase in the number of driving heaters. The constant current source circuits and switching elements required for the same number as the number of heaters occupy the majority of the area of the heater substrate, so reducing the area of this part is important for suppressing the cost of the heater substrate. Since the current flowing through the heater is as high as 50 mA to 200 mA, it may not be possible to reduce the transistor size in order to suppress the voltage drop due to the parasitic resistance of the transistor. In addition, by shortening the wiring from the heater to the switching element and the constant current circuit, the board area can be reduced.Therefore, the constant current source circuit and the switching element should be arranged at the same pitch as the arrangement pitch of the light. Is valid.
しかしながらこのような構成は、 バイポーラ型トランジスタを用いた半 導体プロセスにより作成されたものであるため、 近年の例えば 6 0 0 d p i以上の高密度化されたヒー夕の配列ピッチにおいて、 バイポーラトラン ジス夕が配列できないため、 ヒー夕との配線が長くなりヒータ基板面積が 従来の駆動方式のヒ一夕基板の面積に比べ著しく増大してしまう問題があ る。 発明の開示  However, since such a configuration is made by a semiconductor process using bipolar transistors, in recent years, for example, at a high-density array pitch of 600 dpi or more, a bipolar transistor However, there is a problem that the wiring to the heater is long and the area of the heater substrate is significantly larger than the area of the heater substrate of the conventional driving method. Disclosure of the invention
本発明は上記従来例に鑑みてなされたもので、 本願発明の特徴は、 記録 素子の同時駆動数が増加しても、高速でかつ安定した記録が可能であって、 ヒータ基板の面積を大きく増大することなくコストアツプを抑えた記録へ ッド、 及びその記録へッドを備えた記録装置を提供することにある。  The present invention has been made in view of the above conventional example, and the feature of the present invention is that even if the number of simultaneous driving of the recording elements increases, high-speed and stable recording is possible, and the area of the heater substrate is increased. It is an object of the present invention to provide a recording head in which cost increase is suppressed without increasing, and a recording apparatus provided with the recording head.
また本発明の特徴は、 各記録素子を定電流で駆動し、 その定電流値を調 整できるようにして各記録素子に均一なエネルギーを印加できるようにし た記録へッド、 及びその記録へッドを備えた記録装置を提供することにあ る。  Further, the present invention is characterized in that each recording element is driven by a constant current, and the constant current value can be adjusted so that uniform energy can be applied to each recording element. Another object of the present invention is to provide a recording device provided with a storage device.
本願発明の他の特徴や利点は、 添付図面を参照してなされる以下の説明 により明らかになるであろう。 図面の簡単な説明 Other features and advantages of the present invention will become apparent from the following description made with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE FIGURES
本願に組み込まれ、 本願の説明の一部を構成する添付図面は、 本願の実 施例を例示するもので、 明細書と共に本願発明の原理を説明するものであ る。  BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings, which are incorporated in and constitute a part of the description of the present application, illustrate embodiments of the present invention and, together with the description, explain the principles of the invention.
図 1は、 本発明の第 1実施例に係る記録ヘッドに設けられたヒータ駆動 回路の一例を示す回路図である。  FIG. 1 is a circuit diagram showing an example of a heater drive circuit provided in the print head according to the first embodiment of the present invention.
図 2は、 本発明の第 1実施例に係る 1ヒータ当りの駆動回路の等価回路 図である。  FIG. 2 is an equivalent circuit diagram of a drive circuit per heater according to the first embodiment of the present invention.
図 3ほ、 図 2の回路の動作タイミングを説明するタイミングチヤ一トで ある。  FIG. 3 is a timing chart illustrating the operation timing of the circuit of FIG.
図 4は、 本発明の第 2実施例に係る記録へッドに設けられたヒータ駆動 回路の一例を示す回路図である。  FIG. 4 is a circuit diagram showing an example of a heater drive circuit provided in the recording head according to the second embodiment of the present invention.
図 5は、 本実施例で使用する NMO Sトランジスタの特性図である。 図 6は、 本発明の第 2実施例に係る NMO Sトランジスタの特性測定条 件を示す回路図である。  FIG. 5 is a characteristic diagram of the NMOS transistor used in this embodiment. FIG. 6 is a circuit diagram showing conditions for measuring characteristics of the NMOS transistor according to the second embodiment of the present invention.
図 7は、 本発明の第 3実施例に係る記録へッドに設けられたヒータ駆動 回路の一例を示す回路図である。  FIG. 7 is a circuit diagram showing an example of a heater drive circuit provided in the recording head according to the third embodiment of the present invention.
図 8 Aは、 第 2実施例に係る NMO Sトランジスタの特性図、 図 8 Bは NMO Sトランジスタの特性測定条件を示す回路図である。  FIG. 8A is a characteristic diagram of the NMOS transistor according to the second embodiment, and FIG. 8B is a circuit diagram showing the characteristic measurement conditions of the NMOS transistor.
図 9は、 本発明の第 4実施例に係る記録ヘッドの設けられたヒー夕駆動 回路の一例を示す回路図である。  FIG. 9 is a circuit diagram showing an example of a head drive circuit provided with a recording head according to the fourth embodiment of the present invention.
図 1 0は、 本発明の第 5実施例に係る記録へッドに設けられたヒー夕駆 動回路の一例を示す回路図である。  FIG. 10 is a circuit diagram showing an example of a heater drive circuit provided in a recording head according to the fifth embodiment of the present invention.
図 1 1は、 従来のヒータ駆動回路を示す回路図である。  FIG. 11 is a circuit diagram showing a conventional heater drive circuit.
図 1 2は、 従来のヒータ駆動回路を動作させる信号のタイミングチヤ一 トである。  FIG. 12 is a timing chart of a signal for operating a conventional heater drive circuit.
図 1 3は、 ヒー夕基板の配線レイアウトを示す図である。 図 1 4は、 従来のヒータ駆動回路の構成を示す回路図である。 FIG. 13 is a diagram showing a wiring layout of a heat sink substrate. FIG. 14 is a circuit diagram showing a configuration of a conventional heater drive circuit.
図 1 5は、 本実施例に係るインクジェット記録装置の構成の概要を示す 外観斜視図である。  FIG. 15 is an external perspective view illustrating the outline of the configuration of the inkjet recording apparatus according to the present embodiment.
図 1 6は、 本実施例に係るインクジエツト記録装置の機能構成を示すブ ロック図である。  FIG. 16 is a block diagram illustrating a functional configuration of the inkjet recording apparatus according to the present embodiment.
図 1 7は、 本実施例に係る記録へッドの構成を示す概観斜視図である。 発明を実施する為の最良の形態 以下、 添付図面を参照して本発明の好適な実施例を詳細に説明する。 なお以下に用いる 「ヒータ基板」 とは、 シリコン半導体からなる単なる基 体を指し示すものではなく、 各素子や配線等が設けられた基板を示すもの である。 また 「ヒータ基板上」 とは、 単にヒータ基板の表面上を指し示す だけでなく、 素子基板の表面上、 表面近傍の素子基板内部側をも示すもの である。 また、 本実施例に係る 「作り込み (bui l t- in)」 とは、 別体の各素 子を単に基体上に配置することを指し示している言葉ではなく、 各素子を 半導体回路の製造工程等によってヒー夕基板上に一体的に形成、 製造する ことを示すものである。  FIG. 17 is a schematic perspective view showing the configuration of the recording head according to the present embodiment. BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. The “heater substrate” used below does not indicate a simple substrate made of a silicon semiconductor, but a substrate provided with each element, wiring, and the like. Further, "on the heater substrate" means not only the surface of the heater substrate but also the surface of the element substrate and the inside of the element substrate near the surface. In addition, the term “built-in” according to the present embodiment is not a word indicating simply arranging each separate element on a substrate, but is a method for manufacturing each semiconductor element. It indicates that it is integrally formed and manufactured on a heat sink substrate by a process or the like.
[第 1実施例]  [First embodiment]
図 1は、 本発明の第 1実施例に係るインクジエツト記録へッドのヒータ 基板に設けられているヒータ駆動回路の構成を説明する回路図である。 図 1において、 1 0 1 ^〜1 0 1 l xは記録を行うためのヒータ (ヒー夕 抵抗) を示し、 各ヒータが通電されて熱を発生することにより、 各対応す るノズルからインク滴が吐出される。 即ち、 このヒー夕基板を使用した記 録ヘッドでは、 各ヒータに対応してインクを吐出するための吐出口 (ノズ ル) が設けられている。 ここで、 これらヒ一タ 1 0 1 u〜l 0 1 l xは、 プ ロック 1〜mに分割されており、 各ブロックには X個のヒータと、 各ヒ一 夕に対応して設けられた X個の NMO Sトランジスタが含まれている。 1 02„〜102lxは、それぞれ対応するヒータへの通電をオン Zオフする ための NMOSトランジスタである。 103 u〜l 03 lxは定電流源で、 各ヒータに対応して設けられている。 これら定電流源 103 u〜l 03 lx のそれぞれは、 NMOSトランジスタ 102 ^〜丄 02 lxのそれぞれとヒ 一夕群 1011:ί〜101のそれぞれに直列に接続されており、各電流源 103u〜l 03は、 その接続端子に定電流を出力する。 この定電流値 の大きさは基準電流回路 105からの制御信号により調節される。 104 は制御回路で、 記録すべき記録データに応じて各 NMOS卜ランジス夕 1 02のオン オフを制御している。 基準電流回路 105は、 制御信号 11 0を定電流源 103„〜103に出力し、各定電流源で発生される定電 流値を制御している。 106及び 107は基板外部の電源部 (図示せず) に接続される電源パッドで、 これら電源パッドを介してヒータ駆動用の電 力が供給される。 108, 109のそれぞれは、 各電源パッド 106, 1 07からブロック l〜mに、 ヒータ駆動用の電力を供給している電源ライ ンである。 FIG. 1 is a circuit diagram illustrating a configuration of a heater drive circuit provided on a heater substrate of an inkjet recording head according to a first embodiment of the present invention. In FIG. 1, 101 ^ to 101 lx indicate heaters (heat resistances) for printing, and when each heater is energized to generate heat, ink droplets are emitted from each corresponding nozzle. Discharged. That is, in a recording head using this heater substrate, ejection ports (nozzles) for ejecting ink are provided corresponding to the respective heaters. Here, these heaters 101 ul to 101 lx are divided into blocks 1 to m, and each block is provided with X heaters and corresponding heaters. X NMOS transistors are included. One 02 "to 102 lx are each NMOS transistors for turning on Z off the power supply to the corresponding heater. 103 u~l 03 lx is provided a constant current source, corresponding to each heater. These each of the constant current source 103 u~l 03 lx, NMOS transistors 102 ^ ~丄02 lx, respectively and heat Isseki group 101 1: ί ~101 are connected in series to each 1Kai, each current source 103u~ l 03 outputs a constant current to the connection terminal The magnitude of this constant current value is adjusted by a control signal from the reference current circuit 105. 104 is a control circuit, which corresponds to the recording data to be recorded. Controls on / off of each NMOS transistor 102. The reference current circuit 105 outputs a control signal 110 to the constant current sources 103 „to 103 , and the constant current generated by each constant current source Controlling the value. 106 and 107 are power supply pads connected to a power supply unit (not shown) outside the substrate. Electric power for driving the heater is supplied through these power supply pads. Each of 108 and 109 is a power supply line for supplying electric power for driving the heater from each of the power supply pads 106 and 107 to the blocks 1 to m.
[ヒータ駆動回路の動作]  [Operation of heater drive circuit]
図 2は、 1個のヒータと 1個の NMOSトランジスタと 1個の定電流源 を含む回路の等価回路を示す図、 図 3はその駆動信号及び各ヒ一夕を流れ る電流を説明するタイミングチヤ一トである。  Fig. 2 is a diagram showing an equivalent circuit of a circuit including one heater, one NMOS transistor, and one constant current source. Fig. 3 shows the drive signal and the timing explaining the current flowing through each heater. This is a chart.
図 2において、 信号 VGは、 図 1の制御回路 104から供給される画像 信号に応じた記録信号である。 なお、 制御回路 104の構成としては、 シ フ卜レジス夕、 ラッチなどの画像信号を制御する回路でもよい。 信号 VC は、 基準電流回路 105から定電流源 203に供給される制御信号で、 図 1の制御信号 110に相当しており、 この制御信号 VCに応じて定電流源 203 (図 1の定電流源 1031]L〜103に相当) により発生される電 流値が制御される。 また電源 VHは、 このヒータ 201の駆動用電圧源を 示している。 NMOSトランジスタ 202は、 ここでは簡単のために理想的にドレイ ンとソースの 2端子のスィッチとして動作すると考え、 信号 VGの信号レ ベルがハイレベルのときにオン (ドレイン一ソース間が短絡) し、 口ウレ ベルでオフ (ドレイン—ソース間が開放) するものとして説明する。 定電 流源 203は、 その端子間にある電圧が印加されると、 制御信号 VCによ り設定された一定電流を端子間に (図においては上から下へ) 流すものと する。 2, a signal VG is a recording signal corresponding to an image signal supplied from the control circuit 104 in FIG. Note that the configuration of the control circuit 104 may be a circuit that controls an image signal such as a shift register and a latch. The signal VC is a control signal supplied from the reference current circuit 105 to the constant current source 203, and corresponds to the control signal 110 in FIG. 1. According to the control signal VC, the constant current source 203 (the constant current in FIG. source 103 1] L ~103 corresponding to 1Kai) by the emitted electrostatic current values are controlled. The power supply VH indicates a voltage source for driving the heater 201. Here, for simplicity, it is assumed that the NMOS transistor 202 ideally operates as a switch between the drain and source terminals. When the signal level of the signal VG is high, the NMOS transistor 202 turns on (short circuit between the drain and source). It is assumed that it is turned off at the mouth level (open between the drain and source). When a voltage between the terminals is applied to the constant current source 203, a constant current set by the control signal VC flows between the terminals (from the top to the bottom in the figure).
図 3は、 この信号 VGの発生タイミングと、 その時にヒータ 201に流 れる電流の波形を示す図である。  FIG. 3 is a diagram showing the generation timing of the signal VG and the waveform of the current flowing to the heater 201 at that time.
図 3において、時間 tlまでの期間では、信号 VGがロウレベルであり、 この期間では、 定電流源 203の出力とヒータ 201は遮断されているた め、 ヒータ 201には電流が流れない。次に時間 t 1力 ^ら t 2までの期間で は、 信号 VGがハイレベルになって、 NMOSトランジスタ 202のソ一 スードレイン間が通電し、 定電流源 203の出力電流がヒ一夕 201に流 れる。 そして時間 t 2以降では信号 VGがロウレベルになり、 ヒータ 20 1への通電が遮断される。  In FIG. 3, the signal VG is at a low level during a period up to a time tl. In this period, since the output of the constant current source 203 and the heater 201 are cut off, no current flows through the heater 201. Next, during the period from the time t1 to the time t2, the signal VG goes to the high level, the current flows between the source and the drain of the NMOS transistor 202, and the output current of the constant current source 203 becomes high. Flows to Then, after time t2, the signal VG becomes low level, and the power supply to the heater 201 is cut off.
ヒータ 201への電流の通電時間は信号 VGのパルス幅により制御され、 ヒータ 201を流れる電流 I hの大きさは、 定電流源 203の制御信号 V Cにより制御される。 図 3の例では、 ヒ一夕 201を流れる電流は、 制御 信号 VCに応じた寧流値 I 1〜 I 3で示されている。  The current supply time to the heater 201 is controlled by the pulse width of the signal VG, and the magnitude of the current Ih flowing through the heater 201 is controlled by the control signal VC of the constant current source 203. In the example of FIG. 3, the current flowing through the sun 201 is represented by numeration values I1 to I3 corresponding to the control signal VC.
図 3に示すように、 信号 VGのパルス幅に応じた時間 t 1から時間 t 2 までの期間、 制御信号 VCにより決定された定電流値 I (11〜13) がヒ 一夕 201を流れる。 これにより、 ヒータ 201に対応して設けられたノ ズル (流路) 内に存在するインクが加熱されて発泡し、 そのヒータに対応 するノズルからインクが吐出することにより、 所定画素 (ドット) が記録 される。  As shown in FIG. 3, the constant current value I (11 to 13) determined by the control signal VC flows through the light source 201 during a period from time t1 to time t2 according to the pulse width of the signal VG. As a result, the ink existing in the nozzle (flow path) provided corresponding to the heater 201 is heated and foamed, and the ink is ejected from the nozzle corresponding to the heater, so that a predetermined pixel (dot) is formed. Recorded.
以上の構成により、 基準電流回路 105により定電流源 203により流 される定電流値が決定され、 その決定された電流値は、 信号 VGにより駆 動される NMOSトランジスタ 202がオンになっている期間だけ、 ヒー 夕 201を流れることになる。 With the above configuration, current flows from the constant current source 203 by the reference current circuit 105. The determined constant current value is determined, and the determined current value flows through the heater 201 only while the NMOS transistor 202 driven by the signal VG is on.
上記説明では、 NMOSトランジスタ 202がオンのときはソース—ド レイン間が短絡するものとして説明したが、 実際には、 NMOSトランジ スタ 202がオンの時は、 ソース一ドレイン間に抵抗が存在するが、 この 抵抗における電圧降下分に対し十分に高い電源電圧を設定することで、 定 電流源の出力電流がそのままヒータに印加されるため、 上記ヒータの駆動 の説明となんら変わらない動作が実行される。  In the above description, it is described that the source and the drain are short-circuited when the NMOS transistor 202 is on. However, when the NMOS transistor 202 is on, there is a resistance between the source and the drain. By setting the power supply voltage high enough for the voltage drop in this resistor, the output current of the constant current source is applied to the heater as it is, so that the same operation as the above description of driving the heater is performed. .
[第 2実施例]  [Second embodiment]
図 4は、 前述の第 1実施例の図 1の定電流源 103を NMOSトランジ スタ 401 n〜401 lxで構成した例を示す図で、図 1と共通する部分は 同じ記号で示し、 その説明を省略する。 FIG. 4 is a diagram showing an example in which the constant current source 103 of FIG. 1 of the first embodiment described above is constituted by NMOS transistors 401 n to 401 lx . Portions common to FIG. Is omitted.
NMOSトランジスタ 401„〜401 lxの各ドレインは、スィッチン グ用の NMOSトランジスタ 102 u〜l 02 lxの各ソースにそれぞれ 接続される。 NMOSトランジスタ 401 u〜401 lxのゲートは、 基準 電流回路 105よりの制御信号 110に接続されている。 これにより、 各 ヒータを流れる電流値は、 基準電流回路 105からの制御信号 110によ り制御される NMOSトランジスタ 401 u〜401 lxのゲート電圧に より制御される。 NMOS transistor 401 'to 401 drains of lx are connected to the NMOS transistor 102 u~l 02 lx each source for Suitchin grayed. NMOS transistor 401 U~401 lx gates of the reference current circuit 105 are connected. Thus the control signal 110, the value of the current flowing through the respective heaters are more controlled NMOS transistor 401 u~401 lx gate voltage by Ri controlled by a control signal 110 from the reference current circuit 105 .
次に、図 4の NMOSトランジスタ 401 u〜401 lxの動作について 図 5及び図 6を参照して説明する。 Next, the operation of the NMOS transistors 401 u to 401 lx in FIG. 4 will be described with reference to FIGS.
図 5は、 NMOSトランジスタ 401 n〜401 lxに用いられる NMO Sトランジスタの一般的な静特性例を示す図で、 そのバイアス条件を図 6 に示す。 FIG. 5 is a diagram showing a typical static characteristic example of the NMOS transistor used for the NMOS transistors 401 n to 401 lx , and FIG. 6 shows the bias conditions thereof.
図 5は、 ゲート電圧 Vgをパラメ一夕にしてドレイン電圧 Vd sを変化 させたときのドレイン電流 I dの特性を示している。 図 5におけるドレイ ン電圧 V d sの変化に対してドレイン電流 I dの変化の少ない領域 (飽和 領域等) で動作するように、 図 4における NMOSトランジスタ 401 u 〜401 lxのゲート電圧 Vg及びドレイン電圧 Vd sを設定する。 これに より NMOSトランジスタ 401 1〜401 lxのドレイン電圧 Vd sに 大きく依存しない出力電流を得ることができる。 前述のように、 図 4に示 す NMOSトランジスタ 401 η〜401は、各ヒータに一定電流を流 す定電流源として動作する。 また、 NMOSトランジスタ 401 u〜40 1 lxのゲート電圧 Vgに応じてドレイン電流 I dが変化するため、 ゲート 電圧 V gを通じて各ヒータに流す電流値を所望の電流値に設定するように 制御することができる。 NMOSトランジスタ 401 u〜401 lxのソー スドレイン間の電流一電圧特性であるオン抵扰特性は、 ゲート電圧 V g、 即ち、 制御信号 110により制御することができ、 このオン抵抗値を制御 することで、 各ヒータに所望の定電流を供給することができる。 FIG. 5 shows the characteristics of the drain current Id when the drain voltage Vds is changed with the gate voltage Vg being a parameter. Dray in Figure 5 The gate voltage Vg and the drain voltage Vds of the NMOS transistors 401 u to 401 lx in FIG. 4 are set so as to operate in a region where the drain current Id does not change much with the change in the drain voltage Vds (saturation region, etc.). I do. As a result, it is possible to obtain an output current that does not largely depend on the drain voltages Vds of the NMOS transistors 401 1 to 401 lx . As described above, the NMOS transistors 401 η to 4011χ shown in FIG. 4 operate as a constant current source that supplies a constant current to each heater. In addition, since the drain current Id changes according to the gate voltage Vg of the NMOS transistors 401 u to 401 lx , control is performed so that the current value flowing to each heater through the gate voltage Vg is set to a desired current value. Can be. The on-resistance characteristic, which is the current-voltage characteristic between the source and drain of the NMOS transistors 401 u to 401 lx , can be controlled by the gate voltage V g, that is, the control signal 110. By controlling this on-resistance value, A desired constant current can be supplied to each heater.
[第 3実施例]  [Third embodiment]
図 7は、図 4に示す NMOSトランジスタ 401„〜401 lxのドレイ ンに更に NMOSトランジスタ 701 u〜701 lxのソースを接続し、 N MOSトランジスタ 2段を直列にカスケード接続して定電流源 203 (図 2) を形成した例を示す回路図である。 尚、 前述の図 1及び図 4と共通す る部分は同じ記号で示し、 それらの説明を省略する。 尚、 この第 3実施例 では、 2段の場合で説明するが、 本願発明は、 これ以上の多段の場合にも 適用できることはもちろんである。 FIG. 7 shows that the drains of the NMOS transistors 401 „to 401 lx shown in FIG. 4 are further connected to the sources of the NMOS transistors 701 u to 701 lx , and two NMOS transistors are cascaded in series to form a constant current source 203 ( 5 is a circuit diagram showing an example in which FIG. 2 is formed. In addition, parts common to FIGS. 1 and 4 described above are denoted by the same reference numerals, and description thereof will be omitted. The case of two stages will be described, but the present invention can of course be applied to a case of more stages.
ここで、 NMOSトランジスタ 701 u〜701 lxの各ゲートも、基準 電流回路 105に接続されている。 ここで NMOSトランジスタ 701 u 〜701 lxはゲート接地トランジスタとして動作し、 NMOSトランジス 夕 A O l n O l lxのドレイン電圧を NMOS yo iu Y o i の' ゲート—ソース間電位により固定するものである。 ここでは、 基準電流回 路 105は、 NMOSトランジスタ 401 n〜401 をドレイン電圧 V dsの変化に対してドレイン電流 Idの変化が少ない飽和領域等の領域で動 作させるように、 制御信号 111により、 NMOS 701 u〜701 lxの ゲート電圧を設定している。 NMOSトランジスタ 701 u〜701 lxの ドレインの電圧変動に対し、 MOSトランジスタ 701 u〜701 lxのソ ース電圧は、 そのゲート電圧を固定することでゲート—ソース間の僅かな 電位変動に抑えることができる。 Here, each gate of the NMOS transistors 701 u to 701 lx is also connected to the reference current circuit 105. Here, the NMOS transistors 701 u to 701 lx operate as gate-grounded transistors, and fix the drain voltage of the NMOS transistor AO ln O lx by the potential between the gate and the source of the NMOS yo iu Yoi. Here, the reference current circuit 105 connects the NMOS transistors 401 n to 401 to the drain voltage V As to the region in behavior of the saturation region or the like with little change in the drain current Id with respect to a change in ds, the control signal 111, which sets the gate voltage of NMOS 701 u~701 lx. The source voltage of the MOS transistors 701 u to 701 lx can be suppressed to a small potential change between the gate and the source by fixing the gate voltage with respect to the voltage fluctuation of the drain of the NMOS transistors 701 u to 701 lx. it can.
この図 7の回路構成によれば、 電源電圧の変動ゃスィツチング用の NM OSトランジスタ 102 n〜l 02 lxのオン抵抗値や配線抵抗値の変動 に対して、 図 4の回路に比較して、 定電流源として動作する NMOSトラ ンジス夕 401 u〜401 lxのドレイン電圧の変動を低く抑えることが できる。 According to the circuit configuration of FIG. 7, the fluctuation of the power supply voltage NM the fluctuation of the on-resistance value and the wiring resistance value of the switching NMOS transistors 102 n to l 02 lx compared to the circuit of FIG. Fluctuations in the drain voltage of the NMOS transistors 401 u to 401 lx operating as a constant current source can be suppressed.
図 8 Aは、図 7の NMOSトランジスタ 701 u〜701 lxと NMOS トランジスタ 401 u〜401 lxの 1回路分の電流出力特性例を示す図、 図 8Bは、 そのバイアス条件を示す図である。 Figure 8 A is a diagram showing a current output characteristic example of the NMOS transistor 701 U~701 lx and the NMOS transistor 401 u~401 1 circuit portion of lx 7, FIG. 8B is a diagram illustrating the bias conditions.
図 8 Aは、 図 8 Bにおいて、 NMOS卜ランジス夕 701のゲートに一 定電圧を印加して、 NMOSトランジスタ 401のゲート電圧をパラメ一 夕に、 NMOSトランジスタ 701のドレイン電圧を変化させたときの出 力電流値を示したものである。 この場合は、 図 2に比較して、 NMOSト ランジスタ 701のドレイン電圧の変化に対する出力電流の変動が少ない ものとなっている。  FIG. 8A shows a case where a constant voltage is applied to the gate of the NMOS transistor 701 in FIG. 8B and the drain voltage of the NMOS transistor 701 is changed in parallel with the gate voltage of the NMOS transistor 401. It shows the output current value. In this case, the change in the output current with respect to the change in the drain voltage of the NMOS transistor 701 is smaller than that in FIG.
[第 4実施例]  [Fourth embodiment]
図 9は、 図 4の回路に、 基準電流回路 105の具体的な構成例を追加し て示す回路図である。  FIG. 9 is a circuit diagram illustrating the circuit of FIG. 4 with a specific configuration example of the reference current circuit 105 added.
この基準電流回路 105は、 NMOSトランジスタ 901を基準として、 NMOSトランジスタ 401„〜401 lxのドレインから電流を出力を するカレントミラー回路を構成している。 NMOSトランジスタ 901は、 ゲートとドレインがダイォード接続され、 その接続点に基準電流源 902 が接続される。 NMOSトランジスタ 901のゲートは、 NMOSトラン ジス夕 401:^〜 01 lxのゲートに共通接続される。 NMOSトランジ ス夕 901と NMOSトランジスタ 401 u〜401 lxのゲートサイズ が等しい場合、 NMOSトランジスタ 901と NMOSトランジスタ 40 1 u〜401 lxのゲート電圧が等しくなり、基準電流源 902による基準 電流と等しい電流が、 NMOSトランジスタ 401 u〜401 lxのドレイ ンより出力される。 また、 NMOSトランジスタ 901と NMOSトラン ジス夕 4011:L〜401 lxのゲートサイズが異なる場合は、 NMOSトラ ンジス夕 901と NMOSトランジスタ 401„〜401 lxのゲートサ ィズ比に対応した基準電流に比例した一定の出力電流が得られる。 The reference current circuit 105 constitutes a current mirror circuit that outputs a current from the drains of the NMOS transistors 401 „to 401 lx based on the NMOS transistor 901. The NMOS transistor 901 has a gate and a drain that are diode-connected. The reference current source 902 Is connected. The gate of the NMOS transistor 901 is commonly connected to the gate of the NMOS transistor 401: ^ to 01 lx . When the gate size of the NMOS transient scan evening 901 and NMOS transistor 401 u~401 lx are equal, a gate voltage of the NMOS transistor 901 and the NMOS transistor 40 1 u~401 lx become equal, the reference current equal current by a reference current source 902 Output from the drains of the NMOS transistors 401 u to 401 lx . If the gate sizes of NMOS transistor 901 and NMOS transistor 4011 : L to 401 lx are different, it is proportional to the reference current corresponding to the gate size ratio of NMOS transistor 901 and NMOS transistor 401 „to 401 lx. A constant output current is obtained.
[第 5実施例]  [Fifth embodiment]
図 10は、 図 7の回路に、 基準電流回路 105の具体的な構成例を追加 して示す回路図である。  FIG. 10 is a circuit diagram showing the circuit of FIG. 7 with a specific configuration example of the reference current circuit 105 added.
ここでは、 NMOSトランジスタ 701 u〜701 lxのゲートを、基準 電流回路 105の NMOS卜ランジス夕 1001のゲートに接続している。 NMO Sトランジス夕 1001は、 ゲートとドレインがダイォ一ド接続さ れて、一定電圧を NMOSトランジスタ 701„〜701 lxのゲートに与 えるものである。 Here, the gates of the NMOS transistors 701 u to 701 lx are connected to the gate of the NMOS transistor 1001 of the reference current circuit 105. NMO S transistor evening 1001, gate and drain are Daio one de connection, in which can grant a constant voltage to the NMOS transistor 701 "~701 lx gate.
図 10の構成により、 NMOSトランジスタ 1001と NMOSトラン ジスタ 701„〜701 lxのゲート一ソース間電圧がほぼ等しくなるこ とから、 NMOSトランジスタ 901と NMOSトランジスタ 401 〜 401 lxのドレイン電圧も等しくなる。 このように、 NMOSトランジス 夕 901と NMOSトランジスタ 401 n〜401 lxのゲート電圧とド レイン電圧が等しくなることで、 基準電流源 902による基準電流が NM OSトランジスタ 701 u〜701 lxのドレイン電圧に依存せずに、 NM OSトランジスタ 401 u〜401 lxの出力電流に高精度にミラーされ る。 以上説明したように本実施例によれば、 ヒータに定電流を流すための定 電流源回路と、 電流の印加時間を制御するスイッチング回路とを NMO S トランジスタを用いて構成することができる。 The configuration of FIG. 10, the NMOS transistor 1001 and NMOS Tran register 701 "~701 lx gate first source voltage is substantially equal to this, the drain voltage of the NMOS transistor 901 and NMOS transistors 401 ~ 401 lx be equal. The Thus, by making the gate voltage and drain voltage of the NMOS transistor 901 and the NMOS transistors 401 n to 401 lx equal, the reference current from the reference current source 902 depends on the drain voltages of the NMOS transistors 701 u to 701 lx. Instead, it is accurately mirrored by the output currents of the NMOS transistors 401 u to 401 lx . As described above, according to this embodiment, a constant current source circuit for supplying a constant current to the heater and a switching circuit for controlling the current application time can be configured using the NMOS transistor.
また、 このスイッチング回路の MO Sトランジスタの耐電圧を、 定電流 源回路の MO Sトランジスタの耐電圧よりも高く設定するのが望ましい。 また本実施例によれば、 ヒータの駆動時に一定電流を流し、 その一定電 流の電流値を調整して制御することができる。 こうして各ヒータに対して 均一なエネルギーを印加することが可能となる。  It is also desirable to set the withstand voltage of the MOS transistor of this switching circuit higher than the withstand voltage of the MOS transistor of the constant current source circuit. Further, according to the present embodiment, a constant current can be supplied when the heater is driven, and the current value of the constant current can be adjusted and controlled. Thus, uniform energy can be applied to each heater.
また、 上記各実施例の図 1 , 4, 7 , 9 , 1 0等の回路構成は 1つの素 子基板に作りこまれていても良い。 また、 基準電流回路は素子基板外に設 けられた回路であってもよいが、 同一素子基板に作りこまれている方が望 ましい。  Further, the circuit configurations of FIGS. 1, 4, 7, 9, 10 and the like in each of the above embodiments may be formed on one element substrate. Although the reference current circuit may be a circuit provided outside the element substrate, it is preferable that the reference current circuit is formed on the same element substrate.
次に、 上述した構成のヒータ基板を備えるインクジェットヘッドと、 そ のインクジエツトへッドを搭載したインクジエツト記録装置の例を説明す る。  Next, an example of an ink jet head having the above-described heater substrate and an ink jet recording apparatus equipped with the ink jet head will be described.
図 1 5は、 本発明の代表的な実施例であるインクジェット記録装置 1の 構成の概要を示す外観斜視図である。  FIG. 15 is an external perspective view showing an outline of a configuration of an ink jet recording apparatus 1 which is a typical embodiment of the present invention.
図 1 5に示すように、 インクジェット記録装置(以下、 記録装置という) は、 インクジエツ卜方式に従ってインクを吐出して記録を行なう記録へッ ド 3を搭載したキヤリッジ 2にキヤリッジモー夕 M 1によって発生する駆 動力を伝達機構 4より伝え、 キヤリッジ 2を矢印 A方向に往復移動させる とともに、例えば、記録紙などの記録媒体 Pを給紙機構 5'を介して給紙し、 記録位置まで搬送し、 その記録位置において記録へッド 3から記録媒体 P にインクを吐出することで記録を行なう。 また、 記録ヘッド 3の状態を良 好に維持するためにキャリッジ 2を回復装置 1 0の位置まで移動させ、 間 欠的に記録へッド 3の吐出回復処理を行う。  As shown in FIG. 15, an ink jet recording apparatus (hereinafter, referred to as a recording apparatus) is generated by a carriage motor M 1 on a carriage 2 equipped with a recording head 3 for performing recording by discharging ink according to an ink jet system. The driving force is transmitted from the transmission mechanism 4, the carriage 2 is reciprocated in the direction of arrow A, and, for example, a recording medium P such as recording paper is fed through the paper feeding mechanism 5 'and conveyed to the recording position. At the recording position, recording is performed by ejecting ink from the recording head 3 onto the recording medium P. In addition, in order to maintain the state of the recording head 3 in a good state, the carriage 2 is moved to the position of the recovery device 10, and the ejection recovery processing of the recording head 3 is performed intermittently.
記録装置 1のキヤリッジ 2には記録へッド 3を搭載するのみならず、 記 録へッド 3に供給するィンクを貯留するィンクカートリッジ 6を装着する。 インクカートリッジ 6はキヤリッジ 2に対して着脱自在になっている。 図 1 5に示した記録装置 1はカラー記録が可能でり、 そのためにキヤリ ッジ 2にはマゼンタ (M)、 シアン (C)、 イエロ (Y)、 ブラック (Κ) の インクを夫々、 収容した 4つのインクカートリッジを搭載している。 これ ら 4つのィンクカートリッジは夫々独立に着脱可能である。 In addition to mounting the recording head 3 on the carriage 2 of the recording device 1, The ink cartridge 6 for storing the ink to be supplied to the recording head 3 is installed. The ink cartridge 6 is detachable from the carriage 2. The recording device 1 shown in Fig. 15 is capable of color recording, so that the carriage 2 contains magenta (M), cyan (C), yellow (Y), and black (Κ) inks, respectively. It has four ink cartridges. Each of these four ink cartridges is independently removable.
さて、 キャリッジ 2と記録ヘッド 3とは、 両部材の接合面が適正に接触 されて所要の電気的接続を達成維持できるようになつている。 記録へッド 3は、 記録信号に応じてエネルギーを印加することにより、 複数の吐出口 からインクを選択的に吐出して記録する。 特に、 この実施例の記録ヘッド 3は、 熱エネルギーを利用してインクを吐出するインクジエツト方式を採 用し、 熱エネルギーを発生するために電気熱変換体を備え、 その電気熱変 換体に印加される電気エネルギーが熱エネルギーへと変換され、 その熱ェ ネルギーをインクに与えることにより生じる膜沸騰による気泡の成長、 収 縮によって生じる圧力変化を利用して、 吐出口よりインクを吐出させる。 この電気熱変換体は各吐出口のそれぞれに対応して設けられ、 記録信号に 応じて対応する電気熱変換体にパルス電圧を印加することによって対応す る吐出口からインクを吐出する。  The carriage 2 and the recording head 3 are designed so that the joint surfaces of the two members are properly contacted to achieve and maintain the required electrical connection. The recording head 3 performs recording by selectively discharging ink from a plurality of discharge ports by applying energy according to a recording signal. In particular, the recording head 3 of this embodiment employs an ink-jet method in which ink is ejected using thermal energy, has an electrothermal converter for generating thermal energy, and is applied to the electrothermal converter. The electrical energy is converted into thermal energy, and the thermal energy is applied to the ink. The ink is ejected from the ejection port using the pressure change caused by bubble growth and shrinkage caused by film boiling caused by applying the thermal energy to the ink. The electrothermal converter is provided corresponding to each of the discharge ports, and discharges ink from the corresponding discharge port by applying a pulse voltage to the corresponding electrothermal converter in accordance with a recording signal.
図 1 5に示されているように、 キャリッジ 2はキャリッジモ一夕 M lの 駆動力を伝達する伝達機構 4の駆動ベルト 7の一部に連結されており、 ガ ィドシャフト 1 3に沿って矢印 A方向に摺動自在に案内支持されるように なっている。 従って、 キャリッジ 2は、 キャリッジモータ M lの正転及び 逆転によってガイドシャフト 1 3に沿って往復移動する。 また、 キヤリツ ジ 2の移動方向 (矢印 A方向) に沿ってキャリッジ 2の絶対位置を示すた めのスケール 8が備えられている。 この実施形態では、 スケール 8は透明 な P E Tフィルムに必要なピッチで黒色のバ一を印刷したものを用いてお り、 その一方はシャーシ 9に固着され、 他方は板パネ (不図示) で支持さ れている。 As shown in FIG. 15, the carriage 2 is connected to a part of the drive belt 7 of the transmission mechanism 4 for transmitting the drive force of the carriage motor Ml, and the arrow A along the guide shaft 13 The guide is slidably guided in the direction. Therefore, the carriage 2 reciprocates along the guide shaft 13 by the forward and reverse rotation of the carriage motor Ml. Further, a scale 8 is provided to indicate the absolute position of the carriage 2 along the movement direction of the carriage 2 (the direction of arrow A). In this embodiment, the scale 8 uses a black PET printed on a transparent PET film at a required pitch, one of which is fixed to the chassis 9 and the other is supported by a panel panel (not shown). Sa Have been.
また、 記録装置 1には、 記録ヘッド 3の吐出口 (不図示) が形成された 吐出口面に対向してプラテン (不図示) が設けられており、 キャリッジモ 一夕 M 1の駆動力によって記録へッド 3を搭載したキヤリッジ 2が往復移 動されると同時に、 記録ヘッド 3に記録信号を与えてインクを吐出するこ とによって、 プラテン上に搬送された記録媒体 Pの全幅にわたって記録が 行われる。  Further, the printing apparatus 1 is provided with a platen (not shown) opposed to the discharge port surface on which the discharge port (not shown) of the recording head 3 is formed. At the same time as the carriage 2 on which the head 3 is mounted is reciprocated, a recording signal is applied to the recording head 3 to eject ink, thereby performing recording over the entire width of the recording medium P conveyed on the platen. Is
さらに、 図 1 5において、 1 4は記録媒体 Pを搬送するために搬送モ一 夕 M 2によって駆動される搬送ローラ、 1 5はバネ (不図示) により記録 媒体 Pを搬送ローラ 1 4に当接するピンチローラ、 1 6はピンチローラ 1 5を回転自在に支持するピンチローラホルダ、 1 7は搬送ローラ 1 4の一 端に固着された搬送ローラギアである。 そして、 搬送ローラギア 1 7に中 間ギア (不図示) を介して伝達された搬送モー夕 M 2の回転により、 搬送 ローラ 1 4が駆動される。  Further, in FIG. 15, reference numeral 14 denotes a conveying roller driven by the conveying motor M2 to convey the recording medium P, and reference numeral 15 denotes a recording medium P applied to the conveying roller 14 by a spring (not shown). A pinch roller 16 is in contact with the pinch roller 16, a pinch roller holder rotatably supporting the pinch roller 15, and 17 is a transport roller gear fixed to one end of the transport roller 14. Then, the transport roller 14 is driven by the rotation of the transport mode M2 transmitted to the transport roller gear 17 via an intermediate gear (not shown).
またさらに、 2 0は記録へッド 3によって画像が形成された記録媒体(シ —ト) Pを記録装置外へ排出するための排出ローラであり、 搬送モー夕 M 2の回転が伝達されることで駆動されるようになっている。 なお、 排出口 —ラ 2 0は記録媒体 Pをパネ (不図示) により圧接する拍車ローラ (不図 示) により当接する。 2 2は拍車ローラを回転自在に支持する拍車ホルダ である。  Further, reference numeral 20 denotes a discharge roller for discharging the recording medium (sheet) P on which an image has been formed by the recording head 3 to the outside of the recording apparatus, and the rotation of the conveyance mode M2 is transmitted. It is adapted to be driven. The discharge port L20 is brought into contact with a spur roller (not shown) which presses the recording medium P with a panel (not shown). 22 is a spur holder for rotatably supporting the spur roller.
またさらに、 記録装置 1には、 図 1 5に示されているように、 記録へッ ド 3を搭載するキヤリッジ 2の記録動作のための往復運動の範囲外 (記録 領域外) の所望位置 (例えば、 ホームポジションに対応する位置) に、 記 録へッド 3の吐出不良を回復するための回復装置 1 0が配設されている。 回復装置 1 0は、 記録へッド 3の吐出口面をキヤッピングするキヤッピ ング機構 1 1と記録へッド 3の吐出口面をクリーニングするワイピング機 構 1 2を備えており、 キヤッビング機構 1 1による吐出口面のキヤッピン グに連動して回復装置内の吸引手段 (吸引ポンプ等) により吐出口からィ ンクを強制的に排出させ、 それによつて、 記録ヘッド 3のインク流路内の 粘度の増したインクや気泡等を除去するなどの吐出回復処理を行う。 また、 非記録動作時等には、 記録ヘッド 3の吐出口面をキヤッビング機 構 11によるキヤッビングすることによって、 記録ヘッド 3を保護すると ともにインクの蒸発や乾燥を防止することができる。 一方、 ワイピング機 構 12はキヤッピング機構 11の近傍に配され、 記録へッド 3の吐出口面 に付着したインク液滴を拭き取るようになつている。 Further, as shown in FIG. 15, the recording apparatus 1 has a desired position (outside the recording area) outside the range of the reciprocating movement (outside the recording area) for the recording operation of the carriage 2 on which the recording head 3 is mounted. For example, at a position corresponding to the home position), a recovery device 10 for recovering the ejection failure of the recording head 3 is provided. The recovery device 10 includes a capping mechanism 11 1 for capping the discharge port surface of the recording head 3 and a wiping mechanism 12 2 for cleaning the discharge port surface of the recording head 3. Capping of the discharge port surface by The ink is forcibly ejected from the ejection port by a suction means (suction pump or the like) in the recovery device in conjunction with the ink jetting, thereby increasing the viscosity of the ink or air bubbles in the ink flow path of the recording head 3. An ejection recovery process such as removal of the ink is performed. In addition, during non-printing operation or the like, the ejection opening surface of the recording head 3 is cabbed by the cabbing mechanism 11, thereby protecting the recording head 3 and preventing evaporation and drying of the ink. On the other hand, the wiping mechanism 12 is arranged in the vicinity of the capping mechanism 11 and wipes ink droplets adhered to the ejection opening surface of the recording head 3.
これらキヤッピング機構 11及びワイビング機構 12により、 記録へッ ド 3のインク吐出状態を正常に保つことが可能となっている。  The capping mechanism 11 and the wiping mechanism 12 make it possible to keep the ink ejection state of the recording head 3 normal.
<インクジエツト記録装置の制御構成 (図 16) >  <Control structure of ink jet recording device (Fig. 16)>
図 16は図 15に示した記録装置の制御構成を示すブロック図である。 図 16に示すように、 コントローラ 600は、 MPU601、 後述する 制御シーケンスに対応したプログラム、 所要のテーブル、 その他の固定デ 一夕を格納した ROM602、 キャリッジモ一夕 Mlの制御、 搬送モー夕 M2の制御、 及び、 記録ヘッド 3の制御のための制御信号を生成する特殊 用途集積回路 (AS I C) 603、 画像データの展開領域やプログラム実 行のための作業用領域等を設けた RAM 604、 MPU601、 AS I C 603、 RAM 604を相互に接続してデータの授受を行うシステムバス 605、 以下に説明するセンサ群からのアナログ信号を入力して AZD変 換し、 デジタル信号を MPU601に供給する A/D変換器 606などで 構成される。  FIG. 16 is a block diagram showing a control configuration of the printing apparatus shown in FIG. As shown in FIG. 16, the controller 600 includes an MPU 601, a program corresponding to a control sequence described later, a ROM 602 storing required tables, and other fixed data, control of a carriage mode Ml, and control of a transfer mode M2. A special-purpose integrated circuit (AS IC) 603 for generating a control signal for controlling the recording head 3; a RAM 604 provided with an image data development area and a work area for executing a program; A system bus 605 that interconnects the AS IC 603 and RAM 604 to exchange data, inputs analog signals from the sensors described below, converts them to AZD, and supplies digital signals to the MPU 601 A / D It consists of a converter 606 and so on.
また、 図 16において、 610は画像データの供給源となるコンビユー 夕 (或いは、 画像読取り用のリーダやデジタルカメラなど) でありホスト 装置と総称される。 ホスト装置 610と記録装置 1との間ではイン夕フエ —ス (IZF) 611を介して画像データ、 コマンド、 ステータス信号等 を送受信する。 さらに、 6 2 0はスィッチ群であり、 電源スィッチ 6 2 1、 プリント開 始を指令するためのプリントスィツチ 6 2 2、 及び記録へッド 3のィンク 吐出性能を良好な状態に維持するための処理 (回復処理) の起動を指示す るための回復スィッチ 6 2 3など、 操作者による指令入力を受けるための スィッチから構成される。 6 3 0はホームポジション hを検出するための フォトカブラなどの位置センサ 6 3 1、 環境温度を検出するために記録装 置の適宜の箇所に設けられた温度センサ 6 3 2等から構成される装置状態 を検出するためのセンサ群である。 In FIG. 16, reference numeral 610 denotes a combination (or a reader for reading images, a digital camera, or the like) serving as a supply source of image data, and is generally called a host device. Image data, commands, status signals, and the like are transmitted and received between the host device 610 and the recording device 1 via the interface (IZF) 611. Reference numeral 62 denotes a group of switches. The power switch 621, the print switch 62 for instructing the start of printing, and the ink for the recording head 3 for maintaining good ink ejection performance. It consists of a switch for receiving command input from the operator, such as a recovery switch 623 for instructing the start of processing (recovery processing). 630 is composed of a position sensor 631 such as a photo hood for detecting the home position h, and a temperature sensor 632 provided at an appropriate place of the recording device for detecting the environmental temperature. This is a group of sensors for detecting the device status.
さらに、 6 4 0はキャリッジ 2を矢印 A方向に往復走査させるためのキ ャリッジモータ M lを駆動させるキャリッジモ一夕ドライバ、 6 4 2は記 録媒体 Pを搬送するための搬送モータ M 2を駆動させる搬送モータドライ バである。  Further, 640 is a carriage motor driver for driving a carriage motor Ml for reciprocally scanning the carriage 2 in the direction of arrow A, and 640 is for driving a transport motor M2 for transporting the recording medium P. It is a transport motor driver.
A S I C 6 0 3は、 記録へッド 3による記録走査の際に、 R AM 6 0 2 の記憶領域に直接アクセスしながら記録へッドに対して記録素子 (吐出ヒ 一夕) の駆動データ (D ATA) を転送する。  The ASIC 603, when performing a print scan by the print head 3, directly accesses the storage area of the RAM 602 and drives the drive data (D ATA).
図 1 7は、 本実施例に係る記録へッドを含む記録へッドカートリッジの 構成を示す概観斜視図である。  FIG. 17 is a schematic perspective view showing the configuration of a recording head cartridge including the recording head according to the present embodiment.
この実施例における記録へッドカートリッジ 1 2 0 0は、 図に示すよう にインクを貯留するインクタンク 1 3 0 0と、 このインクタンク 1 3 0 0 から供給されるインクを記録情報に応じてノズルから吐出させる記録へッ ド 3とを有し、 記録ヘッド 3は、 キャリッジ 2に対して着脱可能に搭載さ れる、 いわゆるカートリッジ方式を採るものとなっている。 そして記録に 際しては、 記録へッドカートリッジ 1 2 0 0はキヤリッジ軸に沿って往復 走査され、 それに伴って記録シート上にカラー画像が記録される。 ここに 示す記録へッドカ一トリッジ 1 2 0 0では、 写真調の高画質な力ラー記録 を可能とするため、 インクタンクとして、 例えば、 ブラック、 ライトシァ ン (し C)、 ライトマゼン夕 (L M)、 シアン、 マゼン夕及びイエロ一の各 色独立のインクタンクが用意されており、 それぞれが記録へッド 3に対し て着脱自在となっている。 As shown in the figure, a recording head cartridge 1200 in this embodiment includes an ink tank 130 that stores ink and an ink supplied from the ink tank 130 according to recording information. The recording head 3 has a recording head 3 ejected from a nozzle, and the recording head 3 employs a so-called cartridge system which is removably mounted on the carriage 2. In recording, the recording head cartridge 1200 is reciprocally scanned along the carriage axis, and a color image is recorded on a recording sheet. In the recording head cartridge 1200 shown here, in order to enable high-quality color recording with photographic effects, ink tanks such as black, light cyan (C), light magenta (LM), Cyan, magenta and yellow Color independent ink tanks are provided, each of which is detachable from the recording head 3.
なお、 ここでの記録へッドカートリッジ 1 2 0 0は記録へッドに対して インクタンク 1 3 0 0が着脱できる形態を示しているが、 記録へッドとー 体化されたへッドカ一トリッジであっても良い。  Note that the recording head cartridge 1200 here shows a form in which the ink tank 1300 can be attached to and detached from the recording head. However, the recording head cartridge integrated with the recording head is shown. It may be one cartridge.
なお、 この図 1 7では、 6色のインクを使用する場合を示しているが、 図 1 5のように、 例えばブラック、 シアン、 マゼンタ及びイェローの 4色 のインクを使用して記録を行なうものでもよい。 その場合には、 4色それ ぞれ独立のィンクタンクが、 それぞれ記録へッド 3に対して着脱自在とな つていても構わない。  Fig. 17 shows a case where six colors of ink are used.However, as shown in Fig. 15, printing is performed using four colors of ink, for example, black, cyan, magenta and yellow. May be. In this case, independent ink tanks for each of the four colors may be detachably attached to the recording head 3.
また本実施例では、 NMO Sトランジスタを使用した回路例で説明した が本発明はこれに限定されるものでなく、 P MO Sトランジスタでも同様 に実現できることは言うまでもない。  Further, in this embodiment, an example of a circuit using an NMOS transistor has been described, but the present invention is not limited to this, and it is needless to say that a PMOS transistor can be similarly realized.
なお本発明は、複数の機器 (例えばホストコンピュータ、インタフェイス 機器、 リーダ、 プリンタなど)から構成されるシステムに適用しても、 一つ の機器からなる装置 (例えば、 複写機、 ファクシミリ装置など)に適用して も良い。  Even if the present invention is applied to a system including a plurality of devices (for example, a host computer, an interface device, a reader, a printer, etc.), a device including one device (for example, a copying machine, a facsimile machine, etc.) May be applied.
尚、 本実施例では、 インクジェット記録ヘッドの場合で説明したが本発 明はこれに限定されるものでなく、 例えばサーマルへッド等にも適用でき る。  In this embodiment, the case of the ink jet recording head has been described, but the present invention is not limited to this, and can be applied to, for example, a thermal head.
本発明は上述した実施例に限定されるものでなく種々の変更や修正が考 えられる。 よって、 本願発明の技術的範囲は、 以下の請求の範囲に基づい て決定される。  The present invention is not limited to the embodiments described above, and various changes and modifications can be considered. Therefore, the technical scope of the present invention is determined based on the following claims.

Claims

請求の範囲 The scope of the claims
1 . 複数の記録素子を有する記録ヘッドであって、  1. A recording head having a plurality of recording elements,
前記複数の記録素子のそれぞれに対応付けて設けられ、 それぞれ対応す る記録素子への通電を制御する複数のスィツチング回路と、  A plurality of switching circuits provided in association with each of the plurality of printing elements, for controlling energization of the corresponding printing elements;
前記複数の記録素子のそれぞれに対応して設けられ各記録素子に定電流 を流すための定電流源と、  A constant current source that is provided corresponding to each of the plurality of recording elements and that supplies a constant current to each of the recording elements;
前記定電流源により供給される前記定電流を制御する電流制御回路とを 有する。  A current control circuit for controlling the constant current supplied by the constant current source.
2 . 請求項 1に記載の記録へッドであつて、 前記定電流源は MO Sトラン ジスタを含み、 前記定電流源は前記定電流源の MO Sトランジスタのオン 抵抗を制御することにより前記定電流を出力する。 2. The recording head according to claim 1, wherein the constant current source includes a MOS transistor, and the constant current source controls the on-resistance of the MOS transistor of the constant current source. Outputs constant current.
3 . 請求項 2に記載の記録ヘッドであって、 前記電流制御回路は、 前記定 電流源の M〇 トランジス夕がドレイン電圧の変化に対してドレイン電流 の変化の少ない飽和領域で動作するように、 前記定電流源の MO Sトラン ジスタのゲ一ト電圧を制御する。 3. The recording head according to claim 2, wherein the current control circuit operates such that the M〇 transistor of the constant current source operates in a saturation region where a change in drain current is small with respect to a change in drain voltage. And controlling the gate voltage of the MOS transistor of the constant current source.
4. 請求項 2に記載の記録ヘッドであって、 前記定電流源は第 1 MO Sト ランジス夕のドレインに直列に第 2 MO Sトランジスタのソースを接続し ており、 前記電流制御回路は、 当該第 1及び第 2 MQ Sトランジスタが、 ドレイン電圧の変化に対してドレイン電流の変化の少ない飽和領域で動作 するように、前記第 1と第 2 MO Sトランジスタのゲート電圧を制御する。 4. The recording head according to claim 2, wherein the constant current source connects a source of a second MOS transistor in series with a drain of the first MOS transistor, and the current control circuit comprises: The gate voltages of the first and second MOS transistors are controlled such that the first and second MQS transistors operate in a saturation region where a change in drain current is small with respect to a change in drain voltage.
5 . 請求項 2に記載の記録ヘッドであって、 前記電流制御回路は、 定電流 回路と MO Sトランジスタとを有し、 前記定電流回路の出力を、 前記電流 制御回路の MO Sトランジスタのベースと前記定電流源の MO Sトランジ スタのベースとに接続している。 5. The recording head according to claim 2, wherein the current control circuit has a constant current circuit and a MOS transistor, and outputs an output of the constant current circuit to a base of the MOS transistor of the current control circuit. And the MOS transistor of the constant current source Connected to the base of the star.
6 . 請求項 5に記載の記録ヘッドであって、 前記電流制御回路と前記定電 流回路とは力レントミラー回路を構成している。 6. The recording head according to claim 5, wherein the current control circuit and the constant current circuit constitute a power mirror circuit.
7 . 請求項 4に記載の記録ヘッドであって、 前記電流制御回路は、 定電流 回路と 2つの MO Sトランジスタとを有し、 前記 2つの MO Sトランジス 夕のそれぞれのベースは、 前記第 1と第 2 MO Sトランジスタのベースと それぞれ接続されている。 7. The recording head according to claim 4, wherein the current control circuit includes a constant current circuit and two MOS transistors, and a base of each of the two MOS transistors is the first MOS transistor. And the base of the second MOS transistor.
8 . 請求項 2に記載の記録ヘッドであって、 前記定電流源の MO Sトラン ジス夕の耐電圧は、 前記スイッチング回路の MO Sトランジスタの耐電圧 よりも高い。 8. The recording head according to claim 2, wherein a withstand voltage of the MOS transistor of the constant current source is higher than a withstand voltage of the MOS transistor of the switching circuit.
9 . 請求項 1に記載の記録ヘッドであって、 前記複数の記録素子、 複数の スイッチング回路、 定電流源および電流制御回路は同じ素子基板に作りこ まれている。 9. The recording head according to claim 1, wherein the plurality of recording elements, the plurality of switching circuits, the constant current source, and the current control circuit are formed on the same element substrate.
1 0 . 記録装置であって、 1 0. The recording device,
複数の記録素子を有する記録へッドと記録媒体とを相対移動させる搬送 手段と、  Conveying means for relatively moving a recording head having a plurality of recording elements and a recording medium,
前記搬送手段による相対移動に同期して、 画像信号に応じて前記記録へ ッドを駆動して前記記録媒体に画像を形成する駆動制御手段とを有し、 前記記録へッドは、  Drive control means for driving the recording head in accordance with an image signal to form an image on the recording medium in synchronization with the relative movement by the transport means; and
前記複数の記録素子のそれぞれに対応付けて設けられ、 それぞれ対応す る記録素子への通電を制御する複数のスィッチング回路と、  A plurality of switching circuits provided in association with each of the plurality of printing elements, for controlling energization of the corresponding printing elements,
前記複数の記録素子のそれぞれに対応して設けられ各記録素子に定電流 を流すための定電流回路と、 A constant current is provided for each of the plurality of printing elements and provided for each of the plurality of printing elements. A constant current circuit for flowing
前記定電流回路より供給される前記定電流を制御する電流制御回路とを 有する。  A current control circuit for controlling the constant current supplied from the constant current circuit.
1 1 . 請求項 1 0に記載の記録装置であって、 前記定電流回路は MO Sト ランジス夕を含み、 前記定電流回路は前記定電流回路の MO Sトランジス 夕のオン抵抗を制御することにより前記定電流を出力する。 11. The recording apparatus according to claim 10, wherein the constant current circuit includes a MOS transistor, and the constant current circuit controls an ON resistance of the MOS transistor of the constant current circuit. Output the constant current.
1 2 . 複数の記録素子を有する記録へッドカ一トリッジであって、 1 2. A recording head cartridge having a plurality of recording elements,
前記複数の記録素子のそれぞれに対応付けて設けられ、 それぞれ対応す る記録素子への通電を制御する複数のスィツチング回路と、 前記複数の記 録素子のそれぞれに対応して設けられ各記録素子に定電流を流すための定 電流源と、 前記定電流源により供給される前記定電流を制御する電流制 御回路とを有する記録へッドと、  A plurality of switching circuits that are provided in association with each of the plurality of recording elements and control energization of the corresponding recording elements; and a plurality of switching circuits that are provided in correspondence with each of the plurality of recording elements. A recording head having a constant current source for flowing a constant current, and a current control circuit for controlling the constant current supplied by the constant current source;
該へッドに供給されるインクを保持するためのインクタンクとを有する。  An ink tank for holding ink supplied to the head.
PCT/JP2003/015225 2002-11-29 2003-11-28 Recording head and recorder comprising such recording head WO2004050370A1 (en)

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US11/134,416 US20050212857A1 (en) 2002-11-29 2005-05-23 Recording head and recorder comprising such recording head

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KR20050087811A (en) 2005-08-31
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JP2004181678A (en) 2004-07-02
AU2003302652A1 (en) 2004-06-23
CN100415519C (en) 2008-09-03

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