JPH11121833A - Hall element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide structure of a semiconductor Hall element which has a high yield in manufacture and is high in reliability, by a method wherein breaks, which are generated in a dicing work, are prevented from growing up to the electrode parts of semiconductor element regions on a GaAs substrate and the cross-shaped active layer regions of the element regions. SOLUTION: An insulating film at the square parts 11 of Hall elements 2a to 2d is previously ready removed, so that the progress of breaks 10 generated in dicing guide lines 8 at the time of a dicing work on a GaAs substrate 1 is stopped at the square parts of the elements 2a to 2d. As a result, defective breaks to grow up to electrodes 5 and the cross-shaped active layer regions of the elements are sharply decreased and the reliability of a semiconductor Hall element is also enhanced significantly.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor Hall element, and more particularly to a highly reliable Hall element having a good production yield.

[0002]

2. Description of the Related Art A Hall element is one of so-called magneto-electric conversion elements that detects a magnetic field and generates an electric signal in accordance with the strength thereof. It is used over a wide range of fields as a probe (probe) for measuring magnetic field strength.

As a semiconductor material for a Hall element, in addition to elemental semiconductors such as silicon (Si) and germanium (Ge), elements such as indium antimonide (InSb), indium arsenide (InAs), and gallium arsenide (GaAs) are used. A III-V group binary compound semiconductor obtained by combining an element belonging to Group III and two elements belonging to Group V of the periodic table is also used.

[0004] In order to obtain a Hall element, a plurality of elements are formed on one substrate through various processes for element formation, regardless of the material to be used. Through the steps performed, individual elements, so-called chips, are separated. In this dicing, a linear cut groove for passing a scriber for dicing, that is, a so-called dicing guideline is usually provided in a dice pattern on the surface of the wafer, and the wafer is mechanically cut by a diamond blade or the like. The dicing guidelines are usually provided so as to be orthogonal to each other along a certain crystallographic direction of the wafer, that is, along a specific crystal axis.

[0005] The problem here is that even when dicing is performed along the direction of the wall opening, which is perpendicular to each other, chipping of the end face of the element chip, which is called chipping, may occur, and the yield of good chips is remarkably reduced. Is to make it worse.

FIG. 5 shows the structure of a general Hall element separated from a wafer into chips, and FIG. 6 simultaneously shows one unit of a Hall element group before and after separation. In FIG.
Of a large number of Hall elements 2 formed on a GaAs substrate 1 which is a semiconductor single crystal substrate, four Hall elements 2a to 2d adjacent to each other are typically shown as one unit.

In the manufacturing process of each Hall element, first, the center of the area of the Hall element 2 of the GaAs substrate 1 is
An active layer is formed by an ion implantation method, an epitaxial growth method, or the like, and a cross-shaped active layer region 3 is formed by a photolithography process as shown in FIG. Next, an insulating film 4 such as SiO ₂ is formed on the GaAs substrate 1 on which the cross-shaped active layer region 3 is formed in order to improve reliability. Further, input electrodes 5 for externally supplying a drive current to the active layer are provided at both ends of the cross-shaped active layer region 3 in the current input direction a. On the other hand, at both ends in the power output direction b,
An output electrode 6 for extracting an output current to the outside is similarly provided.

On four sides of the outer periphery 7 of the Hall element 2 of the GaAs substrate 1, dicing guidelines 8 serving as targets for processing into chips are formed in the form of guide grooves by a photolithography process. The dicing guidelines 8 are provided so as to be orthogonal to each other in the direction of the wall opening orthogonal to each other, that is, along the specific crystal axis of the wafer.

By the above process, a plurality of Hall elements 2 are formed on the GaAs substrate 1. FIG. 6 shows four Hall elements 2a to 2d, which are bordered by dicing guidelines 8 crossing in a cross shape in the x and y directions, among Hall elements 2 formed on the GaAs substrate 1.

Finally, in accordance with the dicing guideline 8 on the GaAs substrate, individual Hall elements are separated by a scribe or blade dicing technique.

[0011]

However, in the Hall element structure according to the prior art, chipping defects occur when a scribe or blade type dicing operation for separating individual Hall elements from a GaAs substrate is performed. There is a problem.

An example in which individual hall elements are formed from a GaAs substrate by a dancing operation will be described below.

[0013] In the case of the blade method,
With the diamond blade with diamond fine particles adhered to the blade (circular blade) surface rotated at high speed,
Cutting is performed along the dicing guidelines 8 on the GaAs substrate 1. FIG. 6 shows an example of the dicing line 9 after cutting.
Shown in Observing the dicing line 9 after the cutting, countless minute chips 10 having a length of about 5 to 10 μm are generated. In particular, the region where the dicing guide lines 8 in the x and y directions are orthogonal to each other, that is, the vicinity of the square portion 11 in each of the Hall elements 2a to 2d is missing 10
Tend to be large, and the chip 10 is the hall element 2a ~
In some cases, the area reaches 2d.

When chipping progresses to the Hall element region,
Since the insulating film is a glass film, it is very easily broken, and the chipping reaches the electrodes 5 and 6 and the active layer region 3, thereby significantly lowering the electrical characteristics and reliability of the Hall element.

FIG. 6 shows an example of a chipping defect generated when dicing a Hall element having a conventional element structure. In the example of FIG. 6, the Hall elements 2a and 2b have
Does not extend to either the input electrode 5 or the output electrode 6 which is an electrode portion, but in the Hall elements 2c and 2d, the chip 10 reaches the region of the Hall elements 2a to 2d, and as a result, the insulating film 4 Input electrode 5 where cracks in the electrode part
To reach. As described above, when the chip 10 progresses to the region of the electrodes 5 and 6, in many cases, in the wire bonding operation of attaching the Au wire to the electrodes 5 and 6 in the mounting process, electrode peeling or adhesion occurs. Lowers the sex. For this reason, the work yield or reliability in manufacturing the Hall element is significantly reduced.

Therefore, an object of the present invention is to solve the above-mentioned problems, to prevent chips generated during dicing work from reaching the electrode portion and the active layer region of the semiconductor element region, and to improve the characteristic yield in manufacturing. An object of the present invention is to provide a highly reliable semiconductor Hall element structure.

[0017]

In order to achieve the above object, the present invention relates to a Hall element obtained by dicing a semiconductor single crystal substrate along dicing guidelines formed in directions orthogonal to each other. A structure in which an active layer region is formed in a cross shape on a single crystal substrate, electrodes are provided at each end of the active layer region, and an insulating film is attached to a region on the semiconductor single crystal substrate other than the active layer region. In the Hall element, the insulating film is removed at a square portion in the Hall element region divided into rectangles by the dicing guideline (claim 1).

The removal of the insulating film at the square portion in the Hall element may be performed obliquely by a straight removal line or by an arc removal line. Good (claim 3). In addition, the peripheral insulating film may be removed according to the overall shape of the portion including the cross-shaped active layer region and the electrode (claim 4).

When a semiconductor single crystal substrate such as Si or GaAs is diced along a dicing guideline, chipping occurs. This chipping is formed in a region where the dicing guidelines are orthogonal to each other, that is, is divided into rectangles by the dicing guideline. There is a strong tendency to increase near the square portion in the Hall element. When a large chip occurs near the square of the Hall element, and the chip does not fit within the width of the Daishin guideline and proceeds to the area of the Hall element, the insulating film is a glass film and is very easily broken. Reaches the electrode portion and the active layer region, and the electrical characteristics and reliability of the Hall element are significantly reduced.

However, in the present invention, the insulating film is removed from the square portion in the semiconductor element. For this reason, even if chipping of a size that does not fit within the width of the dicing guideline occurs near the square portion of the Hall element,
As long as the chip has a size that can be accommodated in the insulating film removed region, the effect of the chip does not reach the insulating film which is a glass film. That is, the progress of the chipping on the square substrate of the Hall element is stopped.

Therefore, the influence of chipping does not reach the region of the electrode portion or the active layer region as compared with the conventional configuration in which the insulating film is present in the square portion in the semiconductor element, and the characteristic yield in manufacturing is improved. Further, in a wire bonding operation of attaching an Au wire to an electrode in the mounting process, the peeling of the electrode and the decrease in adhesion are eliminated, so that a highly reliable semiconductor Hall element can be obtained.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below based on the illustrated embodiment.

FIG. 1 is a top view of a Hall element according to the present invention separated from a semiconductor single crystal substrate of a wafer into chips. FIG. 2 shows one unit of repetition of the Hall element group before and after separation. Here, among a large number of Hall elements 2 formed on a GaAs substrate 1 which is a semiconductor single crystal substrate, four Hall elements 2a to
2d is typically shown as one unit.

The basic structure of the Hall element according to the present invention is as follows.
This is the same as that described with reference to FIGS. 5 and 6, and the same reference numerals are used for the same components. That is, the Hall element 2 shown in FIG. 1 is a GaAs substrate 1 which is a semiconductor single crystal substrate.
And an active layer region 3 formed of an impurity region formed in a cross shape in the center of the region of the Hall element 2, and an insulating film 4 such as SiO ₂ is formed on the substrate 1 other than the active layer region 3. It has a structure. Further, a pair of input electrodes 5 for passing a predetermined current through the active layer region 3 and a pair of output electrodes 6 for measuring a potential difference in a direction perpendicular to the predetermined current are provided. The active layer region 3 functions as a magnetic sensing portion layer.

However, unlike the prior art, in this Hall element, a portion where the dicing guidelines 8 in the x and y directions are in contact with each other at a boundary with a region orthogonal to each other, that is, a Hall element divided into rectangles by the dicing guidelines 8 At the square portion 11 in 2, the insulating film 4 there is cut obliquely and removed. Here, the insulating film 4 of the square portion 11 in the Hall element 2 is
It is cut obliquely along the straight removal line 12, thereby removing it into an isosceles triangle shape.

An example of a method for manufacturing the Hall element having the above configuration will be described below.

First, an active layer is formed on the surface of the GaAs substrate 1 by ion implantation. Next, a cross-shaped active layer region 3 is formed on the active layer by a photolithography step and an etching step so as to have a predetermined input / output resistance.

Next, in order to improve the reliability, an insulating film 4 made of SiO ₂ is formed on the region on the GaAs substrate other than the cross-shaped active layer region 3 by a normal plasma CVD method.

Further, as in the prior art, input electrodes 5 for supplying a driving current from the outside to the active layer are provided at both ends of the cross-shaped active layer region 3 in the current input direction a. At both ends in the direction b, output electrodes 6 for extracting an output current to the outside are formed through a vapor deposition process, a photolithography process, and a lift-off process.

Next, on the outer periphery 7 of the GaAs substrate 1, that is, on the four sides of the outer shape, dicing guidelines 8 for separating into individual Hall elements are provided with the insulating film 4 on the GaAs substrate 1.
Is formed by etching. The dicing guideline 8 is provided along a specific crystal axis direction orthogonal to each other on the wafer, in this case, along a wall opening direction.

During the etching of the insulating film 4, at the same time, the dicing guide lines 8 in the x and y directions are opposed to each other at a boundary with a region orthogonal to each other, that is, a square portion 11 in the Hall element 2. Part of insulating film 4
Is cut obliquely. In the case of the present embodiment, the rectangular insulating film 4 in the Hall element 2 is obliquely cut by a straight removal line 12 at its square portion 11 to remove the insulating film 4 into an isosceles triangular shape. .

The plurality of Hall elements 2 are formed on the GaAs substrate 1 by the above manufacturing method. FIG. 2 exemplarily shows a portion of four Hall elements 2a to 2d which are adjacent to a dicing guideline 8 crossing in a cross shape in the x and y directions, among Hall elements 2 formed on the GaAs substrate 1.

Finally, in accordance with the dicing guidelines 8 on the GaAs substrate 1, the individual hall elements are separated by a scribe or blade dicing operation. Here, by blade type dancing work,
Processing is performed from the GaAs substrate 1 into individual Hall elements 2. This blade-type dicing operation is performed by cutting along a dicing guideline 8 on the GaAs substrate 1 in a state where a diamond blade in which fine diamond particles are adhered to a blade (circular blade) surface is rotated at a high speed. .

FIG. 2 shows the state of the dicing line 9 after cutting. In the case of the Hall element manufactured by the above-described method, as shown in FIG.
The progress was stopped on the GaAs substrate of the square portion 11 of a to 2d, and there was no occurrence of the chip 10 derived from the insulating film 4 and extending to the input electrode 5 or the output electrode 6 as the electrode portion. Accordingly, in the wire bonding operation for attaching the Au wire to the electrodes 5 and 6 in the mounting process, there is no occurrence of electrode peeling or reduction in adhesion, and therefore, the work yield in manufacturing the Hall element and the Hall element Could greatly improve the reliability.

<Modification> In the above embodiment, the insulating film at the square portion of the Hall element was removed in the shape of an isosceles triangle, but the present invention is not limited to this. For example, as shown in FIG. 3, a structure in which the insulating film 4 of the square portion 11 is removed in an arc shape by an arc-shaped removal line 13 can be employed. As shown in FIG. 4, the insulating film 4 around the portion including the cross-shaped active layer region 3 and the electrodes 5 and 6 can be removed according to the overall shape thereof. In the example of FIG. 4, the insulating film 4 in the square portion 11 is removed by the L-shaped removal line 14, thereby leaving the cross-shaped insulating film 4.

In the above embodiment, a Hall element using a GaAs substrate has been described, but it is a matter of course that a Hall element using another semiconductor substrate, for example, an InAs, InSb, or Si substrate may be used.

[0037]

As described above, according to the present invention, the following excellent effects can be obtained.

The Hall element according to any one of claims 1 to 4 relates to an insulating film to be formed on a region on the semiconductor single crystal substrate other than the active layer region. And the structure in which the insulating film is removed. Therefore, during the dicing operation, even if a chip having a size that does not fit within the width of the dicing guide line occurs at the square portion of the Hall element, the chip is not removed as long as the chip remains within the insulating film removal region. The effect does not reach the insulating film which is a glass film. That is, it is possible to stop the progress of the chipping on the square substrate of the Hall element.

Therefore, chipping defects that reach the electrode and the cross-shaped active layer region, which occur in the conventional configuration in which the insulating film is present at the square portion in the semiconductor element, can be drastically reduced, and the characteristic yield in manufacturing is improved. be able to. In addition, since there is no electrode peeling or reduction in adhesion during wire bonding, a highly reliable semiconductor Hall element can be obtained.

[Brief description of the drawings]

FIG. 1 is a top view showing one embodiment of a Hall element of the present invention.

FIG. 2 is a schematic diagram for explaining a case where the Hall element of the present invention is diced.

FIG. 3 is a top view showing a modified example of the Hall element of the present invention.

FIG. 4 is a top view showing another modification of the Hall element of the present invention.

FIG. 5 is a top view showing a conventional Hall element structure.

FIG. 6 is a schematic diagram for explaining a case where a conventional Hall element is diced.

[Description of Signs] 1 GaAs substrate (semiconductor single crystal substrate) 2 Hall element 2a to 2d Hall element 3 Cross-shaped active layer region 4 Insulating film 5 Input electrode 6 Output electrode 7 Outer periphery 8 Dicing guideline 9 Dicing after cutting Line 10 Chipping 11 Square part 12 Removal line 13 Arc removal line 14 L-shaped removal line

Claims (4)

[Claims] 1. A Hall element obtained by dicing a semiconductor single crystal substrate along dicing guidelines formed in directions orthogonal to each other, wherein an active layer region is formed in a cross shape on the semiconductor single crystal substrate, In a Hall element having a structure in which an electrode is provided at each end of the active layer region and an insulating film is provided in a region on the semiconductor single crystal substrate other than the active layer region, a hole divided into a rectangle by the dicing guideline is provided. A Hall element, wherein the insulating film in a square portion in the element region is removed. 2. The hall element according to claim 1, wherein the insulating film at a square portion in the hall element is obliquely removed by a straight removal line. 3. The Hall element according to claim 1, wherein the insulating film at a square portion in the Hall element is removed in an arc shape by an arc removal line. 4. The method according to claim 1, wherein the insulating film in a square portion in the Hall element is formed by removing an insulating film in the periphery thereof in accordance with the entire shape of a portion including a cross-shaped active layer region and an electrode. The Hall element according to claim 1, wherein