JP3850459B2 - Method for manufacturing SiC vertical semiconductor device - Google Patents

Description

[0001]
[Industrial application fields]
The present invention relates to a vertical semiconductor device such as an inpatient diode using silicon carbide (SiC) having an advantage of being operable even in a high temperature environment and a method for manufacturing the same.
[0002]
[Prior art]
Impat (Impact Avalanche and Transit Time) diodes are well-known as useful oscillation elements that can directly convert DC bias power into microwave and millimeter-wave high-frequency power. Conventionally, Si and GaAs are used as pn junctions and shots. It has been manufactured as a vertical (or sandwich-type) semiconductor device using a key junction. This impat diode can be used as a main oscillator among solid-state oscillation sources in the microwave band and the millimeter wave band because a large output can be obtained as compared with other oscillation elements such as a Gunn diode.
[0003]
In the impat diode, the bias current value and the junction capacitance value necessary for the operation are adjusted by the element area, and the typical element diameter is set to a minute value of about 10 μm to 50 μm. Further, in order to reduce the series resistance value as much as possible and increase the conversion efficiency, the thickness of the element is typically set to a minute value of about 50 μm or less. Such an impat diode with a fine size is coupled with the problem of large heat dissipation of Joule heat and requires a high level of technology for its assembly.
[0004]
Typically, the element is cut into dies having a diameter of several hundreds of micrometers, which is considerably larger than the final diameter, and each is joined to a pedestal of a housing (case) called a heat dissipation stud or the like with a large amount of heat generation. The main surface close to the surface is bonded up side down, and the upper electrode is connected using a gold ribbon or the like. Each die having completed this electrical connection is subjected to chemical corrosion (etching) while flowing a direct current less than the oscillation threshold value and monitoring the change in the value, thereby gradually reducing the element area. This etching is also necessary to remove a surface layer having many scratches generated during dicing. Etching is stopped when the cross-sectional area of the element reaches a desired value converted by the direct current value, and an imput diode having a diameter of 10 to 50 μm, which is smaller by one digit than that during assembly wiring, is completed.
[0005]
The above-described impatt diode is operated in the avalanche breakdown region and in a high current density state on the principle of operation, and thus has a drawback that a burnout accident is likely to occur. In order to solve this drawback, it has been proposed to use silicon carbide (SiC) instead of Si or GaAs conventionally used as a semiconductor material. The crystal of silicon carbide (SiC) is a paper written by Hiroyuki Matsunami entitled “SiC semiconductor materials, devices and contact materials” (edited and published by the Japan Electronics Industry Development Association in March 1994). As described in the “Survey Report”), it has a thermal conductivity (5 W / cm ^o K) that is about three times that of Si, and a saturated electron drift velocity that is about twice that of Si. In addition, hexagonal 6H-SiC, which is normally used as a highly stable polytype, has a forbidden bandwidth as large as 2.93 eV. Therefore, the dielectric breakdown voltage is about 10 times higher than that of Si, the operable temperature reaches 773 ^o K (500 ^o C), and the conductivity type is easy for both p-type and n-type. Can be controlled.
[0006]
[Problems to be solved by the invention]
Since SiC has advantages related to various physical property values as described above, it is optimal as a material for a vertical semiconductor device having a high power density such as an impat diode. However, because of the chemical stability of SiC, when an attempt is made to manufacture a vertical semiconductor device such as an impat diode using this as a material, there are the following problems. In other words, when Si or GaAs is used as a material, there are chemicals that can etch only the semiconductor material without damaging the container. However, in the case of SiC, chemical resistance is provided for its chemical stability. The nature is greater than the container material. For this reason, there is a problem that the conventional method of adjusting the area by performing etching after completing the assembly wiring in the housing cannot be applied at all.
Accordingly, an object of the present invention is to provide a method of manufacturing a vertical element such as an impat diode suitable for SiC.
[0007]
Further, even if there is no problem regarding the chemical stability as described above, and the element area of SiC can be reduced by wet etching as in the case of Si and GaAs, each separated by dicing is also possible. If wet etching is performed on a die, there is a problem that labor and time are increased and it is not suitable for mass production. In particular, the wet etching rate varies depending on the composition and temperature of the etching solution and the variation in the thickness of the defective layer generated during dicing, and therefore, it is necessary to flow the current while monitoring the value. From the point of view, mass productivity is impaired.
Therefore, another object of the present invention is to set the area of each element in a lump before physically separating the elements by dicing or the like, and then perform physical separation to reduce the manufacturing time. An object of the present invention is to provide a method of manufacturing a SiC vertical semiconductor device that can greatly reduce labor.
[0008]
Furthermore, as described above, when the area of each element is set in a lump and then physically separated, the area of each physically separated element is typically as small as about 10 μm. Therefore, the assembly and wiring are practically impossible.
Accordingly, another object of the present invention is to provide a method of manufacturing an SiC vertical semiconductor device that enables assembly of minute elements and wiring.
[0009]
[Means for Solving the Problems]
The manufacturing method of the SiC vertical semiconductor device concerning this invention forms the vertical semiconductor device arranged in the depth direction of the substrate of the SiC crystal, and the region other than the plurality of selected regions selected on the surface of the substrate from the surface. An electrical separation step of obtaining a plurality of electrically separated vertical semiconductor devices by selectively removing a depth exceeding a deepest portion of the vertical semiconductor device, and a plurality of electrically separated semiconductor devices A physical separation step of physically separating the substrate in the lateral direction, and an electrode formation step of forming electrodes on both the front and back surfaces of the substrate at an appropriate stage prior to the physical separation step.
[0010]
The manufacturing method of the present invention further includes a step of forming a diamond layer in each of a plurality of selected regions on the surface of the substrate before the electrical separation step, so as to fill the selectively removed regions. A sufficiently thick insulator layer is deposited on the entire surface of the substrate, and then mechanically polished to a depth that reaches the diamond layer. A step of forming a protective layer having a flat surface having substantially the same height is included before the physical separation step, and the physical separation step is formed around each electrically isolated vertical semiconductor device. This is performed including the protective layer formed.
[0011]
[Action]
According to the present invention, in the electrical isolation step, the vertical semiconductor devices such as the impatt diodes are electrically isolated from each other, and the area of each device is determined at this point. This electrical separation is performed by forming a resist layer using a general-purpose photo-engraving method as an integrated circuit manufacturing method, etching using the resist layer, and the like. The area of each vertical semiconductor device is determined very accurately. Each separated device exhibits a suitable mesa shape in which local concentration of the electric field is unlikely to occur. In this way, after physical separation by subdivision is performed, electrical adjustment for each device is completely unnecessary, so that manufacturing time and labor are greatly reduced.
[0012]
Furthermore, according to the manufacturing method of the present invention, a protective layer having a flat surface having the same height as the surface of the substrate is formed around each vertical semiconductor device physically separated by dicing or the like. Therefore, by increasing the lateral width of the protective layer around the device, the dimensions of the assembly and wiring target dies can be increased as necessary, and the assembly and wiring work can be substantially realized.
Hereinafter, the present invention will be described in more detail by way of examples.
[0013]
【Example】
Various types, such as a pn junction type, a Schottky junction type, a single running area type (lead type), and a double running area type, are known as imput diodes that are typical examples of vertical semiconductor devices to be manufactured. Here, a lead type impatt diode will be taken as an example, and a manufacturing method thereof will be described as an embodiment of the present invention with reference to FIG. 1 and FIG. According to this SiC imput diode, the n ⁻ , p, i and p ⁻ conductive layers are sequentially formed in the SiC crystal substrate from the front surface to the back surface, thereby leading to the depth direction of the substrate. A p-type layer is formed, and a p ⁺⁺ layer for extracting an electrode having an appropriate thickness is formed immediately below the p ⁻ layer which is the deepest layer.
[0014]
First, as shown in FIG. 1A, a SiO ₂ protective film 11 is formed on the main surface 10 of SiC, and an appropriate method such as reverse sputtering, mechanical polishing, or air abrasive is formed on the surface of the protective film 11. The method is used to form minute irregularities on the processing scratches.
[0015]
Next, as shown in FIG. 1B, a diamond layer 12 having a thickness of about 1 μm is deposited on the protective film 11. The diamond layer 12 is deposited by CVD performed under the following conditions.
Reaction gas: CH ₄ + H ₂ , reaction gas mixture ratio: 1.0 vol%,
Reaction pressure: 40 Torr, Gas flow rate: 100 ccm, Microwave output: 380W,
Substrate temperature: 850 ^o C, deposition time: 1.6 hours [0016]
Subsequently, as shown in FIG. 1C, SiO ₂ , Si ₃ N ₄ , Al on the diamond layer 12 by using one of appropriate film forming methods such as a sputtering method, a CVD method, and a sorgale method. _After the resist layer 13 such as ₂ O ₃ is formed with a thickness of 1000 mm or more, unnecessary portions of the resist layer 13 are removed by using a well-known photo-engraving technique, so that the resist for subsequent ashing and etching is removed. Form a layer.
[0017]
First, as shown in FIG. 1D, a portion of the diamond layer 12 that is not covered with the resist layer 13 is removed by an ashing method using oxygen plasma, an oxygen ion beam, or the like. Subsequently, as shown in FIG. 1 (E), by performing substantially isotropic etching in the depth direction or air breaking until the depth of the p ⁻ layer of the bottom layer of each imput diode is exceeded. Each imput diode is electrically isolated in a direction parallel to the main surface of the substrate. However, each imput diode is physically coupled by a p ⁺⁺ layer below the substrate.
[0018]
As the etching, a dry etching technique such as reactive ion etching or ion beam etching may be applied, or a wet etching technique such as molten salt etching may be applied. In addition, when applying an airbrasive, said dry etching, wet etching, etc. can also be added in order to remove the process damage and distortion accompanying this. Since the etching and air breaking at the time of the above separation are fairly isotropic, the shape of the side surface of each of the impatt diodes has a so-called mesa shape that spreads toward the bottom, so that the breakdown due to electric field concentration can be prevented. It becomes a suitable shape.
[0019]
Next, a protective layer of SiO ₂ having a thickness sufficient to fill the removed groove is deposited on the entire main surface. As this film forming method, in addition to conventional methods such as CVD, electrodeposition of powdered glass, or a method based on a sol-gel method may be applied. Next, the protective layer of SiO2 formed on the entire surface is mechanically polished from the surface using an abrasive such as carborundum. It can be seen that the polishing surface has reached the diamond layer 12 when the polishing rate is extremely reduced. When mechanical polishing is stopped and cleaning is performed in this state, as shown in FIG. 2A, a structure is obtained in which mesa elements are arranged with a protective layer 14 of SiO2 interposed therebetween. As a result, the protective layer 14 having a flat surface substantially the same height as the one electrode surface of the impat diode is formed around the impat diode.
[0020]
Further, the diamond layer 12 remaining on the surface is removed by an ashing process using oxygen plasma, an oxygen ion beam or the like, and as a result, a contact hole for forming an electrode is formed in the protective film 11 of SiO ₂ exposed. As shown in FIG. 2B, a pair of electrodes facing each other across the substrate by depositing a metal layer mainly composed of a refractory metal in the contact hole on the substrate surface side and on the entire surface on the back side of the substrate. 15 and 16 are formed.
[0021]
Finally, the substrate is diced at the central portion of the protective layer 14 to obtain a rectangular die as shown in the sectional view (A) and plan view (B) of FIG. The diameter of the electrode 15 of the inpatient diode whose cross-sectional area is determined at the time of electrical separation is typically as small as 10 to 50 μm as shown in the figure, and as a single unit, assembly and wiring are substantially impossible. . However, since the protective layer 14 on a rectangle having a large dimension (typically about 100 μm or more) is formed at almost the same height as the element, the entire rectangular die including the protective layer 14 is formed around the element. Is the same size as the assembly, wiring, and etching target dies in the case of conventional Si or GaAs, and assembly and wiring for this are possible.
[0022]
The rectangular die is mounted on the heat dissipation stud of the storage body in an up side down state, and an electrode 15 is soldered to the heat dissipation stud, and the other electrode 16 is a gold extending from the lid side of the storage body. By connecting the ribbon by thermocompression bonding or the like, the impatt diode is completed.
[0023]
The present invention has been described above by taking as an example the case of manufacturing a SiC imput diode. However, it is apparent that the method of the present invention can be applied to the manufacture of various SiC vertical semiconductor devices other than the SiC diode, or the SiC vertical field effect transistor (FET) for high power other than the input diode.
[0024]
【The invention's effect】
As described above in detail, the manufacturing method of the present invention is configured to electrically separate the vertical semiconductor devices from each other while determining the respective areas, and then perform physical separation such as dicing. In addition, no wet etching or the like in the state of being mounted on the storage body is required, and the manufacturing time and labor are greatly reduced.
[0025]
In addition, since the manufacturing method of the present invention is configured to form a protective layer having a large dimension having a flat surface substantially the same height as one electrode of the vertical semiconductor device around the device, the protective layer is included. The dimensions of the equipment can be set as large as necessary. As a result, assembly and wiring of the device including the protective layer is substantially possible.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of an apparatus for explaining a method of manufacturing a SiC imput diode according to an embodiment of the present invention.
FIG. 2 is an apparatus cross-sectional view for explaining the continuation of the manufacturing method of the above embodiment.
FIG. 3 is a cross-sectional view (A) and a plan view (B) showing the structure of a SiC imput diode manufactured according to the above embodiment.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10 SiC crystal substrate 11 Protective film 12 Diamond layer 13 Resist layer 14 Protective layers 15 and 16 Electrodes formed on the front and back surfaces of the substrate

Claims (5)

A vertical semiconductor device arranged in the depth direction of the SiC crystal substrate is formed, and a region other than a plurality of selected regions selected on the surface of the substrate extends from the surface to a depth exceeding the deepest portion of the vertical semiconductor device. An electrical separation step for obtaining a plurality of electrically separated vertical semiconductor devices by selective removal, and physically separating the plurality of electrically separated semiconductor devices in a lateral direction of the substrate. A method for manufacturing a SiC vertical semiconductor device, comprising: a physical separation step; and an electrode formation step of forming electrodes on both front and back surfaces of the substrate at an appropriate stage prior to the physical separation step,
Forming a diamond layer on each of a plurality of selected regions of the surface of the substrate prior to the electrical isolation step;
An electrically insulating layer of sufficient thickness to fill the selectively removed region is deposited on the entire surface of the substrate and then mechanically polished to a depth that reaches the diamond layer. A step of forming a protective layer having a flat surface substantially the same height as the surface of the substrate around each of the separated vertical semiconductor devices before the physical separation step, and the physical separation step includes: A method for manufacturing a SiC vertical semiconductor device, comprising a protective layer formed around each of the electrically isolated vertical semiconductor devices. In claim 1,
The electrical separation step is performed by reactive ion etching, ion beam etching, molten salt etching, or other mainly isotropic etching, or a combination of these etchings and preceding air abrasives. A method for manufacturing a semiconductor device. In claim 1 or 2,
Front surface of the substrate on which the layer of diamond is formed is covered with a protective film, the electrode forming step, the main surface after the step of forming the protective layer, which is removed the layer of diamond, exposed the protective film a contact hole for electrode formation is formed on the cover, the SiC vertical semiconductor device which comprises a step of forming the electrodes on the substrate surface side of the substrate to be exposed in the contact hole Production method. In each of claims 1 to 3,
A method of manufacturing a SiC vertical semiconductor device, further comprising the step of forming fine irregularities on the main surface prior to the deposition of the diamond layer. In each of claims 1 to 4,
The method for manufacturing a SiC vertical semiconductor device, wherein the vertical semiconductor device is an impatt diode.

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