JPH1098297A - Component mounting method - Google Patents
Component mounting methodInfo
- Publication number
- JPH1098297A JPH1098297A JP8250365A JP25036596A JPH1098297A JP H1098297 A JPH1098297 A JP H1098297A JP 8250365 A JP8250365 A JP 8250365A JP 25036596 A JP25036596 A JP 25036596A JP H1098297 A JPH1098297 A JP H1098297A
- Authority
- JP
- Japan
- Prior art keywords
- mounting
- circuit
- component
- component mounting
- board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
- H05K13/08—Monitoring manufacture of assemblages
- H05K13/085—Production planning, e.g. of allocation of products to machines, of mounting sequences at machine or facility level
- H05K13/0853—Determination of transport trajectories inside mounting machines
Landscapes
- Engineering & Computer Science (AREA)
- Operations Research (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Supply And Installment Of Electrical Components (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、基板に対して部品
を実装する部品実装方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a component mounting method for mounting components on a board.
【０００２】[0002]
【従来の技術】図４を参照しながら、従来の部品供給部
とこれを用いた電子部品実装方法について説明する。一
般に、部品実装装置は、図４に示すように、電子部品を
プリント基板１に実装するための吸着ノズル２を有し、
ノズル２の下方に配置された前記プリント基板１を電子
部品の実装位置に移動させるテーブル３と、前記部品を
供給する複数の部品供給部４が着脱可能にセットされる
部品供給軸５とを備えている。電子部品は、ノズル２に
よって、各々の部品供給部４から取り出され、部品実装
位置までの移送中に、部品認識部６が電子部品を認識
し、電子部品の位置補正を行い、所定のプリント基板１
に実装される。また、プリント基板に対しても、必要に
応じて、基板認識部７によって基板のマーク認識を行い
位置補正を行う。2. Description of the Related Art A conventional component supply unit and an electronic component mounting method using the same will be described with reference to FIG. Generally, as shown in FIG. 4, the component mounting apparatus has a suction nozzle 2 for mounting an electronic component on a printed circuit board 1,
A table 3 is provided below the nozzle 2 for moving the printed circuit board 1 to a mounting position for electronic components, and a component supply shaft 5 on which a plurality of component supply units 4 for supplying the components are detachably set. ing. The electronic components are taken out of the respective component supply units 4 by the nozzles 2, and during the transportation to the component mounting position, the component recognition unit 6 recognizes the electronic components, corrects the position of the electronic components, and corrects the predetermined printed circuit board. 1
Implemented in Also, the printed board is recognized by the board recognizing unit 7 as necessary, and the position of the printed board is corrected.
【０００３】また、プリント基板の小型化等により、図
５に示すような１枚の基板１上に複数個の回路８を構成
し、部品実装後に分離し使用する多面取り基板９（割基
板）が増加してきている。このような多面取り基板にお
いては、１枚のプリント基板上の各回路の検査を部品実
装前に実施し、各回路のランド箔のはがれや傷等の不良
が発見された場合、図６に示すように、その回路が不良
であることを示した符号（バットマーク）１０を各回路
の定位置に付与する。部品実装時においては、図７に示
すように、バットマーク１０が記された回路に対し部品
実装を行わないように制御される。In addition, a plurality of circuits 8 are formed on a single board 1 as shown in FIG. 5 by reducing the size of a printed board, etc., and a multi-panel board 9 (split board) which is separated and used after mounting components. Is increasing. In such a multi-panel board, each circuit on a single printed board is inspected before component mounting, and when a defect such as peeling or damage of the land foil of each circuit is found, FIG. As described above, the code (bat mark) 10 indicating that the circuit is defective is given to a fixed position of each circuit. At the time of component mounting, as shown in FIG. 7, control is performed so that component mounting is not performed on the circuit on which the butt mark 10 is marked.
【０００４】[0004]
【発明が解決しようとする課題】しかしながら上記のよ
うな構成では、プリント基板上の各回路の検査を部品実
装前に実施し、各回路に対して部品実装を行うかどうか
を判断しているめ、部品実装時において、第一回路目を
全部品実装後、第二回路目を実装するというように、各
回路ごとに部品実装を行わなければならなかった。一
方、１枚のプリント基板には、部品の実装タクトが異な
る部品が多く存在しており、部品実装時においては、そ
れまでにプリント基板に実装されている部品の実装タク
ト以上に実装タクトをあげて実装することができない
（これまでにプリント基板に実装している部品が位置ず
れを起こす）ため、第一回路目を実装すると、そのプリ
ント基板で使用されている部品のもっとも遅いタクト
で、それ以降の部品実装を行わなければならない。した
がって、上記従来方法では、１枚のプリント基板を実装
するタクトが最小になる順序で実装が行われておらず、
生産効率が悪いという問題点があった。However, in the above configuration, each circuit on the printed circuit board is inspected before mounting the components, and it is determined whether or not the components are mounted on each circuit. At the time of component mounting, components must be mounted for each circuit, such as mounting all components on the first circuit and then mounting the second circuit. On the other hand, there are many components with different mounting tacts on one printed circuit board. When mounting components, the mounting tact is higher than the mounting tact of the components mounted on the printed circuit board up to that point. (The components that have been mounted on the printed circuit board may be misaligned.) When the first circuit is mounted, the slowest tact of the components used on the printed circuit board will Subsequent component mounting must be performed. Therefore, in the above-described conventional method, the mounting is not performed in an order that minimizes the tact of mounting one printed circuit board.
There was a problem that production efficiency was poor.
【０００５】また、両面実装多面取り基板においては、
片面（表面または裏面のどちらか）でも不良部がある
と、その回路を使用することはできないため、実装面の
裏面の回路の良否状態も考慮に入れないと部品実装に無
駄が生じるという問題点があった。本発明は上記従来の
問題点を解決するもので、多面取り基板の実装データに
おいて、各回路の番号を実装データの実装位置情報に付
加した状態で多面取りデータの展開と展開されたデータ
の最適化処理を行い、部品実装手段において、１枚のプ
リント基板上の各回路の良否状態を示した符号をもと
に、各実装位置に実装すべきかどうかを動的に変えて生
産させるように制御することにより、多面取り基板に対
しても、実装タクトが最小にすることができる部品実装
方法を提供することを目的とする。また同時に、両面実
装多面取り基板において、実装面の裏面の回路の良否状
態も考慮に入れ、部品実装における廃棄部品や、実装タ
クトの無駄を未然に防止し、生産性の高い部品実装方法
を提供することを目的とする。On the other hand, in a double-sided mounting multiple board,
If there is a defective portion even on one side (either the front surface or the back surface), the circuit cannot be used, and if the quality of the circuit on the back surface of the mounting surface is not taken into consideration, there is a problem in that the component mounting is wasted. was there. SUMMARY OF THE INVENTION The present invention solves the above-described conventional problems. In the mounting data of a multi-board, the number of each circuit is added to the mounting position information of the mounting data, and the expansion of the multi-board data and the optimization of the expanded data are performed. Control by the component mounting means to dynamically change whether or not to mount at each mounting position based on the code indicating the pass / fail status of each circuit on one printed circuit board. Accordingly, it is an object of the present invention to provide a component mounting method capable of minimizing a mounting tact even on a multiple board. At the same time, on the double-sided mounting multiple board, taking into account the quality of the circuit on the back side of the mounting surface, it is possible to prevent wasted parts in component mounting and waste of mounting tact beforehand, and provide a component mounting method with high productivity. The purpose is to do.
【０００６】[0006]
【課題を解決するための手段】上記問題点を解決するた
めに、本発明の部品実装方法は、基板のランド上に半田
を印刷する印刷手段と、前記印刷された半田の所定位置
に部品を装着する部品装着手段と、前記部品が装着され
た基板のランドと前記部品の端子を半田接合するリフロ
ー手段とを有する多面取り基板の実装方法であって、部
品実装時において、前記半田印刷手段や前記部品装着手
段が、１枚のプリント基板上の各回路の良否状態を示し
た符号をもとに、半田印刷範囲や部品実装範囲を動的に
変えるように制御するものである。In order to solve the above-mentioned problems, a component mounting method according to the present invention comprises a printing means for printing solder on a land of a substrate, and a method for mounting a component at a predetermined position of the printed solder. A component mounting means for mounting, and a method for mounting a multi-plane board having a reflow means for soldering a terminal of the component and a land of the board on which the component is mounted, wherein at the time of component mounting, the solder printing means or The component mounting means controls so as to dynamically change a solder printing range and a component mounting range based on a code indicating a pass / fail state of each circuit on one printed circuit board.
【０００７】また、本発明の部品実装方法は、基板のラ
ンド上に半田を印刷する印刷手段と、前記印刷された半
田の所定位置に部品を装着する部品装着手段と、前記部
品が装着された基板のランドと前記部品の端子を半田接
合するリフロー手段とを有する多面取り基板の実装方法
であって、前記部品装着手段における実装データにおい
て、各回路の番号を実装位置情報に付加し、多面取りデ
ータの展開と展開されたデータの最適化処理を行い、次
に、部品実装手段において、１枚のプリント基板上の各
回路の良否状態を示した符号をもとに、各実装位置を動
的に変えるように制御するものである。Further, according to the component mounting method of the present invention, there are provided printing means for printing solder on a land of a substrate, component mounting means for mounting a component at a predetermined position of the printed solder, and mounting the component. A mounting method for a multi-panel board having a board land and a reflow means for soldering a terminal of the component, wherein a number of each circuit is added to mounting position information in mounting data in the component mounting means, and Developing the data and optimizing the developed data, and then, in the component mounting means, dynamically determine each mounting position based on the code indicating the pass / fail status of each circuit on one printed circuit board. It is controlled to change to.
【０００８】本発明によれば、多面取り基板の実装にお
いても、各回路の番号を実装データの実装位置情報に付
加することにより、多面取りのデータの展開と展開され
たデータの最適化が可能となり、部品実装時において、
第一回路目を全部品実装後、第二回路を実装するという
ように、各回路ごとに部品実装を行わなくてもよくな
り、常に１枚のプリント基板を実装するタクトが、最小
になるような実装順序で実装できるようになる。また同
時に、両面実装多面取り基板において実装面の裏面の回
路の良否状態も考慮に入れ部品実装を行うため、部品実
装における廃棄部品の発生および実装タクトの無駄を未
然に防止することができ、生産性の高い部品実装が可能
となる。According to the present invention, even in the mounting of a multi-board, the number of each circuit is added to the mounting position information of the mounting data, so that the multi-chip data can be developed and the developed data can be optimized. When mounting components,
There is no need to perform component mounting for each circuit, such as mounting the second circuit after mounting all components on the first circuit, so that the tact of mounting one printed circuit board is always minimized. Can be implemented in any order. At the same time, component mounting is performed in consideration of the quality of the circuit on the back side of the mounting surface on the double-sided mounting multiple board, so that it is possible to prevent the generation of discarded components in component mounting and the waste of mounting tacts beforehand. It is possible to mount components with high reliability.
【０００９】[0009]
【発明の実施の形態】本発明の請求項１に記載の発明
は、基板のランド上に半田を印刷する印刷手段と、前記
印刷された半田の所定位置に部品を装着する部品装着手
段と、前記部品が装着された基板のランドと前記部品の
端子を半田接合するリフロー手段とを有する多面取り基
板の実装方法であって、部品実装時において、前記半田
印刷手段や部品装着手段が、１枚のプリント基板上の各
回路の良否状態を示した符号をもとに、半田印刷範囲や
部品実装範囲を動的に変えるように制御することを特徴
とするものであって、半田印刷手段や部品装着手段にお
いて、１枚のプリント基板上の各回路の良否状態を示し
た符号をもとに、印刷範囲や実装範囲を動的に変えて生
産するように制御することにより、多面取り基板に対し
ても、タクトを最小にすることができる。DESCRIPTION OF THE PREFERRED EMBODIMENTS According to the first aspect of the present invention, there is provided a printing means for printing solder on a land of a board, a component mounting means for mounting a component at a predetermined position of the printed solder, A method of mounting a multi-surface board having a land of the board on which the component is mounted and a reflow means for soldering a terminal of the component, wherein at the time of mounting the component, the solder printing means and the component mounting means have one piece. Based on the code indicating the pass / fail status of each circuit on the printed circuit board, the solder printing range and the component mounting range are controlled so as to be dynamically changed. In the mounting means, based on the code indicating the quality of each circuit on one printed circuit board, the printing range and the mounting range are controlled so as to dynamically change and produce Even the tact is the smallest It can be.
【００１０】請求項２に記載の発明は、基板のランド上
に半田を印刷する印刷手段と、前記印刷された半田の所
定位置に部品を装着する部品装着手段と、前記部品が装
着された基板のランドと前記部品の端子を半田接合する
リフロー手段とを有する多面取り基板の実装方法であっ
て、前記部品装着手段における実装データにおいて、各
回路の番号を実装位置情報に付加し、多面取りデータの
展開と展開されたデータの最適化処理を行い、次に、部
品実装手段において、１枚のプリント基板上の各回路の
良否状態を示した符号をもとに、各実装位置を動的に変
えるように制御することを特徴とするものであって、多
面取り基板の実装において、各回路の番号を実装データ
の実装位置情報に付加することにより、多面取りのデー
タ展開と展開されたデータの最適化が可能となり、部品
実装時において第一回路目を全部品実装後、第二回路を
実装するというように、各回路ごとに部品実装を行わな
いので、常に１枚のプリント基板を実装するタクトが最
小になるような実装順序で実装でき、生産性の高い部品
実装が可能となる。According to a second aspect of the present invention, there is provided a printing means for printing solder on a land of a board, a component mounting means for mounting a component at a predetermined position of the printed solder, and a board on which the component is mounted. And a reflow means for solder-joining the terminals of the component and a reflow means for soldering the terminals of the component, wherein in the mounting data in the component mounting means, a number of each circuit is added to mounting position information, Then, the component mounting means dynamically determines each mounting position based on the code indicating the pass / fail state of each circuit on one printed circuit board. It is characterized in that it is controlled to change it.When mounting multiple boards, by adding the number of each circuit to the mounting position information of the mounting data, Since data optimization is possible, components are not mounted for each circuit, such as mounting the second circuit after mounting all components on the first circuit during component mounting. Mounting can be performed in a mounting order that minimizes the mounting tact, and component mounting with high productivity can be performed.
【００１１】請求項３に記載の発明は、部品実装手段
は、良否符号が各回路に記されているかを認識する工程
と、次に、不良を示す符号がなければ全回路に部品実装
を行う工程と、次に、不良を示す符号があれば、各実装
位置データにつけられた回路符号に基づき、その不良を
示す符号の記された回路の部品実装を行わず、その他の
回路に対して部品実装を行う工程を備えていることを特
徴とするもので、請求項２記載の発明と同様に、各回路
ごとに部品実装を行わないので、タクトが最小になるよ
うに実装できる。According to a third aspect of the present invention, the component mounting means performs a step of recognizing whether a pass / fail code is written on each circuit, and then mounts the component on all circuits if there is no code indicating a defect. If there is a code indicating a defect in the process and then, based on the circuit code attached to each mounting position data, the component with the code indicating the defect is not mounted, and the component is mounted on other circuits. The method is characterized by including a mounting step, and similarly to the second aspect of the present invention, since components are not mounted for each circuit, mounting can be performed with a minimum tact.
【００１２】請求項４に記載の発明は、回路の良否状態
を示す符号に、回路の表裏の良否状態を記すことを特徴
とするもので、両面実装多面取り基板において、実装面
の裏面の回路の良否状態も考慮に入れ部品実装を行うた
め、部品実装における廃棄部品の発生および実装タクト
の無駄を未然に防止し、生産性の高い部品実装が可能と
なる。According to a fourth aspect of the present invention, a good or bad state of a circuit is described on a code indicating a good or bad state of the circuit. Since the component mounting is performed in consideration of the pass / fail state of the component, the generation of discarded components and the waste of mounting tact in the component mounting can be prevented beforehand, and the component mounting with high productivity can be realized.
【００１３】以下、本発明の実施例について図面を参照
して説明する。図１は本発明の回路符号付けと多面取り
展開及び最適化を示す概要図、図２はそのフローチャー
トである。図１、図２を参照して以下その動作の一例を
説明する。図２において、多面取り基板の各実装位置に
それぞれ回路符号を付ける（ステップ＃１；図１の多面
取り展開前の実装データ）。Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a schematic diagram showing circuit coding, multi-plane extraction and optimization according to the present invention, and FIG. 2 is a flowchart thereof. An example of the operation will be described below with reference to FIGS. In FIG. 2, a circuit code is assigned to each mounting position of the multi-panel board (step # 1; mounting data before multi-pan development in FIG. 1).
【００１４】次に、各回路の概念を取り除き、複数の回
路で構成されるプリント基板を１枚のプリント基板のよ
うに考え多面取り展開を行う（ステップ＃２；図１の多
面取り展開後の実装データ）。次に、実装タクトが最小
になるように、展開されたデータの最適化を行う（ステ
ップ＃３；図１の最適化後の実装データ）。Next, the concept of each circuit is removed, and a printed circuit board composed of a plurality of circuits is considered as a single printed circuit board to perform multi-panel development (step # 2; after multi-pane development in FIG. 1). Implementation data). Next, the developed data is optimized so that the mounting tact is minimized (Step # 3; the mounting data after optimization in FIG. 1).
【００１５】次に、部品実装装置１の制御手段が、最適
化されたデータに基づき下記の制御を行う。まず、部品
実装する際に良否符号が各回路に記されているか認識す
る（ステップ＃４）。次に、バットマーク１０がなけれ
ば全回路に部品実装を行う（ステップ＃６）。Next, the control means of the component mounting apparatus 1 performs the following control based on the optimized data. First, it is recognized whether a pass / fail code is written in each circuit when mounting components (step # 4). Next, if there is no bat mark 10, component mounting is performed on all circuits (step # 6).
【００１６】次に、バットマーク１０があれば、各実装
位置データにつけられた回路符号に基づき、そのバット
マーク１０の記された回路の部品実装を行わず、その他
の回路に対して部品実装を行う。（ステップ＃７）。例
えば、図１における最適化後の実装データにおいては、
回路符号２にバットマークが記されているので、Ｎ２，
Ｎ５，Ｎ８ブロックを実装しないことになる。Next, if there is a bat mark 10, based on the circuit code given to each mounting position data, the component mounting of the circuit on which the bat mark 10 is written is not performed, but the component mounting is performed on other circuits. Do. (Step # 7). For example, in the implementation data after optimization in FIG.
Since the bat mark is written on the circuit code 2, N2
The blocks N5 and N8 will not be implemented.
【００１７】また、上記の方法は、部品実装装置につい
て説明したが、同様の方法は半田印刷機、接着剤塗布機
についても適用できる。また、ステップ＃４において、
図３に示す両面実装基板に対する表裏バットマーク１１
を用いれば、実装表面が正常な良品基板であっても、裏
面が不良基板かどうかがわかり、実装タクトの無駄を未
然に防止することができる。また、図３では、片面に表
裏両面のバットマーク情報を記した例で説明したが、各
面に記されたバットマークを部品実装時に両面確認して
も上記の作用は発揮される。Although the above method has been described for a component mounting apparatus, the same method can be applied to a solder printing machine and an adhesive application machine. Also, in step # 4,
Front and back butt mark 11 for double-sided mounting board shown in FIG.
By using, even if the mounting surface is a good non-defective substrate, it can be determined whether the back surface is a defective substrate, and waste of mounting tact can be prevented beforehand. Also, in FIG. 3, an example in which the butt mark information on both sides is described on one side has been described. However, the above-described operation can be exerted even if the butt mark written on each side is confirmed on both sides at the time of component mounting.
【００１８】[0018]
【発明の効果】以上のように本発明によれば、多面取り
基板の実装においても、各回路の番号を実装データの実
装位置情報に付加することにより、多面取りのデータの
展開と展開されたデータの最適化が可能となり、部品実
装時において、第一回路目を全部品実装後、第二回路を
実装するというように、各回路ごとに部品実装を行う必
要がなく、常に１枚のプリント基板を実装するタクトが
最小になるような実装順序で実装できる。また、同時
に、両面実装多面取り基板においては、実装面の裏面の
回路の良否状態も考慮に入れ部品実装を行うため、部品
実装における廃棄部品の発生および実装タクトの無駄を
未然に防止することができ、生産性の高い部品実装が可
能となる。As described above, according to the present invention, even in the mounting of a multi-chip board, the number of each circuit is added to the mounting position information of the mounting data, thereby expanding and expanding the data of the multi-chip board. Data can be optimized, and when mounting components, there is no need to mount components for each circuit, such as mounting all components on the first circuit and then mounting the second circuit. It can be mounted in a mounting order that minimizes the tact of mounting the board. At the same time, on the double-sided mounting multiple board, components are mounted in consideration of the quality of the circuit on the back surface of the mounting surface, so that it is possible to prevent the generation of waste components and waste of mounting tact in component mounting. It is possible to mount components with high productivity.
【図１】本発明の一実施例の部品実装方法を説明するた
めの図である。 （ａ）は本発明の部品実装動作を説明するための図であ
る。（ｂ）はデータ構造を示す図である。FIG. 1 is a diagram for explaining a component mounting method according to an embodiment of the present invention. (A) is a figure for demonstrating the component mounting operation of this invention. (B) is a diagram showing a data structure.
【図２】本発明の一実施例の部品実装方法を示すフロー
チャートである。FIG. 2 is a flowchart showing a component mounting method according to one embodiment of the present invention.
【図３】本発明の一実施例の部品実装方法を示す両面良
否判定符号を説明するための図である。FIG. 3 is a diagram for explaining a double-sided pass / fail judgment code indicating a component mounting method according to an embodiment of the present invention.
【図４】従来の部品実装装置を示す斜視図である。FIG. 4 is a perspective view showing a conventional component mounting apparatus.
【図５】多面取り基板を説明するための図である。FIG. 5 is a diagram for explaining a multi-panel substrate.
【図６】各回路の良否状態を示す符号（バットマーク）
を説明するための図である。FIG. 6 is a symbol (bat mark) indicating a pass / fail state of each circuit.
FIG.
【図７】各回路のバットマークをもとに部品実装動作を
説明するための図である。（ａ）は部品実装をスキップ
する動作を説明するための図である。（ｂ）はデータ構
造を示す図である。FIG. 7 is a diagram for explaining a component mounting operation based on a bat mark of each circuit. (A) is a figure for explaining operation which skips component mounting. (B) is a diagram showing a data structure.
１ 基板 ２ 吸着ノズル ３ ＸＹテーブル ４ 部品供給部 ５ 部品供給軸 ６ 部品認識部 ７ 基板認識部 ８ 回路（パターン） ９ 多面取り基板（割基板） １０ 各回路の不良を示す符号（バットマーク） １１ 表裏バットマーク DESCRIPTION OF SYMBOLS 1 Substrate 2 Suction nozzle 3 XY table 4 Component supply part 5 Component supply axis 6 Component recognition part 7 Board recognition part 8 Circuit (pattern) 9 Multi-panel board (split board) 10 Code (bat mark) 11 indicating a defect of each circuit Front and back bat mark
フロントページの続き (72)発明者 栗林 毅 大阪府門真市大字門真1006番地 松下電器 産業株式会社内Continuation of front page (72) Inventor Takeshi Kuribayashi 1006 Kazuma Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.
Claims (4)
段と、前記印刷された半田の所定位置に部品を装着する
部品装着手段と、前記部品が装着された基板のランドと
前記部品の端子を半田接合するリフロー手段とを有する
多面取り基板の実装方法であって、部品実装時におい
て、前記半田印刷手段や部品装着手段が、１枚のプリン
ト基板上の各回路の良否状態を示した符号をもとに、半
田印刷範囲や部品実装範囲を動的に変えるように制御す
ることを特徴とする部品実装方法。1. A printing means for printing solder on a land of a substrate, a component mounting means for mounting a component at a predetermined position of the printed solder, a land of the substrate on which the component is mounted, and a terminal of the component. And a reflow means for solder-bonding the components. A method for mounting a multiple-surface board, wherein the solder printing means and the component mounting means indicate a pass / fail state of each circuit on one printed board at the time of component mounting. A component mounting method characterized in that a solder printing range and a component mounting range are controlled so as to be dynamically changed based on the above.
段と、前記印刷された半田の所定位置に部品を装着する
部品装着手段と、前記部品が装着された基板のランドと
前記部品の端子を半田接合するリフロー手段とを有する
多面取り基板の実装方法であって、前記部品装着手段に
おける実装データにおいて、各回路の番号を実装位置情
報に付加し、多面取りデータの展開と展開されたデータ
の最適化処理を行い、次に、部品実装手段において、１
枚のプリント基板上の各回路の良否状態を示した符号を
もとに、各実装位置を動的に変えるように制御すること
を特徴とする部品実装方法。2. A printing means for printing solder on a land of a substrate, a component mounting means for mounting a component at a predetermined position of the printed solder, a land of the substrate on which the component is mounted, and a terminal of the component. And a reflow means for soldering and joining the plurality of circuit boards, wherein in the mounting data in the component mounting means, a number of each circuit is added to mounting position information, and the data obtained by developing the multi-faced data and developing the data. Optimization processing, and then the component mounting means
A component mounting method characterized by performing control to dynamically change each mounting position based on a code indicating a pass / fail state of each circuit on a printed circuit board.
されているかを認識する工程と、 次に、不良を示す符号がなければ全回路に部品実装を行
う工程と、 次に、不良を示す符号があれば、各実装位置データにつ
けられた回路符号に基づき、その不良を示す符号の記さ
れた回路の部品実装を行わず、その他の回路に対して部
品実装を行う工程を備えていることを特徴とする請求項
２記載の部品実装方法。3. A component mounting means for recognizing whether a pass / fail code is written on each circuit, a step of mounting components on all circuits if there is no code indicating a defect, and If there is a code indicating, based on the circuit code attached to each mounting position data, without performing the component mounting of the circuit marked with the code indicating the defect, a step of performing component mounting on other circuits 3. The component mounting method according to claim 2, wherein:
裏の良否状態を記すことを特徴とする請求項１または２
記載の部品実装方法。4. A code indicating a pass / fail state of a circuit indicates a pass / fail state of the front and back sides of the circuit.
The described component mounting method.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8250365A JPH1098297A (en) | 1996-09-20 | 1996-09-20 | Component mounting method |
| PCT/JP1997/003307 WO1998012907A1 (en) | 1996-09-20 | 1997-09-19 | Parts mounting methods |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8250365A JPH1098297A (en) | 1996-09-20 | 1996-09-20 | Component mounting method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH1098297A true JPH1098297A (en) | 1998-04-14 |
Family
ID=17206847
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8250365A Pending JPH1098297A (en) | 1996-09-20 | 1996-09-20 | Component mounting method |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JPH1098297A (en) |
| WO (1) | WO1998012907A1 (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002176298A (en) * | 2000-12-08 | 2002-06-21 | Matsushita Electric Ind Co Ltd | Method and device for mounting part |
| JP2006286909A (en) * | 2005-03-31 | 2006-10-19 | Ricoh Microelectronics Co Ltd | Method of manufacturing electronic circuit board and system thereof |
| JP2007042934A (en) * | 2005-08-04 | 2007-02-15 | Juki Corp | Gang printed substrate and production history control method thereof |
| JP2007184497A (en) * | 2006-01-10 | 2007-07-19 | Yamaha Motor Co Ltd | Print inspection method |
| JP2008166547A (en) * | 2006-12-28 | 2008-07-17 | Yamaha Motor Co Ltd | Surface mounting equipment, and control method of surface mounting equipment |
| JPWO2016194030A1 (en) * | 2015-05-29 | 2018-03-22 | 富士機械製造株式会社 | Optimization program and mounting machine |
| JP2020126951A (en) * | 2019-02-06 | 2020-08-20 | パナソニックＩｐマネジメント株式会社 | Component mounting system and component mounting method |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH066560Y2 (en) * | 1988-09-02 | 1994-02-16 | 三洋電機株式会社 | Bad mark detector |
| JP3028637B2 (en) * | 1991-05-23 | 2000-04-04 | 松下電器産業株式会社 | Component mounting method |
| JPH0635518A (en) * | 1992-07-21 | 1994-02-10 | Hitachi Ltd | Production of nc data for split substrate assembly |
| JP3397929B2 (en) * | 1995-03-10 | 2003-04-21 | ヤマハ発動機株式会社 | Data editing method for mounting machine |
-
1996
- 1996-09-20 JP JP8250365A patent/JPH1098297A/en active Pending
-
1997
- 1997-09-19 WO PCT/JP1997/003307 patent/WO1998012907A1/en active Application Filing
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002176298A (en) * | 2000-12-08 | 2002-06-21 | Matsushita Electric Ind Co Ltd | Method and device for mounting part |
| JP2006286909A (en) * | 2005-03-31 | 2006-10-19 | Ricoh Microelectronics Co Ltd | Method of manufacturing electronic circuit board and system thereof |
| JP2007042934A (en) * | 2005-08-04 | 2007-02-15 | Juki Corp | Gang printed substrate and production history control method thereof |
| JP2007184497A (en) * | 2006-01-10 | 2007-07-19 | Yamaha Motor Co Ltd | Print inspection method |
| JP2008166547A (en) * | 2006-12-28 | 2008-07-17 | Yamaha Motor Co Ltd | Surface mounting equipment, and control method of surface mounting equipment |
| JPWO2016194030A1 (en) * | 2015-05-29 | 2018-03-22 | 富士機械製造株式会社 | Optimization program and mounting machine |
| JP2020126951A (en) * | 2019-02-06 | 2020-08-20 | パナソニックＩｐマネジメント株式会社 | Component mounting system and component mounting method |
Also Published As
| Publication number | Publication date |
|---|---|
| WO1998012907A1 (en) | 1998-03-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2006202804A (en) | Electronic component packaging system, electronic component mounter and electronic component packaging method | |
| JP2004063787A (en) | Method of mounting camera module on substrate | |
| JPH06216487A (en) | Connecting terminal part of flexible pattern | |
| JPH1098297A (en) | Component mounting method | |
| US20020166225A1 (en) | Electric-circuit board assembling line, electric-circuit board producing method and electric-circuit board assembling line controlling program | |
| JP2003163499A (en) | Mounting method for chip | |
| WO2008105744A2 (en) | Method and apparatus for assembling surface mount devices | |
| CN109219268A (en) | A kind of secondary welding resistance method and thick copper sheet structure of thickness copper sheet | |
| US6344974B1 (en) | Printed circuit board and method of producing same | |
| JP2000103033A (en) | Cream solder printing machine | |
| JP3281838B2 (en) | Circuit board with shield case and method of manufacturing the same | |
| JP2003163449A (en) | Mounting method of chip component | |
| JPH04154188A (en) | Manufacture of single-sided printed wiring board | |
| JPH054543U (en) | Multi-sided printed wiring board | |
| JPH06296076A (en) | Side face electrode forming method of smd module | |
| JP2000223796A (en) | Both side mounted board and component mounting method using the board | |
| JP2002296793A (en) | Exposure device and method for producing multilayer wiring substrate while using the same | |
| JPH10256785A (en) | Printed circuit board transferring method and its device | |
| KR20020060660A (en) | Manufacturing method of double access typed flexible printed circuit board | |
| JPH0744358B2 (en) | Component mounting method | |
| JP2003224396A (en) | Method and system for manufacturing board | |
| JP2002353274A (en) | Method for repairing failure of semiconductor lsi chip | |
| JPH0815717A (en) | Liquid crystal display device | |
| JPH04276690A (en) | Double-sided mounting printed substrate and mounting method therefor | |
| JPH0513947A (en) | Outer lead bonder |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20040427 |
|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20040624 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20040720 |